BD4234NUX [ROHM]
BD4234NUX is Strobe Charge Control IC, ideal for Digital still cameras, Mobile Phone. The strobe charge IC is a self-oscillating switching regulator that uses a transformer. It provides highly efficient applications for charging capacitors in sets with various strobes.;
| 型号： | BD4234NUX |
| 厂家： | 
ROHM |
| 描述： | BD4234NUX is Strobe Charge Control IC, ideal for Digital still cameras, Mobile Phone. The strobe charge IC is a self-oscillating switching regulator that uses a transformer. It provides highly efficient applications for charging capacitors in sets with various strobes. |
| 文件： | 总29页 (文件大小：2075K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Power LSI series for Digital Camera and Digital Video Camera
Strobe Charge Control IC
BD4234NUX
●Outline
The strobe charge IC is a self-oscillating switching
●Key Specifications
・SW pin input range:
48V
0.5A±20%
1.0V±1.1%
・SW pin peak current:
・Full charge detection voltage DC:
・Full charge detection voltage AC 200nsec:1.0V-1.1%~1.35%
・Full charge detection voltage AC 100nsec: 1.0V-1.1%~1.6%
regulator that uses a transformer. It provides highly
efficient applications for charging capacitors in sets with
various strobes.
●Features
・Vth(START,IGBT_AN)
0.6V~1.5V
1) Built-in lowVth48V DMOS
2) Adjustable transformer primary-side peak current
by RADJ pin
3) Charging control switching with the START pin
4) Includes high precision full charge voltage
detection circuit and output pin
5) Various built-in protective circuits (TSD, UVLO,
SDP)
6) Built-in IGBT driver
●Package
3.0mm×2.0mm×0.6mm VSON010X3020
Digital still cameras、Mobile Phone
●Use
●Recommended Application Circuit
RFU02VS8S(ROHM)
S
P
Battery
Cmain
80μF
300V
3.3V
4.7μF
22μF
VCC
SW
10
VCC
Controller
5
VCC
STB
IGBT
OSC
TSD
UVLO
VREF
UVLO
OSC
TSD
Xenon
OS
START
ENABLE
6
START
STB
S
R
Q
VCC
FULL
SDP
STB
UVLO
TSD
LOGIC
DRIVER
PGND
MAX ON
OFF
OSC
S Q
R
CLK
R
Q
MAX OFF
OFF
ON
TSD
UVLO
SDP
ON
+
-
PGND
VC
SDP
RFB1=470kΩ
1
RADJ
8
9
7
I/V
47kΩ
FULL
4
3
+
-
Q
S
R
(
)
RFB2=1.62kΩ
+
-
GND
OS
OFF
FULL
VCC
68Ω
UVLO
2
IGBT_OUT
IGBT_IN
10kΩ
IGBT_IN
IGBT
10kΩ
IGBT
CY25BAH-8F
Fig.1 Application circuit
○Products：Silicon monolithic IC ○This product is not designed for normal operation with in a radioactive
Status of this document
The Japanese version of this document is the official specification. Please use the translation version of this document as a reference to expedite understanding of the official version.
If these are any uncertainty in translation version of this document, official version takes priority.
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1
TSZ22111・14・001
BD4234NUX
●package
●Pin Description
SON 10pin package VSON010X3020
(2.0mm×3.0mm×0.6mm)
Pin No. Pin Name
Function
Power GND
2.0±0.1
1
2
PGND
0.5±0.1
IGBT_OUT
IGBT Driver output pin
CO.2
3
4
GND
VC
GND pin
1
2
3
4
5
Full charge detection pin
5
VCC
VCC supply pin
Charge start signal input pin
IGBT Driver output start signal input pin
Ipeak current control setting pin
Full charge detection signal output pin
Switching pin
6
START
IGBT_IN
RADJ
FULL
SW
7
8
9
10
10
9
8
+0.05
0.25
7
6
(UNIT:mm)
-0.04
2.39±0.1
Fig.2 Pin assignments
●Block Diagram
VCC
SW
10
5
VCC
STB
OSC
TSD
UVLO
VREF
UVLO
OSC
TSD
IGBT
OS
ENABLE
START
6
START
S Q
VCC
R
FULL
SDP
STB
UVLO
TSD
LOGIC
STB
Q
DRIVER
PGND
MAX ON
OFF
OSC
S Q
R
CLK
R
MAX OFF
OFF
ON
TSD
UVLO
SDP
ON
+
-
SDP
1
PGND
VC
RADJ
8
9
7
I/V
FULL
4
3
+
-
Q
S
R
+
-
OS
OFF
FULL
GND
VCC
UVLO
2
IGBT_OUT
IGBT_IN
IGBT_IN
IGBT
*1 STB ： Standby signal
*2 OS ： One shot pulse
Fig.3 Block diagram
●Absolute maximum ratings (Ta=25℃)
●Operating condition
Parameter
Symbol
Rating
Unit
Parameter
Symbol
Rating
Unit
VCC supply voltage
SW pin
VCC
VSW
VC
-0.3～7
48
V
V
VCC supply voltage range
VC pin
VCC
VC
2.5～5.5
-0.6～VCC
0～VCC
0～VCC
0～5.5
V
V
V
V
V
A
VC pin
-0.6～7
-0.3～7
-0.3～7
-0.3～7
-35～+85
V
START Input pin voltage range
VSTART
START pin
START
FULL
IGBT_IN
Topr
V
IGBT_IN Input pin voltage range VIGBT_IN
FULL pin
V
FULL Input pin voltage range
SW pin current
VFULL
ISW
IGBT_IN pin
V
0.5～2
℃
℃
℃
mW
Operating temperature range
Storage temperature range
Junction temperature
Power dissipation
Table 2. Operating Conditions
Tstg
-55～+150
150
Tjmax
Pd
1540
Reduced by 12.32mW/℃ at Ta=25℃ or more
when mounted on a 74.2mm×74.2mm×1.6mm glass epoxy 4 layer PCB
(Rohm standard PCB Ta=25℃)
Table 1. Absolute Maximum Ratings
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TSZ22111・14・001
TSZ02201-0Q2Q0J400020-1-2
05.Mar.2014 Rev.005
2
BD4234NUX
●Electrical characteristics
（Unless specified, Ta=25℃, VCC=V(START)=3.3,V(IGBT_IN)=0V
Limit
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
[Overall device]
VCC circuit current
ICC
-
-
1.5
-
3
1
mA
Circuit current standby
operation
ISTB
μA START=0V
[Standby control START pin]
START pin high voltage H1
START pin high voltage H2
START pin low voltage
Input bias current
VSTH
VSTH
VSTL
1.5
1.3
-
-
-
-
-
V
V
V
Ta=‐25℃～85℃、VCC=2.5V～5.5V
-
0.6
36
ISTART
12
24
μA START=3.3V
[Transformer primary-side driver block]
SW pin leak current
SW pin peak current
SW saturation voltage
RADJ adjustable range
[Charging control block]
Max on time
ISWL
-
0.4
-
-
1
μA SW=48V
IPEAK
VSAT
RADJ
0.5
0.2
-
0.6
0.4
100
A
V
RADJ=100kΩ
ISW=0.5A
33
kΩ IPEAK=1.67.A～0.5A
TONMAX
25
50
25
100
50
μs
μs
Max off time
TOFFMAX
12.5
[Transformer secondary-side detection block]
VC pin input current
IVC
-
-
1
μA VC=VCC
Full charge detection voltage
VFULLTH 0.989
1
1.011
V
Full charge detection voltage
AC1
Full charge detection voltage
AC2
VFULLTH_
0.9890
AC1
VFULLTH_
0.9890
AC2
1
1
1.0135
1.0160
V
V
VC=200ns pulse input→FULL=H→L
VC=100ns pulse input→FULL=H→L
FULL pin ON resistor
FULL pin leak current
[Protection circuit block]
UVLO detect voltage
UVLO hysteresis
RFULLL
IFULLL
0.5
-
1
-
2
1
kΩ VC=VCC,FULL=0.5V
μA FULL=3.3V
VUVLOTH
1.95
2.1
2.25
280
V
VCC detection
VUVLOHYS 120
200
mV
[IGBT driver block]
Output short high current
Output short low current
Ioso
Iosi
90
15
140
30
200
60
mA IGBT_IN=3.3V,START=0V,IGBT_OUT=0V
mA IGBT_IN=0, START=0V,IGBT_OUT=3.3V
IGBT_IN input high voltage
Range H1
IGBT_IN input high voltage
range H2
VIGBTH1
VIGBTH2
1.5
1.3
-
-
-
-
V
-
START=0V
START=0V,VCC =2.5V～5.5V
Ta=-25℃～85℃
IGBT_IN input high voltage
range
VIGBTL
-
12
-
-
0.6
36
V
START=0V
IGBT_IN sink current
IIGBT_IN
24
0.6
μA START=0V
IGBT_IN→IGBT_OUT response time
(rise)START=0V
IGBT_IN→IGBT_OUT response time
(fall) START=0V
IGBT_IN response time Rise1 Tres_rise1
IGBT_IN response time Fall1 Tres_rise1
IGBT_IN response time Rise2 Tres_rise2
1.2
μs
-
-
-
60
15
60
200
80
ns
IGBT_IN→IGBT_OUT response time
(rise) START=3V
ns
ns
IGBT_IN→IGBT_OUT response time
(fall) START=3V
IGBT_IN response time Fall2
Tres_fall2
200
Table 3. Electrical characteristics
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TSZ02201-0Q2Q0J400020-1-2
05.Mar.2014 Rev.005
3
BD4234NUX
●Electrical characteristics data (1)
0.5
3.0
2.4
1.8
1.2
0.6
0.0
0.4
0.3
0.2
Ta=85℃
Ta=25℃
Ta=-35℃
Ta=25℃ Ta=85℃
Ta=-35℃
0.1
0.0
0
1.1
2.2
3.3
4.4
5.5
0
1.1
2.2
3.3
4.4
5.5
VCC [V]
VCC [V]
Fig.5 Circuit Current
(pwr_tr_on)
Fig.4 Circuit Current
(Standby Condition)
3.0
2.4
1.8
1.2
0.6
0.0
3.0
2.4
1.8
1.2
0.6
0.0
Ta=85℃
Ta=85℃
Ta=25℃
Ta=25℃
Ta=-35℃
Ta=-35℃
0
1.1
2.2
3.3
4.4
5.5
0
1.1
2.2
3.3
4.4
5.5
VCC [V]
VCC [V]
Fig.6 Circuit Current
(pwr_tr_off)
Fig.7 Circuit Current - VCC
(IGBTDRV=ON)
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TSZ22111・14・001
BD4234NUX
●Electrical characteristics data (2)
3.0
3.0
2.4
1.8
1.2
0.6
0.0
VCC=5.5V
VCC=3.3V
2.4
1.8
1.2
0.6
0.0
VCC=5.5V
VCC=3.3V
VCC=2.5V
VCC=2.5V
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Temp [°C]
VCC [V]
Fig.9 Circuit Current – Temp
Fig.8 Circuit Current – Temp
(pwr_tr_off)
(pwr_tr_on)
3.0
3.0
2.5
2.0
1.5
1.0
0.5
0.0
2.5
2.0
1.5
1.0
0.5
0.0
Ta=85℃
Ta=85℃
Ta=25℃
Ta=-35℃
Ta=25℃
Ta=-35℃
0
0.5
1
1.5
VCC [V]
2
2.5
3
0
0.5
1
1.5
VCC [V]
2
2.5
3
Fig.10 VCC UVLO Check
(Detect)
Fig. 11 VCC UVLO Check
(Release)
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TSZ22111・14・001
BD4234NUX
●Electrical characteristics data (3)
3.6
3.6
3.0
2.4
1.8
1.2
0.6
0.0
3.0
2.4
Ta=85℃
Ta=85℃
1.8
Ta=25℃
Ta=25℃
1.2
Ta=-35℃
Ta=-35℃
0.6
0.0
0
1.1
2.2
3.3
0
1.1
2.2
3.3
VCC [V]
VCC [V]
Fig.12 VCC UVLO Check (IGBT)
(Sweep Up)
Fig.13 VCC UVLO Check (IGBT)
(Sweep Down)
3.6
3.0
2.4
1.8
1.2
0.6
0.0
36.0
30.0
24.0
18.0
12.0
6.0
Ta=85℃
Ta=25℃
Ta=-35℃
Ta=85℃
Ta=25℃
Ta=-35℃
0.0
0
1.1
2.2
3.3
0
1.1
2.2
3.3
START [V]
START [V]
Fig.14 START Input Current
Fig.15 Start Threshold Voltage
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TSZ02201-0Q2Q0J400020-1-2
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TSZ22111・14・001
BD4234NUX
●Electrical characteristics data (4)
4.0
0.3
0.2
Ta=85℃
3.2
Ta=25℃
Ta=25℃
2.4
0.1
Ta=-35℃
Ta=85℃
Ta=-35℃
0.0
1.6
0.8
0.0
-0.1
-0.2
0
1.1
2.2
3.3
0
1.1
2.2
3.3
VCC [V]
FULL [V]
Fig.16 FULL Sink Current
Fig. 17 FULL Pin Leak Current
4.0
3.2
2.4
1.6
0.8
0.0
1.0
0.8
0.6
0.4
0.2
0.0
Ta=85℃
Ta=25℃
Ta=-35℃
Ta=85℃
Ta=25℃
Ta=-35℃
0
10
20
30
40
50
0
0.5
1
1.5
2
SW [A]
SW [V]
Fig.19 SW Leak Current
Fig.18 SAT Voltage
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TSZ22111・14・001
BD4234NUX
●Electrical characteristics data (5)
40.0
75.0
60.0
45.0
30.0
15.0
0.0
VCC=3.3V
30.0
20.0
10.0
0.0
VCC=3.3V
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Temp [°C ]
Temp [°C]
Fig.20 TART Delay Time
Fig. 21AX OFF Time
35.0
28.0
21.0
14.0
7.0
36.0
30.0
24.0
18.0
12.0
6.0
VCC=3.3V
Ta=85℃
Ta=25℃
Ta=-35℃
0.0
0.0
0
1.1
2.2
3.3
-50
-25
0
25
50
75
100
Temp [°C]
VCC [V]
Fig.23 IGBT_IN Input Current
Fig.22 MAX ON Time
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TSZ22111・14・001
BD4234NUX
●Electrical characteristics data (6)
40.0
30.0
20.0
10.0
0.0
3.6
3.0
2.4
1.8
1.2
0.6
0.0
Ta=85℃
Ta=25℃
Ta=-35℃
0
1.1
2.2
3.3
0
1.1
2.2
3.3
IGBT_OUT [V]
IGBT_IN [V]
Fig.24 IGBT_IN Threshold Voltage
Fig. 25 IGBT_OUT Sink Current
25.0
180.0
135.0
90.0
45.0
0.0
20.0
15.0
10.0
5.0
VCC=3.3V
Ta=85℃
Ta=25℃
Ta=-35℃
0.0
-50
-25
0
25
50
75
100
0
1.1
2.2
3.3
Temp [°C ]
IGBT_OUT [V]
Fig.26 IGBT_OUT Source Current
Fig.27 IGBT Response time Rise1
(START=0)
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TSZ22111・14・001
BD4234NUX
●Electrical characteristics data (7)
0.3
0.2
75.0
60.0
45.0
30.0
15.0
0.0
VCC=3.3V
Ta=25℃
0.1
Ta=-35℃
Ta=85℃
0.0
-0.1
-0.2
0
1.1
2.2
3.3
-50
-25
0
25
50
75
100
VC [V]
Temp [°C ]
Fig.29 VC Input Current
Fig.28 IGBT Response time Fall1
(START=0)
1.5
1.2
0.9
0.6
0.3
0.0
200.0
100.0
0.0
VCC=3.3V
VCC=3.3V
-100.0
-200.0
-50
-25
0
25
50
75
100
-50
-25
0
25
50
75
100
Temp [°C ]
Temp [°C ]
Fig.30 VC FULL Threshold Voltage vs TEMP
Fig. 31 VC OFF Threshold Voltage vs TEMP
( Monitor FULL, sweep VC from –0.2 to 0.2 )
( Monitor SW, sweep VC from –0.2 to 0.2 )
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TSZ22111・14・001
TSZ02201-0Q2Q0J400020-1-2
05.Mar.2014 Rev.005
10
BD4234NUX
●Electrical characteristics data (8)
2.0
RADJ=33kΩ
1.5
1.0
RADJ=62kΩ
0.5
RADJ=100kΩ
0.0
-50
-25
0
25
50
75
100
temp [℃ ]
Fig. 32 COMP Peak Current
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TSZ22111・14・001
BD4234NUX
●Timing Chart and Description of Operation
V（START）
(VENABLE)
V（FULL）
V(CAP)
Voltage at Completion of Charge
V（IGBT_IN）
V（IGBT＿OUT）
A
B
C D E
F
I
G H
K L
M N O P
J
Fig 33 Timing Chart 1: Overall Operation
■Charge start/stop
In this IC, a charging operation starts when the START pin is set to "H" (See Time ○ , ○ and ○ in Fig 33.). In
A
C
L
A
B
C
I
L
N
order to maintain the charging operation, the START pin must be set to "H". (See Time ○ to ○, ○ to○ , ○ to ○
in Fig 33.) If any of the conditions ① to ③ are satisfied, the charging operation stops.
①
②
③
The START pin is set to "L".
Charging is completed. The VC pin voltage reaches the specified voltage. (See Time ○ and ○ in Fig 33.)
The protective circuit is activated (See Fig 35 and the Protective Circuit.)。
F
M
To re-charge, set the START pin to "L", and the FULL pin is changed from “L” to “H”. Also, if the CHARGE_ON pin is
C
changed from "L" to "H" again, the charging operation re-starts. (See Time ○ in Fig 33.)
■IGBT driver
Set the IGBT_IN pin to "H" when the IGBT driver satisfies the following 4 conditions. The "H" signal is output to the
G
J
N
IGBT_OUT pin. (See Time ○ , ○ and ○ in Fig 33.)
①
②
③
The VCC voltage is the UVLO release voltage or more.
The FULL pin is set at "L".
Even if the IGBT_IN pin is set to "H" while the START pin is set to "H", the IGBT_OUT pin remains at "L"
and no light flashes.
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TSZ22111・14・001
BD4234NUX
●Timing Chart and Description of Operation
VCC
V（START）
I（SW）
ON
OFF
ON
OFF
ON
ON
Ipeak
Secondary-side current
V（SW)
VBAT
ADJ
V（VC）
Full charge voltage
Maximum OFF time
間
GND
OFF detection voltage
-VBAT
V（CAP）
Full charge voltage
V (FULL)
A
B
C
D
E
F
G
H
I
J
K
L
Fig 34. Timing Chart 2: Switching Operation
■Charging operation
The switching operation of this IC is shown in Fig.34 Timing Chart 2.
A
B
If the START pin is set to "H", all internal circuits are reset , the internal PowerTr is turned ON. (See Fig 34. Time ○→○.)
While the internal PowerTr is turned ON, a current is passed into the SW pin. When the current specified at the RADJ pin
c
voltage is reached, the PowerTr is turned OFF. (See Time ○ in Fig 34.) The time tON when the PowerTr is ON is
indicated as follows:
LP: Transformer primary-side inductance value
IPEAK
VBAT
I PEAK
VBAT
:
Primary-side peak current
Battery voltage
(1)
tON LP
:
When the PowerTr is turned OFF, the magnetic energy stored in the transformer is released to the transformer
secondary-side. While the energy is released, the VC pin voltage and the SW pin voltage indicated by the following
equations are generated:
(RFB2 // RFB3
)
（2）
V (VC) (VBATV・Np)
RFB1 (RFB2 // RFB3
)
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TSZ22111・14・001
BD4234NUX
V(VC) : Full charge detection voltage
(RFB2 // RFB3
)
Vcap
:
Main capacitor voltage
(3)
V (VC) (Vcap＋Vdiode )
Vcap
RFB1 (RFB2 // RFB3
)
Vdiode
:
Diode forward voltage
V(SW): SW pin voltage
NP: S winding vs. P winding Winding ratio
V(SW)
VBAT
(4)
NP
When the energy release to the transformer secondary-side is completed, the VC pin voltage and the SW pin voltage
D
produce resonance by the parasitic capacitance and the transformer inductance. (See Time ○ in Fig 34) At this time,
unless the VC pin voltage becomes the GND voltage or less shown, the PowerTr remains OFF till the maximum OFF
E
time is reached. (See Time ○ in Fig 34) As soon as the OFF detection voltage or less is reached, the PowerTr is turned
G
ON. (See Time ○ in Fig 34) The time, tOFF when the secondary-side releases energy is represented by the following
equation:
LS : Secondary-side inductance
IPEAK
(5)
tOFF LS
Vcap NP
After the above operations are repeated, if it is detected that the VC pin voltage reaches the full charge detection voltage,
the FULL pin is set to "L" and the switching operation is stopped.
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TSZ22111・14・001
BD4234NUX
●Timing Chart and Description of Operation( about protection function )
Operation stop due to UVLO detection
Operation restart due to UVLO release
VCC
Hysteresis
UVLO detection voltage
t
V（START）
t
Operation stop due to increase of chip temperature
V（VC）
Operation restart due to decrease of chip temperature
TSDP
t
V（cap）
Voltage at completion of charge
t
t
I（ＶＢＡＴ）
A
B
C
D
E
F
G
H
I
Fig 35 Timing Chart 3: Under Protective Circuit Operation
■Protection Functions
◆UVLO
If the VCC voltage is reduced to the UVLO detection voltage specified in the electrical characteristics or less, the
C
E
UVLO protective circuit is activated and the charging operation temporarily stops. (See Time ○ and ○ in Fig 35.)
After that, when the VCC voltage becomes the UVLO release voltage or more, the charging operation automatically
D
F
restarts. (See Time ○ and ○ in Fig 35.)
This UVLO also works for the IGBT_OUT pin. If the VCC voltage becomes the UVLO detection voltage or less, the
IGBT_OUT voltage is forced to be set to "L".
◆Thermal Shut Down (TSD)
It protects the IC against thermal runaway due to excessive temperature rise (Tj>175°C [TYP]). After detection, the
G
charging operation temporarily stops (See time ○ in Fig 35.), and when the chip temperature decreases, (Tj<150°C
H
[TYP]), it automatically restarts. (See Time ○ in Fig 35.)
◆VC pin short detection (SDP)
If the VC pin becomes the GND level due to any failure and the PowerTr repeats switching 216(=65536) times which is
the SDP count number (TSDP) at the maximum OFF time, it is judged as an error and the charging operation is forced
B
to be stopped. (See Time ○ in Fig 35.) If the START pin is changed from "L" to "H" and the UVLO detection is
released, it restarts.
◆Maximum OFF time
When it is detected that the internal PowerTr is left OFF for over the maximum OFF time specified in the electrical
characteristics, the PowerTr is forced to be turned ON. This occurs unless the VC pin voltage becomes the OFF
D
detection voltage specified in the electrical characteristics or less. (See Time ○ in Fig 34)
◆Maximum ON time
When it is detected that the internal PowerTr is left ON for over the maximum ON time specified in the electrical
characteristics, it is judged as an error and the PowerTr is forced to be turned ON. This condition occurs when the SW
pin is released or the current specified as the ADJ pin voltage does not pass. If the START pin is changed from "L" to
"H" and the UVLO detection is released, it restarts.
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TSZ22111・14・001
BD4234NUX
●Setup for main capacitor full charge voltage
VC pin node is divided by between transformer Secondary node and Fast recovery diode anode side by resistor RFB1, RFB2
J
and RFB3. When VC pin voltage reach until full charge voltage as Fig.34timing chart ○~Ⓚ,charge is stopped.
S
Battery
P
22μ
F
S
W
RFB1
VC
R FB
R FB
3
2
CVC
GN
D
OF
F
Fig 36 VC pin external parts
It is possible to setup by full charge detection voltage described electrical characteristics, and RFB1.2.3 using below calculating
formula.
(RFB1 (RFB2 // RFB3 ))
Vcap ：main capacitor voltage
VC(Vcap) V(VCTH ・)
Vdiode （6）
V(VCTH)：full detection voltage typical=1V
RFB1 ：VC pin external resistor
(RFB2 // RFB3
)
2
3
、
、
Vdiode ：diode VF voltage
VC pin need external capacitor to prevent from overshoot contributed parasitic capacitor of transformer secondary side and
RFB1 17「Caution about VC pin」and Page18「How to prevent VC pin overshoot」.）
pattern (See page
Parasitic capacitor increase overshoot, it is need to increase CVC external capacitor to prevent from overshoot ,VC pin
voltage pulse width get thin by time constant RFB1 CVC. This cause increasing full detection voltage.
2
3
and
、
、
(example of setup)set up of main capacitor voltage=320V
R
R
R
FB1＝470kΩ(ROHM KTR18 、P=0.25W、absolute voltage=400V)
FB2＝2.0kΩ
FB3＝5.6kΩ
◆About RFB1
RFB1
ΔVRFB1=（main capacitor voltage＋FRD VF－full charge detection voltage）.
is applied high voltage as
Be caution not to reach electrical power RFB1 calculated by I FB1
ΔVRFB1.
and
IRFB1 (Vcap Vdiode)/(RFB1 (RFB2 // RFB3
)
（7）
P
IRFB・1 ΔRFB1 （8）
RFB1
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TSZ22111・14・001
BD4234NUX
●Caution about VC pin
Transformer secondary side is switching high voltage, it cause VC pin overshoot with pattern of capacitance coupling of
transformer secondary side to RFB1
voltage pattern layout must be short and thin .and connect external capacitor
High
between VC pin and GND to prevent VC pin overshoot.
RFB1
CVC
RFB2
GND
VC
Fig37 PCB layout pattern of bourd
Main capacitor voltage
FULL (3V/div)
(50V/div)
Overshoot voltage
VC (200mV/div)
Fig38Waveforme of VC pin overshoot voltage
●Full detection voltage temperature characteristics as figure 39
Ta=-5℃～65℃,0.9961V～1.0038V(-0.39%～+0.38%).
Ta=-35℃～85℃,0.9920V～1.005V(-0.8%～+0.5%).
temperature characteristic
Typ=1.000V
VC full charge detection
temperature characteristic
(worst case simulation)
usable range
Ta=-5℃～65℃
Min 0.9961V (-0.39%)
Max 1.0038V (+0.38%)
Ta=-5℃～65℃
1.015
1.010
1.005
1.000
0.995
0.990
0.985
Ta=-35℃～85℃
Min 0.9920V(-0.8%)
Max 1.005V(+0.5%)
-60
-40
-20
0
20
40
Ta[℃]
60
80
100
120
Fig39 full charge detection voltage temperature characteristics
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TSZ22111・14・001
BD4234NUX
● Countermeasure of VC pin overshoot
It is possible to simulate for VC pin over shoot as equivalent circuit schematic considered parasitic capacitor Cin from
transformer secondary and R1(RFB1)as fig. 40
If parasitic capacitor Cin is increased VC pin overshoot voltage is increased as figure 41
It is possible to be down overshoot by increasing external capacitor CVC as figure39
When VC pin voltage pulse width is thin, full charge detection comparator cannot response, VC full charge detection is
increased as fig43
If pulse width 100nsec, difference from DC detection and AC detection voltage over 0.5%.
It guarantee pulse response characteristics by 「full charger detection AC1」「full charger detection AC2」of electric character.
VC
⊿VC
cin=0.1pF
cin=0.08pF
cin=0.06pF
parasistic capacitor
of internal IC.
Bonding padetc.
Please connect
1.5pF.
cin=0.04pF
cin=0.02pF
resistor
R1(RFB1
)
boadparasistic
capacitor
cin
VC
320V
transformersecondary
side V7
resistor
56kΩ //3kΩ
100ns
V7
-37V
Fig41Simulation result of VC pin overshoot with cin
power supply V7
transformer secondary side voltage
rise time 100ns、fall time 100ns
-37V～320Vpulse voltage
VC
cvc=15pF
⊿VC
cvc=22pF
cvc=27pF
cvc=33pF
cvc=36pF
Fig40egullvalent circuit schematic of external capacitor
transformer secondary
side V7
Fig42 Simulation result of VC pin overshoot with cvc
full charge detection
3.75
3.50
3.25
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0.00
Ta=25℃
Ta=－35℃
Ta=85℃
worst case
simulation
0
100 200
VC pulse width [ns]
300
400
Fig43 Full charge detection voltage for VC pin ac pulse input
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TSZ22111・14・001
BD4234NUX
●How to judge VC pulse voltage
Measure flat part of VC pin wave form figure 44by oscilloscope when full charge detect.
Pulse width is 200nsec to use 「full charge detection AC1」Pulse width is 100nsec to use 「full charge detection AC2」
(Recommend to check with worst condition of VBAT is low, low temperature, and Ipeak is low)
(Example of VC pin wave form)
condition：Ta=25℃
VBAT=3.6V、Ipeak=0.92A
Lp=10μH、Ls=1.3mH
Np：Ns=14T：143T
ΔT=210nsec
FULL(3V/div)
FULL(3V/div)
Zoom in
ΔT
VC(200mV/div)
VC(30mV/div)
OFFSET=1V
100nsec/div
100nsec/div
Fig44 Setup of VC pin voltage to flat
It is recommened to confirm VC pin voltage by small range of oscilloscope. Please check flat part of VC pin voltage around ±
5mV.
VC pin voltage 10mV/div
VC pin voltage 30mV/div
fig45. Confirmation of VC pin voltage
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19
BD4234NUX
●How to set up primary side peak current.
BD4234NUX set up primary side peak current by adjustment of RADJ external resistor as below.
IPEAK _ DC (0.5/ RADJ 23.8103 ) 0.015)/(20.55103 )105 ꢀ[ꢀA]
(9)
IPEAK_DC： primary-side DC current
Relation of RADJ external resistor and DC peak current as fig 46
Fig46. RADJ-primary peak current
For application using, Ipeak have difference between above graph and application Ipeak because of 200nsec delay. This
delay time occur rising Ipeak as below formula(12).
VBAT
IpeakΔ
Lp
TIPEAK
：rising Ipeak by delay time
： transformer primary side inductance
：Ipeak delay time
（10）
IPEAKΔ
TIPEAK
LP
●Usable setting of VBAT and RADJ pin external resistor
Please use with usable range of fig 47at Ta=-35℃～85℃
When VBAT voltage is low, power transistor can’t get Vds voltage by transformer primary side dc resistor and SW pin resistor.
Ipeak current can’t reach current detection, charge is stop by MAXON protection. (fig 47 Protection of MAXON)。To change
Ipeak current, RADJ external resistor is unusable under 33kΩbecause Ipeak current is over 2A that is SW pin absolute
range(fig 47 Unusable range over 2A).
100
90
Conditions:
Ta=85℃
80
VCC=3.4V
VBAT=0V～5.0V
70
RADJ=33kΩ～100kΩ
transformer：TTRN-0530H
60
main capacitor：80μF
FRD：CRF03（TOSHIBA）
50
Usable setting range
40
30
20
10
0
Protection of MAX ON
Unusable range over 2A
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
VBAT[V]
Fig 47
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TSZ22111・14・001
BD4234NUX
●Selection of components externally connected
■Transformer
In BD4234NUX, each parameter is set as follows:
◆Winding ratio
□Ratio of primary winding vs. secondary winding NP(S+F)
Set the ratio NP(S+F) so that it does not exceed 48V which is the operating condition of the SW pin. The
setting equation is as follows:
Vcap Vdiode
NP
(11)
48
Check the surge voltage of the SW pin and change the winding ratio as required. A larger ratio than
necessary results in a reduction of efficiency.
◆Secondly-side inductance value
In order to set the pulse width at OFF, when the full charge detection is conducted, to a certain value or more, set the secondly
inductance value according to the following equation:
NP 200 109 V (VCTH )
RFB1 RFB2
(12)
LS : Secondly-side inductance value
IPEAK : Primary-side peak current
VCTH：full charge detection voltage
LS
IPEAK
RFB2
■Diode
Note the following points when selecting a diode.
Recovery time Trr
A diode with a long recovery time affects the charging time and efficiency. Due to dissipation associated with the
reduction of efficiency, the surface temperature of the diode package rises, resulting in deterioration of diode
characteristics. Therefore, select a diode with the shortest recovery time possible. (Recommendation: 100 nsec or
less)
Backward voltage
Select a diode with which the backward voltage rating does not exceed the reverse bias voltage applied to the
diode. The reverse bias voltage applied to the diode is represented as follows:
Vreverse : Diode backward voltage
Vreverse Vcap (13)
Vcap : Main capacitor voltage
◆Forward current
Select a diode of which the forward current rating is determined allowing sufficient margin against the secondary
peak current..
IPEAK
Is : Secondary-side peak current
Is
(14)
NP
NP : S winding vs. P winding Winding ratio
IPEAK : Primary-side peak current
Idiode Is
(15)
Idiode : Diode forward current rating
■Main capacitor
Select a main capacitor for which the withstand voltage should be determined allowing sufficient margin against the fill
charge voltage.
■IGBT
The IGBT controls the trigger pulse that ionizes xenon gas from the photo flash lamp, and passes a heavy-current
(100A or more) to the xenon tube to fire a flash. The IGBT driver drives the gate of IGBT to fire a flash. If the gate
potential of IGBT falls rapidly, electric charge remains partly in the internal gate parasitic capacitance due to the IGBT
internal gate parasitic resistance. As a result, the IGBT is not partly turned OFF, a current crowding occurs, and the
IGBT is broken. Therefore, according to the IGBT specifications, connect the series resistance and pull-down
resistance to the IGBT driver output.
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TSZ22111・14・001
BD4234NUX
●Layout Pattern of Board
The layout pattern of the board has very significant effects on the charging characteristics because it involves a high voltage and
a heavy current. Therefore, it must be determined carefully.
・A heavy current is passed in the path of the bypass capacitor from the battery - the transformer primary-side - SW pin -
PGND pin. Make the loop as short as possible, and secure low impedance and sufficient current capacity. Create an obtuse
angle at a corner or increase the number of vias to prevent the overload of current to corners and vias.
・At the secondary-side of the transformer, switching operation is conducted at a high voltage. If the parasitic capacity of
board (other transformers, current diodes, etc.) or the impedance is large, a large amount of energy is lost. Therefore, due
care should be taken in the design. Make the high-voltage path as short and as small as possible. Secure sufficient
distance between the board and the surrounding components and wiring to prevent a pressure burst.
●Important Cautions on PCB Layout Pattern around Transformer
When the VC pin becomes open due to the PCB layout pattern around the transformer, the capacitive coupling between the
SW pin and the VC pin may occur and noise superimposed on the VC pin voltage may lead to a false detection of the OFF
detection circuit, resulting in no functioning of SDP protection.
Lay out the SW pin and the VC pin so that they are not close to each other to prevent the effect of switching noise at the
boosting operation. In order to prevent a false detection error more securely, it is recommended that a capacitor of approx. 10
pF be connected to the VC pin relative to the GND.
See the recommended pattern as shown below.
［TOP Layer］
［Bottom Layer］
CVC
SW
GND
VC
Fig 48 PCB Layout Pattern
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TSZ22111・14・001
BD4234NUX
●Equivalent Circuit around Each Pin
Pin Name
Equivalent Circuit around Each Pin
Pin Name
START
Equivalent Circuit around Each Pin
VCC
10kΩ
100kΩ
PGND
10kΩ 90kΩ
GND
340kΩ 100kΩ
VCC
VCC
VCC
10kΩ
100kΩ
IGBT_OUT
IGBT_IN
10kΩ 90kΩ
10kΩ
340kΩ 100kΩ
VCC
VCC
1kΩ
1kΩ
GND
RADJ
FULL
SW
GND
VCC
VCC
VCC
30kΩ
900Ω
VC
30kΩ
VCC
VCC
22mΩ
200kΩ
PGND
Fig49 Equivalent Circuit around Each Pin
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TSZ22111・14・001
BD4234NUX
●Precautions for Use
◆Absolute Maximum Rating
Although we pay due attention to the quality control of these products, the possibility of deterioration or destruction may exist
when impressed voltage, operating temperature range, etc., exceed the absolute maximum rating. In addition, it is impossible
to assume a destructive situation, such as short circuit mode, open circuit mode, etc. If a special mode exceeding the
absolute maximum rating is assumed, please review to provide physical safety means such as fuse, etc.
◆GND Potential
Maintain the PGND pin potential at the minimum level under the operating conditions. Furthermore, maintain the pin except
the VC pin at a voltage higher than the PGND pin voltage including an actual transient phenomenon.
The SW pin sometimes is charged by a negative voltage depending on the characteristics of the external transformer.
If any change in or damage of electrical characteristics is suspected due to the SW pin being charged by a negative voltage,
it is recommended that a Schottky diode should be connected between the SW pin and the PGND pin.
◆Thermal Design
Work out the thermal design with sufficient margin taking power dissipation (Pd) at the actual operation condition into
account.
◆Short Circuit between Pins and Incorrect Mounting
Sufficient caution is required for IC direction or displacement when installing IC on PCB. If IC is installed incorrectly, it may be
broken. Also, the threat of destruction may exist in short circuits caused by foreign object invasion between outputs or output
and GND of the power supply.
◆Common Impedance
When providing a power supply and GND wirings, give sufficient consideration to lowering common impedance, reducing
ripple (i.e. making thick and short wiring, reduction ripple by LC, etc.) as much as possible.
◆Test mode
If any voltage higher than the VCC pin voltage is applied to the CHARGE_ON pin, FLASH_ON pin, IGBT_EN pin and
I_PEAK pin, a test sequence is activated. Therefore, be sure to use at a voltage lower than the VCC pin voltage.
When you impress the voltage of 2/3 or more of the VCC terminal to RADJ terminal, and the voltage more than the VCC
terminal voltage to IGBT-_IN terminal, START terminal, it enters the sequence for the test. Therefore, please use it to be sure
to become a voltage below the above-mentioned voltage.
◆Protective circuit
The output circuit of this IC does not have a built-in protective circuit against abnormal conditions such as overcurrent
protection. Therefore, if a load exceeding the package allowable power supply is applied or a short circuit occurs, the IC may
be damaged. Before use, carefully design the circuit around the set.
◆IC Pin Input
This is the monolithic IC and has P+ isolation and P substrate for element isolation between each element. By the P layer and
N layer of each element, a P-N junction is formed and various parasitic elements are configured.
For example, in the case of a resistor and transistor being connected to a pin as shown in Fig.50
P-N junction operates as a parasitic diode when GND > (Pin A) in the case of the resistor, and when GND > (Pin B) in the
case of the transistor (NPN)
Also, a parasitic NPN transistor operates by the N layer of another element adjacent to the previous diode in the case of a
transistor (NPN) when GND > (Pin B).
The parasitic element consequently emerges through the potential relationship because of IC’s structure. The parasitic
element pulls interference out of the circuit which may be the cause of malfunction or destruction. Therefore, excessive
caution is required to avoid operation of the parasitic element which is caused by applying voltage to an input pin lower than
GND (P board), etc.
Resistor
Transistor (NPN)
B
（Pin A）
（Pin B）
C
E
GND
N
P
P+
P+
P+
P+
P
N
N
N
N
N
N
P substrate
P substrate
GND
GND
Parasitic element
（Pin A）
Parasitic
（Pin B）
C
B
Parasitic element
E
GND
GND
Parasitic
Fig 50 Other adjacent elements
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TSZ22111・14・001
BD4234NUX
◆VC pin minus voltage
When Power transistor is active, VC pin occur minus voltage with formula (2) at figure 34etween B to C page12.Please
set up transformer ratio not to over absolute voltage -0.6V.
◆SW pin AC pulse input voltage
Please set up to transformer ratio not to reach 53V AC pulse of SW pin voltage.
◆SW pin minus voltage
When transformer secondary side current is discharged, discharge current is not zero at FRD recovery time. SW pin minus
voltage is occurred by SW pin minus current that is occurred by transformer ratio. (fig 51→Ⓑ、Ⓓ→Ⓔ、Ⓖ→Ⓗ、Ⓙ→Ⓚ)。
Please set up SW pin minus voltage is not under -1.5V because it might cause malfunction of IC.
START
V(SW)
0VA
I(SW)
0A
トランス
2次側
電流
0A
G
H
I
J
K
A
B
C
D
E
F
Fig 51SW pin minus voltage
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TSZ22111・14・001
BD4234NUX
●Heat reduction characteristics
Reduced by
mW/°C at Ta=25°C or more
12.32
1.8
1.6
1.4
1.2
1
Pd(W)
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
Ta(℃)
Fig 52Heat redu ction characteristics (VSON010V3020)
●Ordering Information
B
D
4
2
3
4
N
U
X
-
E2
Package
NUX:
Packaging and forming specification
E2: Embossed tape and reel
VSON010X3020
●Package and Marking Diagram
B D 4 2
3 3 N U
□□□□
Lot No.
Fig 53 Selecting a model name when ordering.
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26
Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipment (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.) ; or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
Rev.004
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3. The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
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