BD3486FS-E2 [ROHM]
Tone Control Circuit, 4 Channel(s), BICMOS, PDSO32, ROHS COMPLIANT, SSOP-32;型号: | BD3486FS-E2 |
厂家: | ROHM |
描述: | Tone Control Circuit, 4 Channel(s), BICMOS, PDSO32, ROHS COMPLIANT, SSOP-32 信息通信管理 光电二极管 商用集成电路 |
文件: | 总17页 (文件大小:1365K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TECHNICAL NOTE
Sound Processor Series for Car Audio
Sound Processors
with Built-in 3-band Equalizer
BD3484FS, BD3485FS, BD3486FS
●Description
BD3484FS, BD3485FS, BD3486FS are sound processors built-in 3-band equalizer and subwoofer-outputs for car audio.
The Functions are stereo 4ch input selector, input-gain control, main volume, 3-band parametric equalizer, 6ch fader
volume. Moreover, “Advanced switch circuit”, that is ROHM original technology, can reduce various switching noise (ex.
No-signal, low frequency likes 20Hz & large signal inputs). “Advanced switch” makes control of microcomputer easier, and
can construct high quality car audio system.
●Feature
1) Standardizing I2C BUS resistor map of BD348X-series can make almost of program on microcomputer common.
2) Standardizing pin configuration of BD348X-series can make PCB common.
3) Reduce the switching noise of Main volume, Fader volume, Bass, Middle, Treble, Loudness(BD3484FS), Super
bass(BD3485FS), Effect(BD3486FS) gain and attenuation by using advanced switch circuit(. Possible to control all
steps.)
4) Decrease the number of external parts by built-in 3-band equalizer filter and low-pass filter for subwoofer.
Possible to control Bass, Treble, Middle and LPF equalizer freely.
5) Built-in operational amplifier for Loudness. Possible to control gain setting. (BD3484FS)
6) Built-in operational amplifier for Super Bass function. Possible to control gain setting. (BD3485FS)
7) Built-in operational amplifier for Effect function. Possible to control gain setting. (BD3486FS)
8) It is equipped with output terminals of Subwoofer. Moreover, the stereo signal of the front and rear, too, can be
output by the I2C BUS control.
9) It is possible for the bass, middle, treble to correspond to the simple loudness, too, with the gain adjustment
quantity of ±20dB and 1 dB step gain adjustment.
10) Built-in level meter (BD3485FS), 7-band spectrum analyzer (BD3486FS) making music more visible.
11) Bi-CMOS process
12) Built-in ground isolation amplifier inputs, ideal for external stereo input.
13) Package of these LSI is SSOP-A32. Putting input-terminals together and output-terminals together can make PCB
layout easier and can makes area of PCB smaller.
14) It is possible to control by 3.3V / 5V for I2C BUS and 2 wire serial controller.
●Use
It is suitable for car audio specially, audio equipment of mini Compo, micro-Compo, DVD, TV etc with all kinds.
May 2007
●Product lineup
Item
Loudness
BD3484FS
BD3485FS
BD3486FS
○
―
―
―
―
―
○
―
○
―
―
―
○
―
○
Super bass
Effect
Level meter
Spectrum analyzer
○ : Built-in
― : Not built-in
※ BD3484FS/BD3485FS/BD3486FS are compatiable for pin configuration of power supply pin,
gnd pin, control pins. The package of BD3484FS / BD3485FS / BD3486FS is SSOP-A32.
●Absolute Maximum Ratings (Ta=25℃)
Item
Symbol
VCC
VIN
Limits
10.0
Unit
V
Impressed Voltage
Input voltage
VCC+0.3~GND-0.3
950 ※1
V
Power Dissipation
Storage Temperature
Pd
mW
℃
Tastg
-55~+150
※1 At Ta=25°C or higher, this value is decreaced to 7.6 mW/°C. Thermal resistance θja=131.6℃.
When Rohm standard board is mounted.
Rohm standard board: size: 70×70×1.6 (mm3) Material: FR4 glass-epoxy substrate (copper foil area: less than 3%).
●Operating Range
Item
Symbol
VCC
Min.
7.0
Typ.
-
Max.
9.5
Unit
V
Power supply voltage
Temperature
Topr
-40
-
+85
℃
※ Design against radiation-proof isn’t made.
2/16
●Electrical Characteristic
(Unless specified particularly, Ta=25℃, VCC=8.5V, f=1kHz, Vin=1Vrms, Rg=600Ω, RL=10kΩ, A input, Input gain 0dB,
Mute off, Volume 0dB, Tone 0dB, Loudness 0dB(BD3484FS), Super Bass 0dB(BD3485FS),Effect 0dB(BD3486FS)
Fader Volume 0dB)
Limits
Unit
Condition
Item
Symbol
Min
Typ
36
Max
50
BD3484FS
Current Upon
no signal
-
VIN=0Vrms
IQ
mA
BD3485FS
BD3486FS
37
0
Gv=20log(VOUT/VIN)
CB = GV1-GV2
Voltage gain
GV
-1.5
-1.5
1.5
1.5
dB
dB
Channel balance
0
CB
BD3484FS
BD3485FS
BD3486FS
BD3484FS
BD3485FS
BD3486FS
BD3484FS
BD3485FS
BD3486FS
Total harmonic
distortion
0.007
VOUT=1Vrms
BW=400-30KHz
-
-
-
%
0.05
25
THD+N
0.005
10.5
Output noise
Rg = 0Ω
BW = IHF-A
μVrms
VNO
voltage *
9
Residual
Fader = -∞dB
2.5
μVrms Rg = 0Ω
VNOR
CTC
10
output noise
voltage *
BW = IHF-A
2
Rg = 0Ω
CTC=20log(VOUT/VIN)
BW = IHF-A
f=100Hz
VRR=100mVrms
RR=20log(VOUT/VIN)
Cross-talk between channels *
-
-
-100
-90
-40
dB
Ripple rejection
RR
RIN
VIM
-70
100
2.3
dB
kΩ
Input impedance(A, B, C)
Maximum input voltage(A, B, C)
70
130
VIM at THD+N(VOUT)=1%
BW=400-30KHz
-
2.1
Vrms
Rg = 0Ω
Cross-talk between selectors *
Minimum input gain
-
-2
CTS=20log(VOUT/VIN)
BW = IHF-A
CTS
-100
0
-90
+2
22
dB
dB
dB
Input gain 0dB
VIN=100mVrms
Gin=20log(VOUT/VIN)
GIN MIN
Input gain 20dB
VIN=100mVrms
Gin=20log(VOUT/VIN)
Maximum input gain
GIN MAX
18
20
GAIN=0~+20dB
GAIN=+1~+20dB
-
-2
-
+2
Step resolution
GIN STEP
GIN ERR
RIN
1
0
dB
dB
Gain set error
Input impedance(DP, DN)
200
250
325
KΩ
VIM at THD+N(VOUT)=1%
BW=400-30KHz
Maximum input voltage
Voltage gain
VIM
2.1
2.3
0
-
Vrms
dB
GVDIF
-1.5
1.5
Gv=20log(VOUT/VIN)
DP1 and DN input
DP2 and DN input
CMRR=20log(VIN/VOUT)
BW = IHF-A
Common mode rejectiom ratio * CMRR
50
65
-
dB
dB
BD3484FS
Mute
Mute ON
Gmute=20log(VOUT/VIN)
BW = IHF-A
-100
-105
attenuation
*
GMUTE
-
-85
BD3485FS
BD3486FS
3/16
Volume = +15dB, VIN=100mVrms
Gv=20log(VOUT/VIN)
Maximum gain
GV MAX
+13
+15
+17
-85
dB
dB
Volume = -∞dB
Gv=20log(VOUT/VIN), BW = IHF-A
Maximum attenuation *
GV MIN
-
-100
Step resolution
GV STEP
GV ERR
-
-2
-2
-3
-4
1
0
0
0
0
-
2
dB
dB
dB
dB
dB
GAIN & ATT=+15dB~-79dB
GAIN=+1~+15dB
Gain set error
Attenuation set error 1
Attenuation set error 2
Attenuation set error 3
GV ERR1
GV ERR2
GV ERR3
2
ATT=-1dB~-15dB
3
ATT=-16dB~-47dB
ATT=-48dB~-79dB
4
Gain=+20dB,VIN=100mVrms
GB=20log (VOUT/VIN)
Maximum boost gain
Maximum cut gain
18
20
22
dB
dB
GB BST
GB CUT
Gain=-20dB, VIN=1Vrms
GB=20log (VOUT/VIN)
-22
-20
-18
Step resolution
Gain set error
GB STEP
GB ERR
fB1
fB2
-
1
0
-
dB
dB
Gain=-20~+20dB
Gain=-20~+20dB
-2
2
-
-
-
-
-
-
-
-
60
80
-
-
-
-
-
-
-
-
Gain=-20~+20dB
Gain=-20~+20dB
Center frequency
Quality factor
Hz
fB3
100
120
0.5
1
fB4
QB1
QB2
QB3
QB4
-
1.5
2.0
Gain=+20dB, VIN=100mVrms
GB=20log (VOUT/VIN)
Maximum boost gain
Maximum cut gain
18
20
22
dB
dB
GM BST
Gain=-20dB,VIN=1Vrms
GB=20log (VOUT/VIN)
-22
-20
-18
GM CUT
GM STEP
GM ERR
fM1
fM2
Step resolution
Gain set error
-
1
0
-
dB
dB
Gain=-20~+20dB
Gain=-20~+20dB
-2
2
-
-
-
-
-
-
-
-
500
1k
-
-
-
-
-
-
-
-
Gain=-20~+20dB
Gain=-20~+20dB
Center frequency
Quality factor
Hz
fM3
1.5k
2.5k
0.75
1
fM4
QM1
QM2
QM3
QM4
-
1.25
1.5
Gain=+20dB, VIN=100mVrms
GB=20log (VOUT/VIN)
Maximum boost gain
Maximum cut gain
17
20
23
dB
dB
GT BST
GT CUT
Gain=-20dB, VIN=1Vrms
GB=20log (VOUT/VIN)
-23
-
-20
1
-17
-
Step resolution
Gain set error
dB
dB
Gain=-20~+20dB
Gain=-20~+20dB
GT STEP
GT ERR
fT1
-2
-
0
2
-
7.5k
10k
fT2
fT3
-
-
-
-
Gain=-20~+20dB
Gain=-20~+20dB
Center frequency
Hz
12.5k
15k
0.75
1.25
fT4
QT1
QT2
fC1
-
-
-
-
-
-
-
-
Quality factor
-
80
Cut-off frequency
Hz
fC2
fC3
-
-
120
160
-
-
4/16
Maximum output voltage
VL MAX
VL OFF
2.9
-
3.3
0
3.5
50
V
Output offset voltage
mV
Maximum output voltage 1(EQ1~6)
VIN=2.3Vrms, EQ1~EQ6
VS MAX1
VS MAX2
VS OFF
2.8
2.5
-
3.1
2.7
0
3.3
3.3
50
V
V
VIN=2.3Vrms, EQ7
Maximum output voltage 2 (EQ7)
Output offset voltage
BD3484FS
mV
No signal
21
23
25
Gain=23dB (BD3484FS)
Gain=15dB (BD3485/86FS)
VIN=100mVrms
Maximum gain
dB
BD3485FS
BD3486FS
GF BST
13
15
17
GF=20log(VOUT/VIN)
Fader = -∞dB
Maximum attenuation *
-
GF=20log(VOUT/VIN)
BW = IHF-A
GF BST
GF STEP
GF ERR
-100
-90
dB
Gain & ATT=+15~-79dB
-
-
Step resolution
Gain set error
1
0
dB
dB
Gain=+1~+23dB (BD3484FS)
Gain=+1~+15dB (BD3485/86FS)
-2
2
Attenuation set error 1
Attenuation set error 2
Attenuation set error 3
Output impedance
ATT=-1~-15dB
GF ERR1
GF ERR2
GF ERR3
ROUT
-2
-3
-4
-
2
0
0
2
3
dB
dB
ATT=-16~-47dB
ATT=-48~-79dB
VIN=100mVrms
0
4
dB
-
2.2
Ω
50
-
THD=1%, BW=400-30KHz
VOM
Vrms
Maximum output voltage
Gain=-20dB, VIN=100mVrms
GL=20log(VOUT/VIN)
GL MAX
-23
-20
-17
dB
Maximum attenuation
Step resolution
Gain=0~-10dB
Gain=-10~-20dB
Gain=-1~-20dB
-
-
2
GL STEP1
GL STEP2
GL ERR
-
-
-2
1
2
0
dB
dB
dB
Gain set error
Maximum gain
Gain=+20dB, VIN=100mVrms
GE=20log(VOUT/VIN)
GE MAX
17
20
23
dB
Gain=0~+10dB
Gain=+10~+20dB
Gain=+1~+20dB
-
-
2
GE STEP1
GE STEP2
GE ERR
-
-
-2
1
2
0
dB
dB
dB
Step resolution
Gain set error
Maximum gain
Gain set error
Gain 15dB
VIN=100mVrms, f=20kHz
GE=20log(VOUT/VIN)
GE MAX
GE ERR
13
15
0
17
2
dB
dB
Gain=+1~+15dB, f=20KHz
-2
TM1
TM2
-
-
-
-
-
-
-
-
-
-
-
-
0.6
1.0
-
-
-
-
-
-
-
-
-
-
-
-
Advanced switch ON
Advanced switch time of Mute
msec
TM3
1.4
TM4
3.2
TVS1
TVS2
TVS3
TVS4
TVS5
TVS6
TVS7
TVS8
4.7
11.2
14.4
19.7
25.7
30.3
42.0
53.5
Advanced switch time of Volume,
Fader, Tone control gain and att.
Advanced switch ON
msec
※VP-9690A(Average value detection, effective value display) filter by Matsushita Communication is used for * measurement.
※Phase between input / output is same.
5/16
●Timing chart
Electrical specifications and timing for bus lines and I/O stages
SDA
tBUF
tHD;STA
tF
tSP
tR
tLOW
SCL
tSU;STO
tSU;STA
tHD;STA
tSU;DAT
tHD;DAT
tHIGH
Sr
S
P
P
Fig.1 Definition of timing on the I2C-bus
Table 1 Characteristics of the SDA and SCL bus lines for I2C-bus devices
Item
Fast-mode I2C-bus
Symbol
Unit
Min.
0
Max.
400
kHz
1
2
SCL clock frequency
fSCL
tBUF
Bus free time between a STOP and START condition
1.3
0.6
-
μS
Hold time (repeated) START condition. After this period, the first
clock pulse is generated
3
tHD;STA
-
μS
4
5
6
7
8
9
LOW period of the SCL clock
tLOW
tHIGH
tSU;STA
tHD;DAT
tSU; DAT
tR
1.3
0.6
-
-
μS
μS
μS
μS
ns
HIGH period of the SCL clock
Set-up time for a repeated START condition
Data hold time:
0.6
-
0*
-
Data set-up time
100
20+Cb
20+Cb
0.6
-
Rise time of both SDA and SCL signals
300
300
-
ns
10 Fall time of both SDA and SCL signals
11 Set-up time for STOP condition
tF
ns
tSU;STO
Cb
μS
pF
12 Capacitive load for each bus line
-
400
All values referred to VIH min. and VIL max. Levels (see Table 2).
* A device must internally provide a hold time of at least 300 ns for the SDA signal (referred to the VIH min. of the SCL signal) in order to
bridge the undefined region of the falling edge of SCL.
Table 2 Characteristics of the SDA and SCL I/O stages for I2C-bus devices
Fast-mode devices
Item
Symbol
Unit
Min.
-0.5
Max.
1
LOW level input voltage : fixed input levels
HIGH level input voltage : fixed input levels
Hysterics of Schmitt trigger inputs : fixed input levels
V
V
13
14
15
VIL
VIH
2.3
n/a
0
-
n/a
50
Vhys
Tsp
V
16 Pulse width of spikes which must be suppressed by the input filter.
ns
V
LOW level output voltage (open drain or open collector):
17
VOL1
0
0.4
at 3mA sink current
20+0.1Cb
*1)
250
Output fall time from VIHmin. to VIHmax. with a bus capacitance
from 10 pF to 400pF : with up to 3mA sink current at VOL1
18
tOF
ns
*2)
Input current each I/O pin with an input voltage between 0.4V and
0.9 VDDmax.
19
Ii
-10
10
10
μA
Capacitance for each I/O pin.
20
Ci
-
pF
n/a = not applicable
1) maximum VIH=VDDmax+0.5V , VDDMAX=5.5V
2) Cb = capacitance of one bus line in pF.
3) Note that the maximum tF for the SDA and SCL bus lines quoted in Table 1 (300ns) is longer than the specified maximum tOF for
the output stages (250ns). This allows series protection resistors (Rs) to be connected between the SDA/SCL pins and the
SDA/SCL bus lines as shown in Fig. 1 without exceeding the maximum specified tF.
6/16
●CONTROL SIGNAL SPECIFICATION (BD3484FS)
Data
Select
Address
(hex)
MSB
Data
LSB
Item
Initial Setup 1
Initial Setup 2
D7
D6
D5
D4
D3
D2
D1
D0
Advanced
switch
ON/OFF
Advanced switch time of
Volume/Fader/Tone/Loudness
Advanced switch time of
Mute
01
02
0
0
Subwoofer Output
0
0
0
0
0
0
Subwoofer LPF fc
Input Selector
Selector
04
06
0
0
0
0
0
Input Selector
Input gain
Mute
ON/OFF
Input Gain
20
28
29
2A
2B
2C
2D
Volume Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Volume gain
Fader 1ch Front
Fader 2ch Front
Fader 1ch Rear
Fader 2ch Rear
Fader 1ch Sub
Fader 2ch Sub
41
44
0
0
0
0
Bass fo
0
0
0
0
Bass Q
Bass setup
Middle fo
Treble fo
Middle Q
Middle setup
47
51
54
57
0
0
0
0
0
0
0
0
Treble Q
Treble setup
Bass gain
Bass
Boost/Cut
0
0
0
Bass Gain
Middle Gain
Treble Gain
Middle
Boost/Cut
Middle gain
Treble gain
Treble
Boost/Cut
Loudness
75
80
0
1
0
0
0
0
0
0
Loudness Attenuation
attenuation
Test Mode 1
0
0
0
1
F0
F1
F2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Test Mode 2
FE
1
0
0
0
0
0
0
1
System Reset
※In function changing of the hatching part, it works advanced switch.
Slave address
MSB
LSB
A6
A5
0
A4
0
A3
0
A2
0
A1
0
A0
R/W
80H
1
0
0
※Please refer to『BD3484FS User’s Manual for I2C BUS communication』about the detail of control signal specification.
7/16
●CONTROL SIGNAL SPECIFICATION (BD3485FS)
Data
Select
Address
(hex)
MSB
Data
LSB
Item
D7
D6
D5
D4
D3
D2
D1
D0
Advanced
switch
ON/OFF
Advanced switch time of
Volume/Fader/Tone/
Super Bass
Advanced switch time of
Mute
01
02
0
0
Initial Setup 1
Initial Setup 2
Subwoofer Output
Selector
0
0
0
0
0
0
Subwoofer LPF fc
Input Selector
04
06
0
0
0
0
0
Input Selector
Input gain
Mute
ON/OFF
Input Gain
20
28
29
2A
2B
2C
2D
Volume Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Volume gain
Fader 1ch Front
Fader 2ch Front
Fader 1ch Rear
Fader 2ch Rear
Fader 1ch Sub
Fader 2ch Sub
41
44
0
0
0
0
Bass fo
0
0
0
0
Bass Q
Bass setup
Middle fo
Treble fo
Middle Q
Middle setup
47
51
54
0
0
0
0
0
0
0
Treble setup
Bass gain
Treble Q
Bass
0
0
Bass Gain
Middle Gain
Treble Gain
Boost/Cut
Middle
Middle gain
Boost/Cut
Treble
57
75
0
0
0
0
Treble gain
Boost/Cut
0
0
Super Bass Gain
Super Bass Gain
0
1
80
0
0
0
0
0
1
Test Mode 1
F0
F1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Test Mode 2
F2
FE
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
System Reset
※In function changing of the hatching part, it works advanced switch.
Slave address
MSB
LSB
A6
A5
0
A4
0
A3
0
A2
0
A1
0
A0
R/W
80H
1
0
0
※Please refer to『BD3485FS User’s Manual for I2C BUS communication』about the detail of control signal specification.
8/16
●CONTROL SIGNAL SPECIFICATION (BD3486FS)
Data
Select
Address
(hex)
MSB
Data
LSB
Item
D7
D6
D5
D4
D3
D2
D1
D0
Advanced
switch
ON/OFF
Advanced switch time of
Volume/Fader/Tone/Effect
Advanced switch time of
Mute
01
02
0
0
Initial Setup 1
Initial Setup 2
Subwoofer Output
Selector
0
0
0
0
0
0
Subwoofer LPF fc
Input Selector
04
06
0
0
0
0
0
Input Selector
Input gain
Mute
ON/OFF
Input Gain
20
28
29
2A
2B
2C
2D
Volume Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Fader Gain / Attenuation
Volume gain
Fader 1ch Front
Fader 2ch Front
Fader 1ch Rear
Fader 2ch Rear
Fader 1ch Sub
Fader 2ch Sub
41
44
0
0
0
0
Bass fo
0
0
0
0
Bass Q
Bass setup
Middle fo
Treble fo
Middle Q
Middle setup
47
51
54
0
0
0
0
0
0
0
Treble Q
Treble setup
Bass gain
Bass
Boost/Cut
0
0
Bass Gain
Middle Gain
Treble Gain
Middle
Boost/Cut
Middle gain
Treble
Boost/Cut
57
75
0
0
0
0
Treble gain
0
1
0
0
Effect Gain
Effect Gain
80
0
0
0
0
0
1
Test Mode 1
F0
F1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Test Mode 2
FE
1
0
0
0
0
0
0
1
System Reset
※In function changing of the hatching part, it works advanced switch.
Slave address
MSB
LSB
A6
A5
0
A4
0
A3
0
A2
0
A1
0
A0
R/W
80H
1
0
0
※Please refer to『BD3486FS User’s Manual for I2C BUS communication』about the detail of control signal specification.
9/16
●Application Circuit Diagram (BD3484FS)
FIL
GND
OUTR2
4.7μ
SDA
SCL
MUTE
VCC
OUTF1
4.7μ
OUTF2
4.7μ
OUTR1
4.7μ
OUTS1
4.7μ
OUTS2
4.7μ
ADJ
10μ
1μ
1μ
1μ
2.2k
33k
(±1%)
10μ
0.1μ
22
21
20
19
18
17
32
31
30
29
28
27
26
25
24
23
INF1
INF2
INR1
VCO
30k
30k
30k
I2C BUS LOGIC
VCC
VCC/2
・LPF : fc=80/120/160Hz, OFF
・Fader Volume : +23dB~-79dB/1dB step, -∞
・Loudness : +0~-10dB/1dB step, -10~-20dB/2dB step
・Volume : +15dB~-79dB/1dB step, -∞
・Volume1 : +15dB~-24dB/1dB step
・Volume2 : 0~-55(-24~-79)dB/1dB step, -∞
LPF
・Tone : ±20dB/1dB step
・Bass : fo=60/80/100/120, Q=0.5/1/1.5/2
・Middle : fo=500/1k/1.5k/2.5k, Q=0.75/1/1.25/1.5
・Treble : fo=7.5k/10k/12.5k/15k, Q=0.75/1.25
・Input Gain : +20~0dB/1dB step
1st order LPF
Volume2
Treble/ Bass/Middle
2nd order LPF
Volume1 / Mute
Input Gain
Loudness
Input Selector
Buffered
Diff amp
Buffered
Diff amp
30k
100k
100k
100k
100k
100k
100k
VOUT2
VOUT1
250k
250k
250k
LOUT1
LOUT2
INR2
8
9
10
11
1
2
3
4
5
6
7
12
13
14
15
16
56k
56k
1μ
1μ
1μ
1μ
1μ
1μ
10μ
10μ
10μ
4.7μ
4.7μ
1μ
1000p 4.7k
4.7k 1000p
4.7k
4.7k
A1
A2
B1
B2
DP1
C1
C2
DN
DP2
0.047μ
0.047μ
Unit
Fig.2 Application Circuit Diagram(BD3484FS)
Terminal Terminal
R : [Ω]
C : [F]
●Descriptions of terminal
Terminal Terminal
Description
Description
No.
Name
No.
Name
1
A1
A input terminal of 1ch
A input terminal of 2ch
B input terminal of 1ch
B input terminal of 2ch
17
INR1
Rear input terminal of 1ch
Front input terminal of 2ch
Front input terminal of 1ch
2
3
4
A2
B1
B2
18
19
20
INF2
INF1
ADJ
Adjust terminal of VCO frequency
Subwoofer output terminal of 2ch
5
C1
C input terminal of 1ch
21
OUTS2
6
C2
DP1
DN
C input terminal of 2ch
22
23
24
25
26
27
28
29
30
31
32
OUTS1
OUTR2
OUTR1
OUTF2
OUTF1
VCC
Subwoofer output terminal of 1ch
Rear output terminal of 2ch
Rear output terminal of 1ch
Front output terminal of 2ch
Front output terminal of 1ch
Power supply terminal
7
D positive input terminal of 1ch
D negative input terminal
8
9
DP2
LIN2
D positive input terminal of 2ch
Loudness input terminal of 2ch
10
11
12
13
14
15
16
VOUT2 Volume output terminal of 2ch
VOUT1 Volume output terminal of 1ch
MUTE
SCL
External compulsory mute terminal
I2C Communication clock terminal
I2C Communication data terminal
Grounding terminal
LIN1
LOUT1
LOUT2
INR2
Loudness input terminal of 1ch
Loudness output terminal of 1ch
Loudness output terminal of 2ch
Rear input terminal of 2ch
SDA
GND
FIL
VCC/2 terminal
10/16
●Application Circuit Diagram (BD3485FS)
FIL
10μ
GND
OUTR1
4.7μ
OUTR2
4.7μ
OUTS1
4.7μ
OUTS2
LOUT
SDA
SCL
MUTE
VCC
OUTF1
4.7μ
OUTF2
4.7μ
ADJ
DATA
CLK
4.7
μ
2.2k
33k
(±1%)
10μ
0.1μ
22
21
20
19
18
17
32
31
30
29
28
27
26
25
24
23
DATA
CLK
SDA
SCL
MUTE
ADJ
LOUT
VCC
VCC/2
I2C BUS LOGIC
Level meter
・Volume2
・Treble
0~-55dB/1dB step, -∞
・fo=7.5k/10k/12.5k/15k
・Q=0.75/1.25
・Bass
・Gain=±20dB/1dB step
・fo=60/80/100/120
・Q=0.5/1/1.5/2
・Gain=±20dB/1dB step
・Fader Volume
+15dB~-79dB/1dB step,-∞
・Volume1
・+15dB~-24dB/1dB step
・LPF
fc=OFF, 80/120/160Hz
・Middle
・Input Gain
・0~+20dB/1dB step
・fo=500/1k/1.5k/2.5kHz
・Q=0.75/1.0/1.25/1.5
・Gain=±20dB/1dB step
・Super Bass
0~+10dB/1dB step
+10~+20dB/2dB step
LPF
Volume2
1st order LPF
Treble/Bass/Middle
2nd order LPF
Volume1 / Mute
Input Gain
Input Selector
SUPER BASS
Buffered
Diff amp
Buffered
Diff amp
100k
100k
100k
100k
100k
100k
250k
250k
250k
8
9
10
11
1
2
3
4
5
6
7
12
13
14
15
16
1μ
1μ
1μ
1μ
μ
μ
10μ
μ
1
1
10
10
μ
A1
A2
B1
B2
C1
C2
DP1
DN
DP2
Unit
Fig.3 Application Circuit Diagram(BD3485FS)
Terminal Terminal
R : [Ω]
C : [F]
●Descriptions of terminal
Terminal Terminal
Description
Description
No.
Name
No.
Name
1
A1
A input terminal of 1ch
A input terminal of 2ch
B input terminal of 1ch
B input terminal of 2ch
17
CLK
Clock terminal for Level meter
Data terminal for Level meter
Output terminal for Level meter
Adjust terminal of VCO frequency
2
3
4
A2
B1
B2
18
19
20
DATA
LOUT
ADJ
5
C1
C input terminal of 1ch
21
OUTS2
Subwoofer output terminal of 2ch
6
C2
DP1
C input terminal of 2ch
22
23
24
25
26
27
28
29
30
31
32
OUTS1
OUTR2
OUTR1
OUTF2
OUTF1
VCC
Subwoofer output terminal of 1ch
Rear output terminal of 2ch
Rear output terminal of 1ch
Front output terminal of 2ch
Front output terminal of 1ch
Power supply terminal
7
D positive input terminal of 1ch
D negative input terminal
8
DN
9
DP2
D positive input terminal of 2ch
Terminal 3 for Super Bass of 2ch
Terminal 1 for Super Bass of 2ch
Terminal 2 for Super Bass 2ch
BIAS terminal for Supper Bass
Terminal 2 for Super Bass of 1ch
Terminal 1 for Super Bass of 1ch
Terminal 3 for Super Bass 1ch
10
11
12
13
14
15
16
SB32
SB12
SB22
SBIAS
SB21
SB11
SB31
MUTE
SCL
External compulsory mute terminal
I2C Communication clock terminal
I2C Communication data terminal
Grounding terminal
SDA
GND
FIL
VCC/2 terminal
11/16
●Application Circuit Diagram (BD3486FS)
FIL
GND
OUTR2
4.7μ
SOUT
SDA
SCL
MUTE
VCC
OUTF1
4.7μ
OUTF2
4.7μ
OUTR1
4.7μ
OUTS1
4.7μ
OUTS2
4.7μ
ADJ
DATA
CLK
10μ
33k
(±1%)
2.2k
10μ
0.1μ
22
21
20
19
18
17
32
31
30
29
28
27
26
25
24
23
VCC
VCC/2
I2C BUS LOGIC
Spectrum Analyzer
・Volume2
0~-55dB/1dB step, -∞
・Treble
・fo=7.5k/10k/12.5k/15k
・Q=0.75/1.25
・Fader Volume
+15dB~-79dB/1dB step,-∞
・Bass
・fo=60/80/100/120
・Q=0.5/1/1.2
・Gain=±20dB/1dB step
・Volume1
・+15dB~-24dB/1dB step
・LPF
・Gain=±20dB/1dB step
fc=OFF, 80/120/160Hz
・Middle
・Input Gain
・0~+20dB/1dB step
・Effect
0~+15dB/1dB step
・fo=500/1k/1.5k/2.5kHz
・Q=0.75/1.0/1.25/1.5
・Gain=±20dB/1dB step
LPF
Volume2
1st order LPF
Treble/Bass/Middle
Volume1 / Mute
Input Gain
Input Selector
Buffered
Diff amp
Buffered
Diff amp
Effect
100k
100k
100k
100k
100k
100k
250k
250k
250k
8
9
10
11
1
2
3
4
5
6
7
12
13
14
15
16
1μ
1μ
1μ
1μ
1
1
10μ
10
10
μ
μ
μ
μ
A1
A2
B1
B2
DP1
C1
C2
DN
DP2
DS32
DS12
DS22
EBIAS
DS21
DS11
DS31
Unit
Fig.4 Application Circuit Diagram(BD3486FS)
R : [Ω]
C : [F]
●Descriptions of terminal
Terminal Terminal
Terminal Terminal
Description
Description
No.
Name
No.
17
Name
CLK
1
A1
A input terminal of 1ch
A input terminal of 2ch
B input terminal of 1ch
B input terminal of 2ch
Clock terminal for Spectrum Analyzer
Data terminal for Spectrum Analyzer
Output terminal for Spectrum Analyzer
Adjust terminal of VCO frequency
2
3
4
A2
B1
B2
18
19
20
DATA
SOUT
ADJ
5
C1
C input terminal of 1ch
21
OUTS2
Subwoofer output terminal of 2ch
6
C2
DP1
C input terminal of 2ch
22
23
24
25
26
27
28
29
30
31
32
OUTS1
OUTR2
OUTR1
OUTF2
OUTF1
VCC
Subwoofer output terminal of 1ch
Rear output terminal of 2ch
Rear output terminal of 1ch
Front output terminal of 2ch
Front output terminal of 1ch
Power supply terminal
7
D positive input terminal of 1ch
D negative input terminal
D positive input terminal of 2ch
Terminal 3 for Effect of 2ch
Terminal 1 for Effect of 2ch
Terminal 2 for Effect of 2ch
BIAS terminal for Effect
8
DN
9
DP2
10
11
12
13
14
15
16
DS32
DS12
DS22
EBIAS
DS21
DS11
DS31
MUTE
SCL
External compulsory mute terminal
I2C Communication clock terminal
I2C Communication data terminal
Grounding terminal
Terminal 2 for Effect of 1ch
Terminal 1 for Effect of 1ch
Terminal 3 for Effect of 1ch
SDA
GND
FIL
VCC/2 terminal
12/16
●Data
50
40
30
20
10
0
10
1
5
4
3
10kHz
1kHz
2
Gain=0dB
100Hz
1
0.1
0
-1
-2
-3
-4
-5
0.01
0.001
10
100
1k
10k
100k
0.001
0.01
0.1
1
10
0
1
2
3
4
5
6
7
8
9
10
SUPPLY VOLTAGE : VCC[V]
OUTPUT VOLTAGE : Vo[Vrms]
FREQUENCY :f [Hz]
Fig.5 QUIESCENT CURRENT VS
Fig.6 TOTAL HARMONIC DISTORTION
Fig.7 VOLTAGE GAIN VS
FREQUECY
SUPPLY VOLTAGE
VS OUTPUT VOLTAGE
25
20
15
10
5
25
15
5
25
Q : 0.5/1/1.5/2
BASS GAIN : ±20dB
fo : 100Hz
fo : 60/80/100/120Hz
BASS GAIN : ±20dB
Q : 0.5
BASS GAIN : -20~+20dB
20
/1dB step
fo : 100Hz
Q : 0.5
15
10
5
0
0
-5
-5
-5
-10
-15
-20
-25
-10
-15
-20
-25
-15
-25
10
100
1k
10k
100k
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY :f [Hz]
FREQUENCY :f [Hz]
FREQUENCY :f [Hz]
Fig.10 CMRR VS
Fig.9 BASS VOLTAGE GAIN VS
Fig.8 BASS VOLTAGE GAIN VS
FREQUENCY 1
FREQUENCY 3(Q VARIABLE)
25
FREQUENCY 2(fo VARIABLE)
25
25
15
5
MIDDLE GAIN :
±20dB
fo : 500/1k/1.5k/2.5kHz
MIDDLE GAIN :
±20dB
fo : 1kHz
Q : 0.75/1/1.25/1.5
MIDDLE GAIN :
-20~+20dB /1dB step
Q : 0.75
15
5
15
5
fo : 1kHz
Q : 0.75
-5
-5
-5
y
-15
-15
-25
-15
-25
-25
10
100
1k
10k
100k
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY :f [Hz]
FREQUENCY :f [Hz]
FREQUENCY :f [Hz]
Fig.12 MIDDLE VOLTAGE GAIN vs
Fig.13 MIDDLE VOLTAGE GAIN vs
FREQUENCY 3 (Q VARIABLE)
Fig.11 MIDDLE VOLTAGE GAIN vs
FREQUENCY 1
FREQUENCY 2(fo VARIABLE)
25
25
15
5
26
TREBLE GAIN : -20~+20dB
fo : 7.5k/10k/12.5k/15kHz
TREBLE GAIN : ±20dB
Q : 0.75/1.25
TREBLE GAIN : ±20dB
21
/1dB step
fo : 10kHz
Q : 0.75
Q : 0.5
fo : 10kHz
15
16
11
6
5
-5
1
-5
-4
-9
-15
-25
-15
-25
-14
-19
10
100
1k
10k
100k
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY :f [Hz]
FREQUENCY :f [Hz]
FREQUENCY :f [Hz]
Fig.14 TREBLE VOLTAGE GAIN VS
FREQUENCY 1
Fig.15 TREBLE VOLTAGE GAIN VS
FREQUENCY 2(fo VARIABLE)
Fig.16 TREBLE VOLTAGE GAIN VS
FREQUENCY 3(Q VARIABLE)
13/16
1000
100
10
100
10
1
1000
DIN-AUDIO
IHF-A
DIN-AUDIO
IHF-A
DIN-AUDIO
IHF-A
100
10
1
1
-20
-15
-10
-5
0
5
10
15
20
-80 -70 -60 -50 -40 -30 -20 -10
0
10 20
-20
-15
-10
-5
0
5
10
15
20
MIDDLE VOLTAGE GAIN :Gv [dB]
VOLUME ATTENUATION : ATT[dB]
BASS VOLTAGE GAIN : Gv[dB]
Fig.19 MIDDLE VOLTAGE GAIN VS
OUTPUT NOISE
Fig.17 VOLUME ATTENUATION VS
Fig.18 BASS VOLTAGE GAIN VS
OUTPUT NOISE
OUTPUT NOISE
1000
2.5
2.0
1.5
1.0
0.5
0.0
0
-20
-40
100
DIN-AUDIO
IHF-A
-60
10
-80
1
-100
10
100
1k
10k
100k
100
1000
10000
100000
-20 -15 -10 -5
0
5
10 15 20
LOAD RESISTANCE :RL [Ω]
FREQUENCY :f [Hz]
TREBLE VOLTAGE GAIN :Gv [dB]
Fig.20 TREBLE VOLTAGE GAIN VS
OUTPUT NOISE
Fig.22 LOAD RESISITANCE VS
Fig.21 CMRR VS
MAXIMUM OUTPUT VOLTAGE
FREQUENCY
10
SCL
SDA
SCL
SDA
1
OUTF1
OUTF1
0.1
OUTF2
OUTF2
0.01
0.01
0.1
1
10
INPUT LEVEL :Vin [V]
Fig.23 ADVANCED SWITCH
WAVEFORM 1
Fig.24 ADVANCED SWITCH
WAVEFORM 2
Fig.25 INPUT VOLTAGE VS
LEVEL METER OUTPUT
14/16
●About selecting components for application
About resistor of “ADJ” terminal (20pin)
This resistor desides oscillation frequency of VCO.
Please select a resistor that has low temperature coefficiency and high accuracy.
And, the value of this resistor changes center frequency of tone control and also changes advanced switch time.
Please refer to the following table.
(Reference data)
Radj:TYP
(33kΩ)
Radj:-18%
(27kΩ)
Block
Item
Unit
fB1
fB2
fB3
fB4
fM1
fM2
fM3
fM4
fc1
60
80
73
98
Bass
100
120
500
1 k
122
147
611
1.2k
1.8k
3.1k
98
Tone
Control
Middle
Hz
1.5 k
2.5 k
80
LPF
fc2
120
160
0.6
146
195
0.5
fc3
1
0.8
MUTE
Advanced switch time
1.4
1.1
3.2
2.6
4.7
3.8
11.2
14.4
19.7
25.7
30.3
42
9.2
ms
Volume
Tone control
Loudness (BD3484FS)
Super bass (BD3485FS)
Effect (BD3486FS)
Fader
11.8
16.1
21.0
24.8
34.3
43.8
Advanced switch time
53.5
●Cautions on use
(1) Numbers and data in entries are representative design values and are not guaranteed values of the items.
(2) Although we are confident in recommending the sample application circuits, carefully check their characteristics further
when using them. When modifying externally attached component constants before use, determine them so that they
have sufficient margins by taking into account variations in externally attached components and the Rohm LSI, not only
for static characteristics but also including transient characteristics.
(3) Absolute maximum ratings
If applied voltage, operating temperature range, or other absolute maximum ratings are exceeded, the LSI may be
damaged. Do not apply voltages or temperatures that exceed the absolute maximum ratings. If you think of a case in
which absolute maximum ratings are exceeded, enforce fuses or other physical safety measures and investigate how not
to apply the conditions under which absolute maximum ratings are exceeded to the LSI.
(4) GND potential
Make the GND pin voltage such that it is the lowest voltage even when operating below it. Actually confirm that the
voltage of each pin does not become a lower voltage than the GND pin, including transient phenomena.
(5) Thermal design
Perform thermal design in which there are adequate margins by taking into account the allowable power dissipation in
actual states of use.
(6) Shorts between pins and misinstallation
When mounting the LSI on a board, pay adequate attention to orientation and placement discrepancies of the LSI. If it is
misinstalled and the power is turned on, the LSI may be damaged. It also may be damaged if it is shorted by a foreign
substance coming between pins of the LSI or between a pin and a power supply or a pin and a GND.
(7) Operation in strong magnetic fields
Adequately evaluate use in a strong magnetic field, since there is a possibility of malfunction.
15/16
●Selection of order type
2
B D 3 4 8
F S - E
4
Package and forming specification
Part No.
BD3484FS
BD3485FS
BD3486FS
SSOP-A32
<Dimension>
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2000pcs
13.6 0.2
Direction
of feed
E2
32
17
16
(The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand)
1
0.15 0.1
0.1
0.8
0.36 0.1
Direction of feed
1pin
Reel
※When you order , please order in times the amount of package quantity.
(Unit:mm)
Catalog No.07T151A '07.5 ROHM © 1000 NZ
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any
means without prior permission of ROHM CO.,LTD.
The contents described herein are subject to change without notice. The specifications for the
product described in this document are for reference only. Upon actual use, therefore, please request
that specifications to be separately delivered.
Application circuit diagrams and circuit constants contained herein are shown as examples of standard
use and operation. Please pay careful attention to the peripheral conditions when designing circuits
and deciding upon circuit constants in the set.
Any data, including, but not limited to application circuit diagrams information, described herein
are intended only as illustrations of such devices and not as the specifications for such devices. ROHM
CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any
third party's intellectual property rights or other proprietary rights, and further, assumes no liability of
whatsoever nature in the event of any such infringement, or arising from or connected with or related
to the use of such devices.
Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or
otherwise dispose of the same, no express or implied right or license to practice or commercially
exploit any intellectual property rights or other proprietary rights owned or controlled by
ROHM CO., LTD. is granted to any such buyer.
Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices
(such as audio visual equipment, office-automation equipment, communications devices, electrical
appliances and electronic toys).
Should you intend to use these products with equipment or devices which require an extremely high level
of reliability and the malfunction of which would directly endanger human life (such as medical
instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers
and other safety devices), please be sure to consult with our sales representative in advance.
It is our top priority to supply products with the utmost quality and reliability. However, there is always a chance
of failure due to unexpected factors. Therefore, please take into account the derating characteristics and allow
for sufficient safety features, such as extra margin, anti-flammability, and fail-safe measures when designing in
order to prevent possible accidents that may result in bodily harm or fire caused by component failure. ROHM
cannot be held responsible for any damages arising from the use of the products under conditions out of the
range of the specifications or due to non-compliance with the NOTES specified in this catalog.
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