BD16933EFV-C [ROHM]
Automotive 3ch Half Bridge Driver;
| 型号： | BD16933EFV-C |
| 厂家： | 
ROHM |
| 描述： | Automotive 3ch Half Bridge Driver |
| 文件： | 总25页 (文件大小：2007K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet
Motor / Actuator Drivers for DC Brush Motor Series
Automotive 3ch Half Bridge Driver
with SPI Control
BD16933EFV-C
General Description
Key Specifications
The BD16933EFV-C is 3ch half bridge driver for
automotive applications. It can drive compact DC
brush motors directly and each output can be
controlled in three modes (High, Low and High
Impedance).
MCU can control the driver via 16bit Serial Interface
(SPI). The part is 60V rated with low ON resistance
packaged in compact HTSSOP-20 package, which
contributes to realize high reliability, low energy
consumption and low cost.
■
■
■
■
■
Supply Voltage
Operating Temperature Range
Output Current
Output ON Resistance (High Side)
Output ON Resistance (Low Side)
7V to 36V
-40°C to +125°C
1.0A (Max)
0.96Ω (Typ)
0.85Ω (Typ)
Package
W(Typ) x D(Typ) x H(Max)
6.50mm x 6.40mm x 1.00mm
HTSSOP-B20
Features
■
■
■
AEC-Q100 Qualified(Note 1)
1.0A DMOS Half Bridge 3 Circuits
Three Mode Output Control
(High, Low & High Impedance)
■
■
Low Standby Current
Built-in Protection Diode Against Output Reverse
Voltage
■
■
■
Over Current Detection(OCD)
Under Load Detection(ULD)
Over Voltage Protection
at Output Power Supply Stage(OVP)
■
Under Voltage Lock Out
at Output Power Supply Stage(UVLO)
Thermal Shut Down(TSD)
■
(Note1) Grade 2
Applications(Note 2)
Automotive Body Electronics, HVAC, Door Mirrors, etc.
Typical Application Circuit
VS
OUT1
BD16933EFVOUT2
OUT3
Voltage
Regulator
VCC
EN
CSB
SDI
Micro
controller
SCK
SDO
Figure 1. Typical Application Circuit
(Note 2) Please make sure you consult our company sales representative before mass production of this IC, if used other than Door Mirror and HVAC.
〇Product structure : Silicon monolithic integrated circuit 〇This product has no designed protection against radioactive rays
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BD16933EFV-C
Pin Configuration
AGND
TEST1
TEST2
NC
VCC
EN
1
2
3
4
5
6
7
8
20
19
18
CSB
SCK
SDI
17
16
THERMAL
PAD
( GND )
PGND
OUT1
OUT1
OUT2
OUT2
VS
15
SDO
14 PGND
13 OUT3
OUT3
VS
9
12
11
10
Figure 2. Pin Configuration
Pin Description
PIN No.
1
Symbol
AGND
Function
Small signal GND(Note 1)
PIN No.
20
Symbol
VCC
Function
Power supply
Enable input
2
3
4
5
6
7
8
9
TEST1
TEST2
NC
TEST1 input(Note 2)
TEST2 input(Note 2)
No Connection
19
18
17
16
15
14
13
12
EN
CSB
SPI chip select input
SPI clock input
SPI data input
SCK
PGND
OUT1
OUT1
OUT2
OUT2
Output GND
SDI
Half bridge output 1
Half bridge output 1
Half bridge output 2
Half bridge output 2
SDO
PGND
OUT3
OUT3
SPI data output
Output GND
Half bridge output 3
Half bridge output 3
Power supply at output
stage
Power supply at output
stage
10
VS
11
VS
(Note 1) Connect to PADGND for power dissipation.
(Note 2) Connect TEST1 and TEST2 to AGND
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BD16933EFV-C
Block Diagram
VCC
VS
Internal
Power
Supply
Power
On
Reset
Under
Voltage
Lockout
Over
Voltage
Protection
Thermal
Shutdown
EN
Driver
&
OUT1
OUT2
OUT3
Over Current Detect
&
Open/Underload Detect
VCC
SPI
&
Control
Logic
CSB
SCK
SDI
Driver
&
Over Current Detect
&
Open/Underload Detect
Driver
&
Over Current Detect
&
Open/Underload Detect
SDO
AGND
PGND
Figure 3. Block Diagram
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BD16933EFV-C
Absolute Maximum Ratings (Ta = 25°C)
Parameter
Symbol
Limit
-0.3 to +60
-0.3 to +7.0
-0.3 to +60
1.0
Unit
V
Power Supply Voltage
Driver Supply Voltage
Output Voltage
VVS
VCC
V
VOUT1 to VOUT3
V
Output Current(Note 1)
IO
A
Logic Input Voltage
VSDI, VSCK, VCSB, VEN
-0.3 to VCC+0.3
-0.3 to VCC+0.3
5.0
V
Logic Output Voltage
SDO Output Current
Operating Temperature Range
Storage Temperature Range
VSDO
ISDO
Topr
Tstg
Tj
V
mA
°C
°C
°C
-40 to +125
-55 to +150
-40 to +150
Junction Temperature Range
(Note 1) ASO should not be exceeded
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the
absolute maximum ratings.
Thermal Resistance(Note 2)
Thermal Resistance (Typ)
Parameter
Symbol
Unit
1 layer (Note 4)
4 layer (Note 5)
HTSSOP-B20
Junction to Ambient
Junction to Top Characterization Parameter(Note 3)
θJA
143.0
8
26.8
4
°C/W
°C/W
ΨJT
(Note 2) Based on JESD51-2A (Still-Air)
(Note 3) This thermal characterization parameter reports the difference between junction temperature and the temperature at the top center of the outside surface of
the component package.
(Note 4) Using a PCB board based on JESD51-3.
Layer Number of
Measurement Board
Material
FR-4
Board Size
Single
114.3mm x 76.2mm x 1.57mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70μm
(Note 5)Using a PCB board based on JESD51-5, 7.
Thermal Via(Note 6 )
Layer Number of
Material
Board Size
Measurement Board
Pitch
Diameter
4 Layers
FR-4
114.3mm x 76.2mm x 1.6mmt
2 Internal Layers
1.20mm
Φ0.30mm
Top
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
70μm
Footprints and Traces
70μm
74.2mm x 74.2mm
35μm
74.2mm x 74.2mm
(Note 6) This thermal via connects with the copper pattern of all layers.
Recommended Operating Conditions (Ta=-40°C to +125°C）
Parameter
Power Supply Voltage(Note 7)
Logic Supply Voltage (Note 7)
Logic Input Voltage(Note 7)
Symbol
VVS
Min
7
Typ
Max
36
Unit
V
12
5
VCC
3.0
5.5
V
VEN, VCSB, VSCK, VSDI
-0.3
-
VCC
V
(Note 7) In order to start operation, apply the voltage to VCC (Driver supply voltage) after VS (Power supply voltage) exceeds the minimum operating voltage range
(7V). After VCC (Driver supply voltage) exceeds the minimum operating voltage range (3.0V) then apply the voltage to the Logic input pins.
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BD16933EFV-C
Electrical Characteristics (Unless otherwise specified, VVS =7V to 36V, VCC = 3.0V to 5.5V, -40°C ≤Tj ≤+150°C)
Specification
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
Circuit Current
VS Circuit Current1
VS Circuit Current 2
VCC Circuit Current 1
VCC Circuit Current 2
Output
IVS1
IVS2
IVCC1
IVCC2
-
-
-
-
0
10
7
μA
mA
μA
EN = Low
3.5
0
10
0.5
EN = Low
0.1
mA
ILoad = 0.1A to 0.8A,
-40°C ≤ Tj < +25°C
ILoad = 0.1A to 0.8A,
25°C ≤ Tj ≤ 150°C
ILoad = 0.1A to 0.8A,
-40°C ≤ Tj <+ 25°C
ILoad = 0.1A to 0.8A,
25°C ≤ Tj ≤ 150°C
Output ON Resistance High Side 1
Output ON Resistance High Side 2
Output ON Resistance Low Side 1
Output ON Resistance Low Side 2
RONH1
RONH2
RONL1
RONL2
-
-
-
-
0.96
1.5
1.5
2.0
Ω
Ω
Ω
Ω
0.85
1.35
1.35
1.7
Output Leakage High Side
Output Leakage Low Side
Output Diode Voltage High Side
Output Diode Voltage Low Side
Serial Input
ILH
ILL
-
0
10
10
μA
μA
V
OUT1 to OUT3 = 0V
OUT1 to OUT3 = VVS
ILoad = 0.6A
-
0
VFH
VFL
0.2
0.2
0.8
0.8
1.4
1.4
V
ILoad = 0.6A
Input High Voltage
VIH
VIL
IIH1
IIH2
IIL1
IIL2
VCCx0.6
-
-
-
VCCx0.2
100
V
Input Low Voltage
-
-
-
-
-
V
Input High Current 1
Input High Current 2
Input Low Current 1
Input Low Current 2
Serial Output
50
0
μA
μA
μA
μA
VCC = SDI, SCK, EN = 5V
VCC = CSB = 5V
10
0
10
SDI, SCK, EN = 0V
CSB = 0V, VCC = 5V
50
100
Output High Voltage
Output Low Voltage
Protections
VOH
VOL
VCC-0.6
-
-
-
-
V
V
ILoad = -1.0mA
ILoad = 1.0mA
0.6
VS Under Voltage Detection
(OFF to ON)
VS Under Voltage Detection
(OFF to ON)
VUVDH
VUVDL
6.0
5.5
6.5
6.0
7.0
6.5
V
V
VS Over Voltage Detection (OFF to ON)
VS Over Voltage Detection (OFF to ON)
VCC Power On Reset (OFF to ON)
VCC Power On Reset (OFF to ON)
Over Current Detection
VOVPH
VOVPL
VPORH
VPORL
IOCD
45
40
50
45
55
50
V
V
2.6
2.4
1.05
10
2.8
2.6
1.5
25
3.0
2.8
1.95
50
V
V
A
Over Current Detection Delay Time
Under Load Detection
TDOC
IUD
μs
mA
μs
°C
°C
5
30
45
Under Load Detection Delay Time
Thermal Shutdown (Note 1)
Thermal Shutdown Hysteresis (Note 1)
TDUD
200
150
-
370
175
25
600
200
-
TTSD
TTSDHYS
(Note 1) Design guaranteed. Not tested at outgoing.
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BD16933EFV-C
Electrical Characteristics (Unless otherwise specified, VVS =7V to 36V, VCC = 3.0V to 5.5V, -40°C ≤Tj ≤+150°C)
Specification
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
Driver Output Timing
High Side Turn On Time
Low Side Turn On Time
OUT Rise Time
ttonLH
ttonHL
tLHR
-
-
-
-
-
33.0
33.0
8.0
μs
μs
μs
μs
VVS = 12V, No Load
VVS = 12V, No Load
VVS = 12V, No Load
VVS = 12V, No Load
-
1.0
1.0
OUT Fall Time
tHLF
8.0
CSB
tLHR
ttonLH
90%
OUT X
Low to High
10%
Figure 4. Driver Output Timing (Low to High)
CSB
tHLF
ttonHL
90%
OUT X
High to Low
10%
Figure 5. Driver Output Timing (High to Low)
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BD16933EFV-C
Electrical Characteristics (Unless otherwise specified, VVS =7V to 36V, VCC = 3.0V to 5.5V, -40°C ≤Tj ≤+150°C)
Specification
Parameter
Symbol
Unit
Conditions
Min
Typ
Max
Serial Peripheral Interface
SCK Frequency
fSCK
tSCK
-
-
-
-
-
-
4.1
MHz
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ns
SCK Period
243
80
80
125
125
125
125
20
60
60
-
-
-
-
-
SCK High Time
tSCKH
SCK Low Time
tSCKL
SCK Setup Time
tSCKSET
tSCKHLD
tCSBLEAD
tCSBLAG
tCSBH
SCK Hold Time
CSB Lead Time
-
-
-
-
-
-
-
-
-
CSB Lag Time
-
-
CSB High Time
SDI Setup Time
tSDISET
tSDIHLD
tSDOV
-
SDI Hold Time
-
SDO Valid Time
100
125
500
No Load
(Note 1)
(Note 1)
SDO Enable After CSB Falling Edge
SDO Disable After CSB Rising Edge
tSDOEN
tSDODE
-
-
(Note 1) the timing is prescribed in 0% and 100% of VCC-GND amplitude.
tCSBH
tCSBLEAD
tCSBLAG
0.6VVCC
0.2VVCC
tSCK
CSB
tSCKSET
tSCKH
tSCKL
tSCKHLD
0.6VVCC
0.2VVCC
SCK
SDI
tSDIHLD
tSDISET
0.6VVCC
0.2VVCC
MSB
14
1
LSB
tSDODE
tSDOV
tSDOEN
0.6VVCC
0.2VVCC
SDO
(TER=0)
High Impedance
X
X
MSB
14
1
LSB
High Impedance
High Impedance
tSDODE
tSDOEN
0.6VVCC
0.2VVCC
SDO
(TER=1)
High Impedance
X：Unstable state
TER (Internal signal):” 0” in normal operation /” 1” in detecting erroneous SPI transmission
Figure 6. Serial Interface Timing
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BD16933EFV-C
Typical Performance Curves
(Unless otherwise specified, VVS =7V to 36V, -40°C ≤Ta ≤+125°C)
1.5
1.2
0.9
0.6
0.3
0
1.5
1.2
0.9
0.6
0.3
0
Ta=125C
Ta=25C
Vvs=12V
Vvs=36V
Vvs=7V
Ta=-40C
Vcc=5V
TEST1=TEST2=0V
Vcc=5V
TEST1=TEST2=0V
0
0.2
0.4
0.6
0.8
1
0
0.2
0.4
0.6
0.8
1
Output Current [A]
Output Current [A]
Figure 7. Output On Resistance vs Output Current
(Output ON Resistance High Side, VVS = 12V)
Figure 8. Output On Resistance vs Output Current
(Output ON Resistance High Side, Ta=25C)
1.5
1.5
1.2
0.9
0.6
0.3
0
Ta=125C
1.2
0.9
0.6
0.3
0
Vvs=12V
Vvs=36V
Ta=25C
Ta=-40C
Vvs=7V
Vcc=5V
TEST1=TEST2=0V
Vcc=5V
TEST1=TEST2=0V
0
0.2
0.4
0.6
0.8
1
0
0.2
0.4
0.6
0.8
1
Output Current [A]
Output Current [A]
Figure 9. Output On Resistance vs Output Current
(Output ON Resistance Low Side, Vvs = 12V)
Figure 10. Output On Resistance vs Output Current
(Output ON Resistance Low Side, Ta=25C)
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BD16933EFV-C
Operation of Each Block
1. Serial Peripheral Interface: SPI
CSB
SCK
LSB
0
MSB
15
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
SDI
LSB
0
MSB
15
SDO
X
X
14
( TER=0 )
All "High"
SDO
( TER=1 )
X：Unstable state
TER (Internal signal) : ” 0 ” in normal operation / ” 1 ” in detecting erroneous SPI transmission
Figure 11. SPI Communication Format
16bit serial interface is equipped to control ON / OFF of driver and various protections as well as to read out the state of
protections. Input / Output register and its functions are described below.
(1) Input Data Register
Bit
Number
Initial
Value
Name
SRR
Description
Bit Status
Status Reset Register
( This bit will self clear )
0 : Normal
1 : Reset
15
14
13
12
11
10
9
0
0
0
0
0
0
0
0 : High side Off
1 : High side On
0 : Low side Off
1 : Low side On
0 : High side Off
1 : High side On
0 : Low side Off
1 : Low side On
0 : High side Off
1 : High side On
0 : Low side Off
1 : Low side On
-
HSC1
LSC1
HSC2
LSC2
HSC3
LSC3
Control High side 1
Control Low side 1
Control High side 2
Control Low side 2
Control High side 3
Control Low side 3
8
7
6
5
4
-
-
-
-
Not Used
Not Used
Not Used
Not Used
Not Used
0
0
0
0
0
-
-
-
-
-
UNDER
LOAD
0 :ON
1 : OFF
0 : Latch
1 : Through
0 : Latch
1 : Through
0 : Normal
1 : Prohibit
3
2
1
0
Under Loads Register Mode
TSDS Register Mode
OVPS / UVLOS Register Mode
RESERVE
0
0
0
0
TSDSTH
PSSTH
RESERVE
Input of High Side ON and Low Side ON via SPI control is prohibited. The input of High Side ON and Low Side ON
results in High Side OFF and Low Side ON state.
Daisy chain is not recommended due to its reliability concern. Connect Chip Select (CSB) to each device and run by SPI
parallel control instead.
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BD16933EFV-C
(2) Output Data Register
Bit
Initial
Name
Number
Description
Over Current Detection Status
High side 1 Status
Low side 1 Status
Bit Status
Value(Note 1)
0 : Normal
1 : Fault
15
14
13
12
11
10
9
OCDS
HSS1
LSS1
HSS2
LSS2
HSS3
LSS3
1 (Note 1)
0 : High side Off
1 : High side On
0 : Low side Off
1 : Low side On
0 : High side Off
1 : High side On
0 : Low side Off
1 : Low side On
0 : High side Off
1 : High side On
0 : Low side Off
1 : Low side On
-
0
0
0
0
0
0
High side 2 Status
Low side 2 Status
High side 3 Status
Low side 3 Status
8
7
6
5
4
-
-
-
-
Not Used
Not Used
Not Used
Not Used
Not Used
0
0
0
0
0
-
-
-
-
-
UNDER
LOADS
0 : Normal
1 : Fault
0 : Normal
1 : Fault
0 : Normal
1: Fault
0 : Normal
1 : Fault
3
2
1
0
Under Loads Status
Thermal Shutdown Status
Over Voltage Protection Status
UVLO ( VS ) Status
1 (Note 1)
1 (Note 1)
1 (Note 1)
1 (Note 1)
TSDS
OVPS
UVLOS
(Note 1) Default is ” 1 ( Fault ) “. Set SRR register “ 1 “ before use and reset the values.
Settings of Error Output Registers
Under Voltage
Lock Out
Over Voltage
Protection
OVPS
Over Current
Detection
OCDS
Thermal Shut Down
TSDS
< PSSTH , TSDSTH >
UVLOS
< 0 , 0 >
< 0 , 1 >
< 1 , 0 >
< 1 , 1 >
Latch
Latch
Latch
Latch
Latch
Latch
Latch
Latch
Latch
Self Recovery
Latch
Self Recovery
Self Recovery
Self Recovery
Self Recovery
Self Recovery
PSSTH, TSDSTH has to be set initially, and it shouldn‟t be changed in the middle of operation.
Either Latch or Self Recovery are selectable on UVLOS, OVPS and TSDS error output registers. Only Latch is available
on OCDS error output register.
(The registers control only the operation mode of error output registers. It cannot change the operation of OUT 1 to 3
terminals.)
Refer to the explanations of Protection Functions as far as OUT 1 to 3 operations are concerned.
(3) Erroneous SPI Transmission (Transmission Error : TER)
When CSB signal becomes Low to High it will be assumed that SPI has completed the transfer, and the internal registers
will be updated. When SCK inputs high pulse of 16, 24, 32, … (8+8xN values) while CSB is low, erroneous SPI
transmission is detected. If the error is detected, OUT1 to 3 outputs High Impedance and each error output register
(OCDS, TSDS, PSF and ULS) maintains the prior status accordingly. But SDO signal become high in the next
transferring of SPI by TER.
At the same time, if the CSB High period (tCSBH) goes below the specified 20μs, an erroneous SPI transmission can be
detected. The transmission error status is refreshed every time CSB rises.
TER (Internal signal) : ” 0 ” in normal operation / ” 1 ” in detecting erroneous SPI transmission
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BD16933EFV-C
2. Over Voltage Protection (OVP)
All outputs run into High impedance when VS terminal voltage goes up to or above 50V (Typ). OVPS register is set “1” in
this case.
The outputs come back when VS terminal voltage goes down to or below 45V (Typ) and return to the normal operation.
The state of output data register OVPS can be either Latch or Self Recovery depending on the state of input data register
PSSTH.
Input data register PSSTH=0 and output data register OVPS=1 for Latch. Input data register PSSTH=1 and output data
register OVPS for Self Recovery when VS terminal voltage goes down to or below 45V (Typ). OVP doesn‟t operate when
EN terminal is at Low level. Be sure not to exceed the absolute maximum power supply voltage to avoid the IC being
destroyed.
50V(Typ)
45V(Typ)
VS
Operating
OUT1/2/3
High Impedance
High
PSSTH=0
PSS Error Bit(OVPS)
Low
High
Low
PSSTH=1
PSS Error Bit(OVPS)
Normal
Protection
Normal
Figure 12. OVP Timing Chart
3. Under Voltage Lock Out (UVLO)
All outputs run into High impedance when VS terminal voltage goes down to or below 6.0V (Typ). UVLOS register is set “1”
in this case. Outputs come back when VS terminal voltage goes up to or above 6.5V (Typ) and return to the normal
operation mode. Output data register UVLOS in this case can be either Latch or Self Recovery depending on the status of
input data register PSSTH. Input data register PSSTH=0 and output data register UVLOS= 1 for Latch. Input data register
PSSTH=1 and output data register UVLOS for Self Recovery when VS terminal voltage goes up to or above 6.5V (Typ).
VS
6.5V(Typ)
6.0V(Typ)
Operating
OUT1/2/3
High Impedance
High
PSSTH=0
PSS Error Bit(UVLOS)
Low
High
PSSTH=1
PSS Error Bit(UVLOS)
Low
Normal
Normal
Protection
Figure 13. UVLO Timing Chart
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4. Over Current Detection (OCD)
When 1.5A (Typ) current flows & 25μs (Typ) delay time into the output terminal, overcurrent is detected and OCDS register
is set “1”. Only the Overcurrent Detected output stage is latched at High impedance. In order to release the latch in this
case, it has to be reset via SRR register or EN terminal. Also 25μs (Typ) delay time is programmed to avoid the malfunction
caused by noise.
OCD is the function to protect the IC from destruction caused by output short. However, the continuous overcurrent
condition could lead the IC heating up or degraded and thus an appropriate measure has to be taken such as placing the IC
into stand-by mode by application when overcurrent condition continues.
Delay Time 25μs(Typ)
1.5A(Typ)
Operating
OUT1/2/3
High Impedance
High
OCD Error Bit(OCDS)
Low
Normal
Protection(Latch)
Figure 14. OCD Timing Chart
5. Thermal Shut Down (TSD)
When junction temperature goes up to or above 175°C (Typ), all outputs turn into High impedance.
TSDS register is set “1” in this case.
Self Recovery kicks in when the junction temperature goes down to or below 150°C (Typ) and outputs come back and
return to the normal operation. TSDS register in this case is maintained at “1”. Output data register TSDS can be either
Latch or Self Recovery depending on the input data register TSDSTH status. Input data register TSDSTH=0 and output
data register TSDS=1 for latch. Input data register TSDSTH=1 and output data register TSDS for Self Recovery when the
junction temperature goes down to or below 150°C (Typ).
175°C(Typ)
150°C(Typ)
Temperature
Operating
OUT1/2/3
High Impedance
High
TSDSTH=0
TSD Error Bit(TSDS)
Low
High
TSDSTH=1
TSD Error Bit(TSDS)
Low
Normal
Protection
Normal
Figure 15. TSD Timing Chart
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6. Under Load Detection (ULD)
When 30mA (Typ) current flows & 370μs (Typ) delay time into the output terminal, under load is detected and ULS register
is set “1”.The output is not turned OFF if Under Load is detected, but the fault is latched to the ULS register. In order to
release the latch in this case, it has to be reset via EN terminal. Also 370μs (Typ) delay time is programmed to avoid the
malfunction caused by noise.
30mA(Typ)
Delay time 370μs(Typ)
Operating
OUT1/2/3
High
ULD Error Bit
(UNDERLOADS)
Low
Normal
Protection
Figure 16. Under load Timing Chart 1
(Note)
When using a load such that the current start up delay exceeds the OPEN detection delay time, please reset the
UNDERLOAD bit to „0‟ ( OPEN detection ON) after the load current becomes stable.
Load connection
No Load
30mA(Typ)
OUT1/2/3
Current
0mA
0mA
Delay time > 370μs(Typ)
Operating
Operating
High
Impedance
High
Impedance
OUT1/2/3
High
Low
High
Low
UNDERLOAD register
High
Low
ULD Error Bit
(UNDERLOADS)
Low
Low
370μs (Typ)
Figure 17. Under load Timing Chart 2
HSS*
LSS*
0
0
*
*
*
Note1
Note1
Note1
SRRꢀ
Register
600μs
Note2
600μs
600μs
Status Read
UNDERLOAD
Register
(Note1) Time should be determined based on response of the load connected.
(Note2) OPEN detection time requires minimum 600μs, so please use it by an interval of at least 600μs.
Figure 18. Under load Timing Chart 3
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(Precaution)
If Under load detection needs to be masked, please set the UNDERLOAD bit in the write register before turning ON the
channels HSC*, LSC* (Figure 19).
Please note that the internal under load detection function will be in operation always, hence if the UNDERLOAD bit is set
after turning ON the channels HSC*, LSC* , the under load will still be detected and the UNDERLOADS read register bit will
be set (Figure 20). Please use the EN pin to reset it and then set the UNDERLOAD bit in the write register before proceeding
further with other commands.
000
***
HSC*, LSC*
OPEN Detect Signal
undetected
ON
detected
(Internal Signal)
UNDERLOAD Register
OFF (Note1)
OPEN Detection Circuit
OFF
ULD Error Bit (UNDERLOADS)
undetected
(Note1) Please set UNDERLOAD bit before turning ON HSC*, LSC* to mask Underload detection.
Figure 19. Under load Timing Chart 4
000
***
HSC*, LSC*
OPEN Detect Signal
undetected
ON
detected
(Internal Signal)
UNDERLOAD Register
OFF
OPEN Detection Circuit
OFF
ON
ON (Note2)
ULD Error Bit (UNDERLOADS)
undetected
detected
370μs (Typ)
(Note2) Detection will not stop although UNDERLOAD bit is set.
Please reset with EN pin after open is detected.
Figure 20. Under load Timing Chart 5
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BD16933EFV-C
Recommended Application Example
Voltage
Regulator
Micro
controller
1µF
4.7μ F
BD16933EFV-C
M
M
Motor 1
Motor 2
The external circuit constants shown in the diagram above represent a recommended value, respectively.
Figure 21. Recommended Application Example
Cautions on Designing of Application Circuits
1. Applicable Motors
Be noted that The BD16933EFV-C motor driver can only drive DC motors and cannot drive stepping motors.
2. VS and VCC
Be sure to mount a power supply capacitor in the vicinity of the IC pins between the VS and PGND and between the VCC
and GND. Determine the capacitance of the capacitor after fully ensuring that it presents no problems in characteristics.
(The recommended value of between VS and PGND is 4.7µF or more. The recommended value of between VCC and
GND is 1.0µF or more.)
Furthermore, cause a short circuit between VS (set them to the same potential) before using the IC.
3. Counter-Electromotive Force
The counter-electromotive force may vary with operating conditions and environment, and individual motor characteristics.
Fully ensure that the counter-electromotive force presents no problems in the operation or the IC.
4. Fluctuations in Output Pin Voltage
If any output pin makes a significant fluctuation in the voltage to fall below GND potential due to heat generation
conditions, power supply, and motor to be used, or other conditions, this may result in malfunctions or other failures. In
such cases, take appropriate measures, including the addition of a Schottky diode between the output pin and ground.
5. Rush Current
This IC has no built-in circuit that limits rush currents caused by applying current to the power supply or switching
operation mode. To avoid the rush currents, take physical measures such as adding a current-limiting resistor between
VS pins and the power supply.
6. Thermal Pad
Since a thermal pad is connected to the sub side of this IC, connect it to the ground potential. Furthermore, do not use
the thermal pad as ground interconnect.
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BD16933EFV-C
I/O Equivalent Circuits
Pin No.
Pin Name
I/O Equivalence Circuit
VCC
20
10kΩ
2
3
16
17
19
TEST1
TEST2
SDI
SCK
EN
TEST1/TEST2
SDI/SCK/EN
2
3
16 17 19
100kΩ
AGND
AGND
1
1
VS
10 11
6,7
8,9
12,13
OUT1
OUT2
OUT3
OUT1/2/3
6
7
8
9
12 13
PGND
5
14
VCC
20
15Ω
SDO
15
15
SDO
AGND
AGND
1
1
VCC
20
100kΩ
10kΩ
18
CSB
CSB
18
AGND
AGND
1
1
The resistance values shown in the above diagram are typical values.
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Operational Notes
1. Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC‟s power
supply pins.
2. Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3. Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4. Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5. Thermal Consideration
Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may
result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the
board size and copper area to prevent exceeding the maximum junction temperature rating.
6. Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7. Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9. Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC‟s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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BD16933EFV-C
Operational Notes - continued
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge
acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause
unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power
supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
Pin B
B
E
C
Pin A
B
C
E
P
P+
P+
N
P+
P
P+
N
N
N
N
N
N
N
Parasitic
Elements
Parasitic
Elements
P Substrate
GND GND
P Substrate
GND
GND
Parasitic
Elements
Parasitic
Elements
N Region
close-by
Figure 22. Example of monolithic IC structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always be
within the IC‟s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below the
TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from heat
damage.
16. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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BD16933EFV-C
Ordering Information
B
D
1
6
9
3
3
E
F
V
-
CE 2
Part Number
Package
EFV: HTSSOP-B20
Product Rank
C: for Automotive
Packing and Forming Specification
E2: Embossed Tape and Reel
Marking Diagram
HTSSOP-B20 (TOP VIEW)
Part Number Marking
LOT Number
D
1 6 9 3 3
1PIN MARK
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BD16933EFV-C
Physical Dimension, Tape and Reel Information
Package Name
HTSSOP-B20
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BD16933EFV-C
Revision History
Date
Revision
001
Changes
31.Mar.2016
25.Apr.2016
New Release
P4：2 Internal Layers Copper Pattern 74.2mm2(Square) ⇒74.2mm x 74.2mm
002
Bottom
Copper Pattern 74.2mm2(Square) ⇒74.2mm x 74.2mm
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Notice
Precaution on using ROHM Products
(Note 1)
1. If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment
,
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅣ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅢ
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2. ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PAA-E
Rev.003
© 2015 ROHM Co., Ltd. All rights reserved.
Daattaasshheeeett
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall not be in an y way responsible or liable for failure, malfunction or accident arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
Rev.001
© 2015 ROHM Co., Ltd. All rights reserved.
Datasheet
BD16933EFV-C - Web Page
Part Number
Package
Unit Quantity
BD16933EFV-C
HTSSOP-B28
2500
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
2500
Taping
inquiry
Yes
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BD16950EFV是符合AEC-Q100的2ch半桥栅极驱动器。可通过从外部MCU执行16位串行外设接口（SPI）进行控制。可独立控制高边/低边Nch-MOSFET，可通过MCU以各种模式进行控制。而且，用于调整转换速率的可变驱动电流设定适用于EMI和高效率驱动。错误信号可通过MCU读取。还可通过MCU复位各种设定寄存器。
ROHM
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