RK808-B [ROCKCHIP]
Power Management System Technical Specifications;
| 型号： | RK808-B |
| 厂家： | 
Rockchip |
| 描述： | Power Management System Technical Specifications |
| 文件： | 总75页 (文件大小：2341K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RK808
Power Management System
Power Management System
Technical Specifications
PRELIMINARY
V1.0.1
2015-1-5
Fuzhou Rockchip Electronics Co.Ltd
Version 1.0.1
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1
RK808
Power Management System
REVISION HISTORY
Date
Revision
Description
Initial preliminary version
2013-03-02 0.1
2013-03-25 0.2
2013-08-31 0.3
Initial complete version
Updated register map
2013-12-4
0.4
Changed package information
Changed some details information
Adding some information
2014-02-22 0.5
2014-03-14 0.6
2014-06-16 0.7
2014-09-13 0.8
1.adding ordering information
2.deleted some RDSON information
1.revised the packaging information
2.adding the BOOT11 timing sequence
3.Revised the BUCK1/2 output voltage range from
0.7v~1.5v to 0.7125v~1.5V
2014-12-30 1.0
1.
adding
ordering
information
for
RK808-B/RK808-C
2.adding BOOT11 start up sequence of
RK808-B/RK808-C
3. adding
2014-01-05 1.0.1
1.changing the BUCK1/BUCK2 Output voltage
transition rate
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RK808
Power Management System
TABLE OF CONTENTS
1 OVERVIEW.................................................................................................... 8
2 FEATURES .................................................................................................... 8
3 BLOCK DIAGRAM........................................................................................... 9
4 TYPICAL APPLICATION DIAGRAMS..................................................................10
5 ORDERING INFORMATION .............................................................................12
6 ABSOLUTE MAXIMUM RATINGS ......................................................................12
7 RECOMMENDED OPERATING CONDITIONS.......................................................12
8 ELECTRICAL CHARACTERISTICS.....................................................................13
9 STATE MACHINE DESCRIPTION ......................................................................23
9.1
9.2
9.3
9.4
STATE MACHINE DESCRIPTION............................................................23
DEVICE POWER-ON ENABLE CONDITIONS.............................................23
DEVICE POWER-ON DISABLE CONDITIONS ...........................................24
DEVICE SLEEP ENABLE CONDITIONS....................................................24
POWER SEQUENCE..................................................................................25
10
11
10.1 BOOT1=0, BOOT0 = 0........................................................................26
10.2 BOOT1=0, BOOT0 = 1........................................................................26
10.3 BOOT1=1, BOOT0 = 0........................................................................27
10.4 BOOT1=1, BOOT0 = 1(RK808-B/RK808-C) ...........................................27
10.5 BOOT TIMING CHARACTERISTIC..........................................................28
POWER CONTROL TIMING ........................................................................29
11.1 DEVICE TURN-ON WITH PLUG_IN ........................................................29
11.2 DEVICE TURN OFF WITH FALLING INPUT VOLTAGE.................................30
11.3 TIMING CHARACTERISTICS(Vin rising/falling and Plug-in).......................30
11.4 DEVICE STATE CONTROL THROUGH PWRON SIGNAL..............................31
11.5 TIMING CHARACTERISTICS (PWRON, DEV_OFF)....................................32
11.6 DEVICE SLEEP STATE CONTROL...........................................................32
11.7 TIMING CHARACTERISTICS (SLEEP).....................................................33
PIN ASSIGNMENT....................................................................................33
PINOUT DEFINITION................................................................................34
APPLICATION NOTE .................................................................................38
REGISTER DEFINITION ............................................................................38
15.1 REGISTER SUMMARY..........................................................................38
15.2 REGISTER DESCRIPTION ....................................................................40
12
13
14
15
15.2.1
RTC REGISTERS......................................................................40
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RK808
Power Management System
15.2.1.1 SECONDS_REG : RTC SECOND Register................................40
15.2.1.2 MINUTES_REG : RTC MINUTE Register..................................40
15.2.1.3 HOURS_REG : RTC HOUR Register .......................................41
15.2.1.4 DAYS_REG : RTC DAY Register.............................................41
15.2.1.5 MONTHS_REG : RTC MONTH Register...................................41
15.2.1.6 YEARS_REG : RTC YEAR Register .........................................42
15.2.1.7 WEEKS_REG : RTC WEEK Register .......................................42
15.2.1.8 ALARM_SECONDS_REG : RTC ALARM SECOND Register..........42
15.2.1.9 ALARM_MINUTES_REG : RTC ALARM MINUTE Register............43
15.2.1.10
15.2.1.11
15.2.1.12
15.2.1.13
15.2.1.14
15.2.1.15
15.2.1.16
15.2.1.17
15.2.1.18
ALARM_HOURS_REG : RTC ALARM HOUR Register ............43
ALARM_DAYS_REG : RTC ALARM DAY Register .................43
ALARM_MONTHS_REG : RTC ALARM MONTH Register........44
ALARM_YEARS_REG : RTC ALARM YEAR Register..............44
RTC_CTRL_REG : RTC Control Register............................44
RTC_STATUS_REG : RTC Status Register .........................45
RTC_INT_REG : RTC Interrupt Register............................46
RTC_COMP_LSB_REG : RTC Comensation LSB Register .....46
RTC_COMP_MSB_REG : RTC Compensation MSB Register ..46
15.2.2
MISC REGISTERS ....................................................................47
15.2.2.1 CLK32KOUT_REG : RTC Compensation MSB Register..............47
15.2.2.2 VB_MON_REG : Battery Voltage Monitor Register...................47
15.2.2.3 THERMAL_REG : Thermal Control Register ............................48
15.2.3
POWER CHANNEL CONTROL/MONITOR REGISTERS......................49
15.2.3.1 DCDC_EN_REG : DC-DC Converter Enable Register................49
15.2.3.2 LDO_EN_REG : LDO Enable Register.....................................49
15.2.3.3 SLEEP_SET_OFF_REG1 : Sleep set Off Register #1.................50
15.2.3.4 SLEEP_SET_OFF_REG2 : Sleep set Off Register #2.................50
15.2.3.5 DCDC_UV_STS_REG : DC-DC Under Voltage Status Register ...51
15.2.3.6 DCDC_UV_ACT_REG : DC-DC Under Voltage Action Register ...51
15.2.3.7 LDO_UV_STS_REG : LDO Under Voltage Status Register.........52
15.2.3.8 LDO_UV_ACT_REG : LDO Under Voltage Action Register .........53
15.2.3.9 DCDC_PG_REG : DC-DC Converter Power Good Status Register
54
15.2.3.10
15.2.3.11
LDO_PG_REG : LDO Power Good Status Register..............54
VOUT_MON_TDB_REG : VOUT Debounce Monitor Register.55
15.2.4
POWER CHANNEL CONFIGURATION REGISTERS..........................56
15.2.4.1 BUCK1_CONFIG_REG : BUCK1 Configuration Register ............56
15.2.4.2 BUCK1_ON_VSEL : BUCK1 Active Mode Register....................56
15.2.4.3 BUCK1_SLP_VSEL : BUCK1 Sleep Mode Register....................57
15.2.4.4 BUCK1_DVS_VSEL : BUCK1 DVS Mode Register.....................57
15.2.4.5 BUCK2_CONFIG_REG : BUCK2 Configuration Register ............58
15.2.4.6 BUCK2_ON_VSEL : BUCK2 Active Mode Register....................59
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15.2.4.7 BUCK2_SLP_VSEL : BUCK2 Sleep Mode Register....................59
15.2.4.8 BUCK2_DVS_VSEL : BUCK2 DVS Mode Register.....................60
15.2.4.9 BUCK3_CONFIG_REG : BUCK3 Configuration Register ............60
15.2.4.10
15.2.4.11
15.2.4.12
15.2.4.13
15.2.4.14
15.2.4.15
15.2.4.16
15.2.4.17
15.2.4.18
15.2.4.19
15.2.4.20
15.2.4.21
15.2.4.22
15.2.4.23
15.2.4.24
15.2.4.25
15.2.4.26
15.2.4.27
15.2.4.28
15.2.4.29
BUCK4_CONFIG_REG : BUCK4 Configuration Register .......61
BUCK4_ON_VSEL : BUCK4 Active Mode Register...............61
BUCK4_SLP_VSEL : BUCK4 Sleep Mode Register...............62
LDO1_ON_VSEL_REG : LDO1 Active Mode Voltage Select ..62
LDO1_SLP_VSEL_REG : LDO1 Sleep Mode Voltage Select ..63
LDO2_ON_VSEL_REG : LDO2 Active Mode Voltage Select ..63
LDO2_SLP_VSEL_REG : LDO2 Sleep Mode Voltage Select ..64
LDO3_ON_VSEL_REG : LDO3 Active Mode Voltage Sel.......64
LDO3_SLP_VSEL_REG : LDO3 Sleep Mode Voltage Select ..65
LDO4_ON_VSEL_REG : LDO4 Active Mode Voltage Select ..65
LDO4_SLP_VSEL_REG : LDO4 Sleep Mode Voltage Select ..66
LDO5_ON_VSEL_REG : LDO5 Active Mode Voltage Select ..66
LDO5_SLP_VSEL_REG : LDO5 Sleep Mode Voltage Select ..67
LDO6_ON_VSEL_REG : LDO6 Active Mode Voltage Select ..67
LDO6_SLP_VSEL_REG : LDO6 Sleep Mode Voltage Select ..67
LDO7_ON_VSEL_REG : LDO7 Active Mode Voltage Select ..68
LDO7_SLP_VSEL_REG : LDO7 Sleep Mode Voltage Select ..68
LDO8_ON_VSEL_REG : LDO8 Active Mode Voltage Select ..69
LDO8_SLP_VSEL_REG : LDO8 Sleep Mode Voltage Select ..69
DEVCTRL_REG : Device Control Register..........................70
15.2.5
INTERRUPT REGISTERS............................................................71
15.2.5.1 INT_STS_REG1 : Interrupt Status Register #1.......................71
15.2.5.2 INT_MSK_REG1 : Interrupt Mask Register #1........................71
15.2.5.3 INT_STS_REG2 : Interrupt Status Register #2.......................72
15.2.5.4 INT_STS_MSK_REG2 : Interrupt Status Register #2...............72
15.2.5.5 IO_POL_REG : IO Polarity Register.......................................73
15.2.5.6 DCDC_ILMAX_REG : DCDC max inductor current Register.......73
PACKAGE INFORMATION ..........................................................................74
16
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RK808
Power Management System
LIST OF FIGURES
Figure 3-1 Functional Block Diagram ......................................................9
Figure 4-1 One Battery Cell Application............................................... 10
Figure 4-2 Two Battery Cells Application ............................................... 11
Figure 8-1 State Machine .................................................................. 23
Figure 8-2 Power On Enable Control ................................................... 24
Figure 8-3 SLEEP Enable Control ........................................................ 25
Figure 9-1 Power On/Off Timing, BOOT1=0, BOOT0=0 ........................... 26
Figure 9-2 Power On/Off Timing, BOOT1=0, BOOT0=1 ........................... 26
Figure 9-3 Power On/Off Timing, BOOT1=1, BOOT0=0 ........................... 27
Figure 10-1Power ON Timing with VDC Plug in (PLUP_IN_INT Trigger a Power
on Enable)................................................................................... 29
Figure 10-2 Power Control Timing with VIN Falling ................................. 30
Figure 10-3 Vin and PLUG_IN Timing Characteristics .............................. 30
Figure 10-4 PWRON Turn-On/DEV_OFF Turn Off..................................... 31
Figure 10-5 PWRON Long Press Turn Off ............................................... 31
Figure 10-6 SLEEP/ACTIVE Transition Timing......................................... 32
Figure 11-1 Pin Assignment................................................................. 33
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RK808
Power Management System
LIST OF TABLES
Table 9-1 Power Start Up Sequence...................................................... 25
Table 10-1 PWRON/DEV_OFF Timing Characteristics............................... 32
Table 10-2 SLEEP Timing Characteristics............................................... 33
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RK808
Power Management System
1 OVERVIEW
The RK808 is a complete power supply solution for Portable systems. The highly
integrated device includes four buck DC-DC converters, eight high performance ldos, two
low Rds switches, I2C interface, programmable power sequencing and an RTC.
The RK808 improves performance, reduces component count and size, and therefore
provides lower cost solution compared to conventional portable designs. The ultra fast
2MHz current mode DC/DC architecture optimizes the transient performance and is
compatible with tiny low cost ceramic inductors and capacitors.
All DC/DC channels
include integrated MOSFETS. Internal soft-start and compensation circuits minimize
external components count. Most outputs can be programmed through the I2C interface
2 FEATURES
Input voltage range: 2.7V to 5.5V
2MHz Switching Frequency for bucks
Current mode architecture for best transient performance
Internal compensation and soft start
I2C Programmable output levels and power sequencing
High efficiency architecture
Integrated Vout Discharge Circuit for BUCK and LDO
Power:
•
•
•
•
•
•
•
•
•
CH1: Synchronous Buck regulator, 5A max
CH2: Synchronous Buck regulator, 5A max
CH3: Synchronous Buck regulator, 3A max
CH4: Synchronous Buck regulator, 2.5A max
CH6,CH7,CH9,CH11: Linear regulators, 150mA max
CH8: Low noise and high PSRR linear regulator,100mA max
CH10,CH12,CH13: Linear regulators, 300mA max
CH14: Low Rds switch, 0.2ohm@Vgs=3v
CH15: Low Rds switch, 0.2ohm@Vgs=3v
Auxiliary: Flexible Power Sequence control
Package: 7mmx7mm QFN68
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RK808
Power Management System
3 BLOCK DIAGRAM
VCCA
LDO1
VCC6
150mA
Vcc_tp
VLDOA
CH6
VCC1
VCC1
LDO2
CH1
150mA
Vcca_33
SW1
Vdd_arm
BUCK1
Step-Down
5A
SW1
CH7
GND1
GND1
0.7125~1.5V
LDO3
(low noise)
DAC
VCC7
VFB1
100mA
Vdd_11
VCC2
VCC2
CH8
CH2
SW2
Vdd_logic
BUCK1
Step-Down
5A
VCC9
LDO4
SW2
150mA
Vcc_25
GND2
GND2
0.7125~1.5V
CH9
DAC
VFB2
LDO5
300mA
VCC3
Vcc28_cif
CH3
CH10
BUCK3
Step-Down
3A
Vcc_ddr
SW3
VCC10
Vcc_12
LDO6
1.0~1.8V
GND3
VFB3
150mA
VCC4
CH11
2MHz
Clock
CH4
Vcc_io
BUCK4
Step-Down
2.5A
VCC7
SW4
LDO7
300mA
Vcc18_cif
1.8~3.3V
GND4
VFB4
CH12
DAC
VCC11
LDO8
300mA
Vcc33_wifi
CH13
VCC8
Switch 1
300mA
Vcc_sd
SDA
I2C
SCK
CH14
INT
SLEEP
PWRON
Ext_EN
VCC12
Vcc_lcd
Switch 2
300mA
NRESPWRON
BOOT0
BOOT1
DVS1
Power
Sequence
CH15
VCCRTC
DVS2
DVSOK
VDDIO
OSC32KIN
32K OSC
RTC
VREF
Reference
REFGND
OSC32KOUT
CLK32OUT1
CLK32OUT2
Figure 3-1 Functional Block Diagram
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RK808
Power Management System
4 TYPICAL APPLICATION DIAGRAMS
Vsys
4.7uF
2.2uH/5A
Vsys
VCC1
VCC1
4.7uF
VCC6
Vcc_tp
VDD_ARM
33uF
2.2uF
VLDO1
VLDO2
SW1
SW1
GND1
GND1
Vcca_33
2.2uF
VCC_IO
Vdd_11
4.7uF
VCC7
VFB1
Vsys
4.7uF
2.2uH/5A
2.2uF
VLDO3
VCC2
VCC2
Vcc18_cif
4.7uF
VDD_LOGIC
33uF
VLDO7
SW2
SW2
GND2
GND2
VCC_IO
Vcc_sd
4.7uF
VCC8
2.2uF
VSWOUT1
VCC_IO
Vcc_25
4.7uF
VFB1
Vsys
VCC9
4.7uF
2.2uH/3A
2.2uF
VCC3
SW3
VCC_DDR
33uF
VLDO4
Vcc28_cif
2.2uF
VLDO5
VCC10
VCC_IO
Vcc_12
4.7uF
4.7uF
VFB3
GND3
2.2uF
VLDO6
VCC11
VCC_IO
Vsys
Vcc33_wifi
2.2uF
4.7uF
2.2uH/3A
VLDO8
VCC12
VCC4
SW4
VCC_IO
33uF
VCC_IO
Vcc_lcd
4.7uF
2.2uF
GND4
VSWOUT2
Vsys
4.7uF
VFB4
VCCA
VCC_IO
Vsys
4.7uF
VDDIO
VCCRTC
VLDOA
4.7uF
Vsys
2.2uF
0.1uF
VREF
REFGND
AGND
DVS1
DVS2
SLEEP
BAT
DVS1
DVS2
SLEEP
Vsys
Power
Path
DGND
EXT_EN
OSC32KIN
VCC_IO
25pF
25pF
USB/Adapter
32.768K
100K
100K
100K
100K
OSC32KOUT
VPPOTP
10K
DVSOK
INT
NRESPWON
RESET
VCCRTC
AP
200K
(VCC_IO)
VDC
CLK32KOUT2
22nF
VCCRTC
33K
VCC_IO
10K
4.7K
4.7K
PWRON
PWRON
SCL
SDA
SCL
SDA
VCCRTC
VCCRTC
100K
10K
VCCRTC
10K
BOOT0
BOOT1
BOOT0
BOOT1
CLK32KOUT1
GPS
Figure 4-1 RK808 One Battery Cell Application
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RK808
Power Management System
Vsys
Vsys
VCC1
VCC1
4.7uF
4.7uF
4.7uF
VCC6
Vcc_tp
VDD_ARM
2.2uH/5A
2.2uF
VLDO1
VLDO2
SW1
SW1
GND1
GND2
VFB1
Vcca_33
2.2uF
33uF
VCC_IO
Vdd_11
VCC7
Vsys
2.2uF
VLDO3
VCC2
VCC2
4.7uF
Vcc18_cif
4.7uF
VDD_LOGIC
2.2uH/5A
VLDO7
SW2
VCC_IO
Vcc_sd
4.7uF
SW2
33uF
VCC8
GND2
GND2
2.2uF
VSWOUT1
VCC_IO
Vcc_25
VFB2
Vsys
4.7uF
VCC9
4.7uF
2.2uF
VCC3
VLDO4
VCC_DDR
2.2uH/3A
Vcc28_cif
2.2uF
SW3
VLDO5
VCC10
VCC_IO
Vcc_12
4.7uF
4.7uF
33uF
VFB3
2.2uF
VLDO6
VCC11
VCC_IO
GND3
Vcc33_wifi
2.2uF
Vsys
4.7uF
VLDO8
VCC12
VCC4
VCC_IO
Vcc_lcd
VCC_IO
4.7uF
2.2uH/3A
SW4
2.2uF
33uF
VSWOUT2
GND4
Vhvldo
4.7uF
VCCA
VFB4
VCC_IO
4.7uF
VDDIO
Vhvldo
LDO
4.7uF
VCCRTC
VLDOA
Vsys
2.2uF
0.1uF
VREF
REFGND
AGND
DVS1
DVS1
2*BAT
Vsys
DVS2
Power
Path
DVS2
BUCK
DGND
SLEEP
SLEEP
9V/12V
Adapter
VCC_IO
25pF
25pF
VAP_pwr1
OSC32KIN
32.768K
100K
100K
100K
100K
OSC32KOUT
Ext_en
DVSOK
INT
NRESPWON
10K
RESET
AP
VCCRTC
VPPOTP
400K
33K
(VCC_IO)
VDC
CLK32KOUT2
VCCRTC
VCC_IO
VAP_pwr2
22nF
10K
4.7K
4.7K
PWRON
PWRON
SCL
SDA
SCL
SDA
VCCRTC
VCCRTC
100K
10K
VCCRTC
BOOT0
BOOT1
BOOT0
BOOT1
CLK32KOUT1
10K
GPS
Vsys must less than (Vhvldo+0.5V)
Figure 4-2 RK808 Two Battery Cells Application
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RK808
Power Management System
5 ORDERING INFORMATION
Orderable
Device
RoHS
status
Package
Package Qty
Device special
feature
RK808-B
RoHS pass QFN68(7X7) 2600ea/inner box* 6 For
RK3288
inner boxes/outer box B-application
RK808-C
RoHS pass QFN68(7X7) 2600ea/inner box* 6 For
RK3288
inner boxes/outer box C-application
6 ABSOLUTE MAXIMUM RATINGS
Parameter
Min
Max
Uni
ts
Voltage range on pins VCCx, VDDIO, VCCRTC, -0.3
VFBx, VLDOx, VSWOUTx, VREF
7
7
V
Voltage
range
on
pin
CLK32KOUT1, -0.3
V
CLK32KOUT2, VDC, SLEEP
Voltage range on pins OSC32KIN, OSC32KOUT, -0.3
BOOT0, BOOT1, EXT_EN, PWRON
Voltage range on pins NRESPWRON, INT, SDA, -0.3
SCL, DVS1, DVS2, DVSOK
VCCRTCMAX+0.3
VDDIO+0.3
V
℃
℃
℃
Storage temperature range, TS
Operating temperature range, TJ
Maximum Soldering Temperature, TSOLDER
-40
-40
150
125
300
Note 1. Exposure to the conditions exceeded absolute maximum ratings may cause the permanent
damages and affect the reliability and safety of both device and systems using the device. The
functional operations cannot be guaranteed beyond specified values in the recommended
conditions.
7 RECOMMENDED OPERATING CONDITIONS
Parameter
Voltage range on pins VCCx, VDDIO
Voltage range on pin VCCRTC
Voltage range on other pins
Power Dissipation
Min
TYP
Max
5.5
5.5
5.5
2.5
Units
3
2.5
V
V
V
W
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Power Management System
8 ELECTRICAL CHARACTERISTICS
TJ=25C; VBAT=VCCx=3.8V, VDDIO=3V unless otherwise specified.
Parameter
Symbol
Min.
Typ.
Max.
Unit
General
Input supply voltage range ( VBAT )
Battery low alarm voltage
VINPUT
VBLO
2.7
5.5
V
V
3.25
3.3
3.35
(2.8V~3.5V programmable, step=100mV)
Battery under voltage threshold (vin falling)
Battery under voltage threshold (vin rising)
Battery OK voltage threshold
VBUVL
VBUVH
VBOK
2.5
2.7
3.0
V
V
V
2.6
2.8
（3.0V/3.4V/3.5V/3.6V OTP programmable）
Power on Reset Threshold (Rising)
Power on Reset Threshold (Falling)
Over Voltage Lock Out Threshold (Vin Rising)
Over Voltage Lock Out Hysteresis
VDC pin threshold(rising edge)
VPORH
VPORL
2.2
6.3
V
V
1.2
5.7
VTH(OVLO)
VHYS (OVLO)
VDCH
6.0
0.2
0.6
0.54
60
V
V
V
VDC pin threshold(falling edge)
VDCL
V
Stand-by current, VDD=3.6V, device OFF state
32KHz clock running
IQ(STNBY)
uA
Hot-die temperature rising threshold
(85℃~115℃ programmable, step=10℃)
Thermal shut down
THD
85
115
170
℃
℃
TTSD
140
(140℃~170℃ programmable, step=30℃)
Oscillator circuit
Switching Frequency CH1,2,3,4( Tj=25℃ )
fSW
1.8
2
2.2
0.3xVDDIO
0.4
MHz
Logic inputs
Input LOW-Level Voltage (VDDIO
)
VIL
VIH
V
V
Input HIGH-Level Voltage (VDDIO
)
0.7xVDDIO
Logic outputs
LOW-Level Output Voltage, 3.0 mA sink
current
VOL
V
V
V
V
HIGH-Level Output Voltage, 3.0 mA source
current
VOH
VDDIO-0.4
NRESPWON pin LOW-Level Output Voltage,
3.0mA sink current
VOL(NRES)
0.4
0.4
CLK32KOUT1 pin LOW-Level Output Voltage,
VOL(CLKO1)
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Version 1.0.1
13
RK808
Power Management System
Parameter
Symbol
VOL(CLKO2)
VOH(CLKO2)
Min.
Typ.
Max.
Unit
3.0mA sink current
CLK32KOUT2 pin LOW-Level Output Voltage,
3.0mA sink current
0.4
CLK32KOUT2
pin HIGH-Level Output
VDDIO-0.4
V
Voltage, 3.0mA source current
CH1 Buck1 Regulator (VDD_ARM)
Input supply voltage range
VINPUT1
VFB1
2.7
5.5
V
V
Voltage Adjustable Range, 6bit
DC output voltage programmable step(DVS)
Output voltage transition rate
0.7125
1.500
12.5
mV
BUCK1_RATE=00
2
3.6
5
BUCK1_RATE=01
mV/us
BUCK1_RATE=10
BUCK1_RATE=11
6.5
93
DVS OK threshold (Vout rising)
DVS OK threshold (Vout falling)
Power Good threshold (Vout rising)
Output under voltage lockout(Vout falling)
Output over voltage lockout (Vout rising)
Preset Voltage, Default( Tj=25℃ )
Preset Voltage, Default(-10℃≦Tj≦+85℃)
Load Regulation, IOUT1 = 100mA to 5A
Line Regulation, VCC1 = 3 to 5V, IOUT1 = 1A
Rated output current(If ICL1=6A)
Switch Current Limit
VDVSOKR1
VDVSOKF1
VPG1
%
%
107
93
%
VUV1
85
%
VOV1
117
1.100
1.100
1
%
VFB1(Default)
VFB1(Default)
1.078
1.067
1.122
1.133
V
V
%/A
%/V
A
0.1
5
IMAX1
ICL1
6
A
(4.5A~6A programmable, step=0.5A)
Operating Quiescent Current, No load,
VDD=3.8V
IQ1
70
uA
Minimun Switch Current Limit
(50mA~400mA programmable, step=50mA)
Soft-start Time
ICLMIN1
100
mA
tSS1
400
250
us
COUT Discharge Switch ON Resistance
Conversion Effeciency (Vin=3.8V,Vout=1.1V)
RDIS1
ohm
68
73
78
84
89
Iout=5A
Iout=4A
Iout=3A
Iout=2A
Iout=1 A
%
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14
RK808
Power Management System
Parameter
Symbol
Min.
Typ.
Max.
Unit
Iout=500mA
90
Iout=100 mA
Iout=10 mA
81
79
CH2 Buck2 Regulator (VDD_LOG)
Input supply voltage range
VINPUT2
VFB2
2.7
5.5
VINPUT2
VFB2
Voltage Adjustable Range, 6bit
DC output voltage programmable step(DVS)
Output voltage transition rate
BUCK2_RATE=00
0.7125
1.500
12.5
2
3.6
5
BUCK2_RATE=01
BUCK2_RATE=10
BUCK2_RATE=11
6.5
93
DVS OK threshold (Vout rising)
DVS OK threshold (Vout falling)
Power Good threshold (Vout rising)
Output under voltage lockout (Vout falling)
Output over voltage lockout (Vout rising)
Preset Voltage, Default( Tj=25℃ )
Preset Voltage, Default(-10℃≦Tj≦+85℃)
Load Regulation, IOUT2 = 100 mA to 5A
Line Regulation, VCC2 = 3 to 5V, IOUT2 = 1A
Rated output current(If ICL2=6A)
Switch Current Limit
VDVSOKR2
VDVSOKF2
VPG2
%
%
107
93
%
VUV2
85
%
VOV2
117
1.100
1.100
1
%
VFB2(Default)
VFB2(Default)
1.078
1.067
V
V
%/A
%/V
A
0.1
5
IMAX2
ICL2
6
A
(4.5A~6A programmable, step=0.5A)
Operating Quiescent Current, No load,
VDD=3.8V
IQ2
70
uA
Minimun Switch Current Limit
(50mA~400mA programmable, step=50mA)
Soft-start Time
ICLMIN2
100
mA
tSS2
400
250
us
COUT Discharge Switch ON Resistance
RDIS2
ohm
Conversion Effeciency (Vin=3.8V,Vout=1.1V)
Iout=5A
68
73
78
84
89
Iout=4A
Iout=3A
Iout=2A
Iout=1 A
%
Version 1.0.1
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15
RK808
Power Management System
Parameter
Symbol
Min.
Typ.
Max.
Unit
Iout=500mA
90
Iout=100 mA
Iout=10 mA
81
79
CH3 Buck3 Regulator (VDD_DDR)
Input supply voltage range
VINPUT3
VFB3(Default)
VFB3(Default)
VPG3
2.7
V
V
Feedback Voltage, Default( Tj=25℃ )
Feedback Voltage, Default(-10℃≦Tj≦+85℃)
Power Good threshold (Vout rising)
Output under voltage lockout (Vout falling)
Output over voltage lockout (Vout rising)
Load Regulation, IOUT3 = 100mA to 3A
Line Regulation, VCC3 = 3 to 5V, IOUT3 = 0.5A
Rated output current(If ICL3=3.5A)
Switch Current Limit
0.98
0.97
1.00
1.00
93
V
%
VUV3
85
%
VOV3
117
1
%
%/A
%/V
A
0.1
3
IMAX3
ICL3
3.5
A
(2A~3.5A programmable, step=0.5A)
Operating Quiescent Current, No load,
VDD=3.8V
IQ3
70
uA
Minimun Switch Current Limit
ICLMIN3
100
mA
(50mA~400mA programmable, step=50mA)
Soft-start Time
tSS3
400
250
us
COUT Discharge Switch ON Resistance
RDIS3
ohm
Conversion Effeciency (Vin=3.8V,Vout=1.4V)
Iout=3A
71
79
83
87
90
83
76
Iout=2A
Iout=1.5A
Iout=1 A
%
Iout=500mA
Iout=100 mA
Iout=10 mA
CH4 Buck4 Regulator (VDD_IO)
Input supply voltage range
VINPUT4
VFB4
2.7
1.8
5.5
3.3
V
V
Voltage Adjustable Range, 4bit
DC output voltage programmable step(gain
select)
100
mV
Feedback Voltage, Default( Tj=25℃ )
VFB4(Default)
2.94
3.00
3.06
V
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16
RK808
Power Management System
Parameter
Symbol
VFB4(Default)
VPG4
Min.
Typ.
3.00
93
Max.
Unit
V
Feedback Voltage, Default(-10℃≦Tj≦+85℃)
Power Good threshold (Vout rising)
Output under voltage lockout (Vout falling)
Output over voltage lockout (Vout rising)
Load Regulation, IOUT4 = 100mA to 2.5A
Line Regulation, VCC4 = 3 to 5V, IOUT4 = 0.5A
Rated output current(If ICL4=3.5A)
Switch Current Limit
-2.91
3.09
%
VUV4
85
%
VOV4
117
1
%
%/A
%/V
A
0.1
2.5
3.5
IMAX4
ICL4
A
(2A~3.5A programmable, step=0.5A)
Operating Quiescent Current, No load,
VDD=3.8V
IQ4
70
uA
Minimun Switch Current Limit
ICLMIN4
100
mA
(50mA~400mA programmable, step=50mA)
Soft-start Time
tSS4
400
250
us
COUT Discharge Switch ON Resistance
RDIS4
Ohm
Conversion Effeciency,
Vin=3.8V,Vout=3V
(DCR<50mohm)
%
Iout=2.5A
Iout=2A
85
89
91
94
95
92
60
Iout=1 .5A
Iout=1 A
Iout=500mA
Iout=100mA
Iout=10mA
CH6 LDO1( VCC_TP)
Input supply voltage range
VINPUT6
VOUT6
2.7
1.8
5.5
3.4
V
V
VOUT Output Voltage Adjustable Range,
4bit(step=100mv)
VOUT Output Voltage, Default( Tj=25℃ )
VOUT Output Voltage, Default( Tj= -10~85℃ )
Power Good threshold (Vout rising)
Output under voltage lockout (Vout falling)
VOUT Load Regulation, IOUT = 1mA to 150mA
VOUT6(Default)
VOUT6(Default)
VPG6
3.234
3.201
3.300
3.300
93
3.366
3.399
V
V
%
VUV6
85
%
0.005
0.03
%/mA
%/V
VOUT Line Regulation, VIN6 = 3 to 5V, IOUT6
0.1A
=
Power Supply Reject Ratio (f
VOUT6=3.3V)
=
10kHz,
PSRR6
50
dB
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17
RK808
Power Management System
Parameter
Output noise (10Hz to 100kHz, VOUT6=3.3V)
Dropout voltage @ 150mA (VOUT6=3.3V)
Rated output current
Symbol
OUTNOISE6
VDROP6
IMAX6
Min.
Typ.
300
200
150
28
Max.
Unit
uVrms
mV
mA
Operating Quiescent Current, No load,
VDD=3.8V
IQ6
uA
Current Limit, VOUT6 = VOUT6 x 0.95
Soft-start Time
ICL6
tSS6
250
300
400
400
mA
us
COUT Discharge Switch ON Resistance
RDIS6
ohm
CH7 LDO2( VCCA_33)
Input supply voltage range
VINPUT7
VOUT7
2.7
1.8
5.5
3.4
V
V
VOUT Output Voltage Adjustable Range,
4bit(step=100mv)
VOUT Output Voltage, Default( Tj=25℃ )
VOUT Output Voltage, Default( Tj=-10~85℃ )
Power Good threshold (Vout rising)
Output under voltage lockout (Vout falling)
VOUT Load Regulation, IOUT = 1mA to 150mA
VOUT7(Default)
VOUT7(Default)
VPG7
3.234
3.201
3.300
3.300
93
3.366
3.399
V
V
%
VUV7
85
%
0.005
0.03
%/mA
%/V
VOUT Line Regulation, VIN7= 3 to 5V, IOUT7
0.1A
=
Power Supply Reject Ratio (f
VOUT7=3.3V)
=
10kHz,
PSRR7
50
dB
Output noise (10Hz to 100kHz, VOUT7=3.3V)
Dropout voltage @ 150mA (VOUT7=3.3V)
Operating Quiescent Current, No load,
VDD=3.8V
OUTNOISE7
VDROP7
IQ7
300
200
28
uVrms
mV
uA
Rated output current
IMAX7
ICL7
150
300
400
400
mA
mA
us
Current Limit, VOUT7 = VOUT7 x 0.95
Soft-start Time
250
tSS7
COUT Discharge Switch ON Resistance
RDIS7
Ohm
CH8 LDO3( VDD_11)
Input supply voltage range
VINPUT7
VOUT8
2.7
0.8
5.5
2.5
V
V
VOUT Output Voltage Adjustable Range,
4bit (0.8V~2V, step=100mV,
step=500mV)
2V~ 2.5V
VOUT Output Voltage, Default( Tj=25℃ )
VOUT8(Default)
VOUT8
1.078
1.067
1.100
1.100
1.122
1.133
V
V
VOUT Output Voltage, Default( Tj=-10~85℃ )
(Default)
VPG8
VUV8
Power Good threshold (Vout rising)
93
85
%
%
Output under voltage lockout (Vout falling)
VOUT Load Regulation, IOUT = 1mA to 150mA
0.006
%/mA
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18
RK808
Power Management System
Parameter
VOUT Line Regulation, VIN8 = 3 to 5V, IOUT8
0.05A
Symbol
Min.
Typ.
Max.
Unit
=
0.015
%/V
Power Supply Reject Ratio (f
VOUT8=1.1V)
=
10kHz,
PSRR8
70
dB
Output noise (10Hz to 100kHz, VOUT8=1.1V)
Dropout voltage @ 100mA (VOUT8=2.5V)
Rated output current
OUTNOISE8
VDROP8
IMAX8
30
200
100
52
uVrms
mV
mA
Operating Quiescent Current, No load,
VDD=3.8V
IQ8
uA
Current Limit, VOUT8 = VOUT8 x 0.95
Soft-start Time
ICL8
tSS8
150
200
400
400
mA
us
COUT Discharge Switch ON Resistance
RDIS8
Ohm
CH9 LDO4( VCC_25)
Input supply voltage range
VINPUT9
VOUT9
2.7
1.8
5.5
3.4
V
V
VOUT Output Voltage Adjustable Range,
4bit(step=100mv)
VOUT Output Voltage, Default( Tj=25℃ )
VOUT Output Voltage, Default( Tj=-10~85℃ )
Power Good threshold (Vout rising)
Output under voltage lockout (Vout falling)
VOUT Load Regulation, IOUT = 1mA to 150mA
VOUT9(Default)
VOUT9(Default)
VPG9
2.450
2.425
2.500
2.500
93
2.550
2.575
V
V
%
VUV9
85
%
0.005
0.03
%/mA
%/V
VOUT Line Regulation, VIN9 = 3 to 5V, IOUT9
0.15A
=
Power Supply Reject Ratio (f
VOUT9=3.3V)
=
10kHz,
PSRR9
50
dB
Output noise (10Hz to 100kHz, VOUT9=3.3V)
Dropout voltage @ 150mA (VOUT9=3.3V)
Operating Quiescent Current, No load,
VDD=3.8V
OUTNOISE9
VDROP9
IQ9
300
200
28
uVrms
mV
uA
Rated output current
IMAX9
ICL9
150
300
400
400
mA
mA
us
Current Limit, VOUT9 = VOUT9 x 0.95
Soft-start Time
250
tSS9
COUT Discharge Switch ON Resistance
RDIS9
Ohm
CH10 LDO5( VCC28_CIF)
Input supply voltage range
VINPUT10
VOUT10
2.7
1.8
5.5
3.4
V
V
VOUT Output Voltage Adjustable Range,
4bit(step=100mv)
VOUT Output Voltage, Default( Tj=25℃ )
VOUT Output Voltage, Default( Tj=-10~85℃ )
Power Good threshold (Vout rising)
VOUT10(Default)
VOUT10(Default)
VPG10
2.744
2.716
2.800
2.800
93
2.856
2.884
V
V
%
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19
RK808
Power Management System
Parameter
Symbol
Min.
Typ.
85
Max.
Unit
%
Output under voltage lockout (Vout falling)
VOUT Load Regulation, IOUT = 1mA to 300mA
VOUT Line Regulation, VIN10 = 3 to 5V, IOUT10
0.3A
VUV10
0.003
0.01
%/mA
%/V
=
Power Supply Reject Ratio (f
VOUT10=3.3V)
=
10kHz,
PSRR10
52
dB
Output noise (10Hz to 100kHz, VOUT10=3.3V)
Dropout voltage @ 300mA (VOUT10=2.8V)
Operating Quiescent Current, No load,
VDD=3.8V
OUTNOISE10
VDROP10
IQ10
300
200
28
uVrms
mV
uA
Rated output current
IMAX10
ICL10
300
500
400
400
mA
mA
us
Current Limit, VOUT10 = VOUT10 x 0.95
Soft-start Time
350
tSS10
COUT Discharge Switch ON Resistance
RDIS10
Ohm
CH11 LDO6( VCC_12)
Input supply voltage range
VINPUT11
VOUT11
2.7
0.8
5.5
2.5
V
V
VOUT Output Voltage Adjustable Range,
5bit(step=100mv)
VOUT Output Voltage, Default( Tj=25℃ )
VOUT Output Voltage, Default( Tj=-10~85℃ )
Power Good threshold (Vout rising)
Output under voltage lockout (Vout falling)
VOUT Load Regulation, IOUT = 1mA to 150mA
VOUT11(Default)
VOUT11(Default)
VPG11
1.176
1.164
1.200
1.200
93
1.224
1.236
V
V
%
VUV11
85
%
0.005
0.015
%/mA
%/V
VOUT Line Regulation, VIN11 = 3 to 5V, IOUT11
0.1A
=
Power Supply Reject Ratio (f
VOUT11=3.3V)
=
10kHz,
PSRR11
70
dB
Output noise (10Hz to 100kHz, VOUT11=3.3V)
Dropout voltage @ 150mA (VOUT11=2.5V)
Operating Quiescent Current, No load,
VDD=3.8V
OUTNOISE11
VDROP11
IQ11
30
500
52
uVrms
mV
uA
Rated output current
IMAX11
ICL11
150
300
400
400
mA
mA
us
Current Limit, VOUT11 = VOUT11 x 0.95
Soft-start Time
200
tSS11
COUT Discharge Switch ON Resistance
RDIS11
Ohm
CH12 LDO7( VCC18_CIF)
Input supply voltage rangef
VINPUT12
VOUT12
2.7
0.8
5.5
2.5
V
V
VOUT Output Voltage Adjustable Range,
5bit(step=100mv)
VOUT Output Voltage, Default( Tj=25℃ )
VOUT12(Default)
1.764
1.800
1.836
V
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20
RK808
Power Management System
Parameter
Symbol
VOUT12(Default)
VPG12
Min.
Typ.
1.800
93
Max.
Unit
V
VOUT Output Voltage, Default( Tj=-10~85℃ )
Power Good threshold (Vout rising)
Output under voltage lockout (Vout falling)
VOUT Load Regulation, IOUT = 1mA to 300mA
VOUT Line Regulation, VIN12 = 3 to 5V, IOUT12
0.3A
-1.736
1.854
%
VUV12
85
%
0.005
0.015
%/mA
%/V
=
Power Supply Reject Ratio (f
VOUT12=3.3V)
=
10kHz,
PSRR12
65
dB
Output noise (10Hz to 100kHz, VOUT12=3.3V)
Dropout voltage @ 300mA (VOUT12=2.5V)
Operating Quiescent Current, No load,
VDD=3.8V
OUTNOISE12
VDROP12
IQ12
50
200
48
uVrms
mV
uA
Rated output current
IMAX12
ICL12
300
400
400
250
mA
mA
us
Current Limit, VOUT12 = VOUT12 x 0.95
Soft-start Time
400
tSS12
COUT Discharge Switch ON Resistance
RDIS12
Ohm
CH13 LDO8( VCC33_WIFI)
Input supply voltage range
VINPUT13
VOUT13
2.7
1.8
5.5
3.4
V
V
VOUT Output Voltage Adjustable Range,
4bit(step=100mv)
VOUT Output Voltage, Default( Tj=25℃ )
VOUT Output Voltage, Default( Tj=-10~85℃ )
Power Good threshold (Vout rising)
Output under voltage lockout (Vout falling)
VOUT Load Regulation, IOUT = 1mA to 150mA
VOUT13(Default)
VOUT13(Default)
VPG13
3.234
3.201
3.300
3.300
93
3.366
3.399
V
V
%
VUV13
85
%
0.003
0.01
%/mA
%/V
VOUT Line Regulation, VIN13 = 3 to 5V, IOUT6
0.15A
=
Power Supply Reject Ratio (f
VOUT13=3.3V)
=
10kHz,
PSRR13
50
dB
Output noise (10Hz to 100kHz, VOUT13=3.3V)
Dropout voltage @ 300mA (VOUT13=2.8V)
Operating Quiescent Current, No load,
VDD=3.8V
OUTNOISE13
VDROP13
IQ13
300
200
30
uVrms
mV
uA
Rated output current
IMAX13
ICL13
300
500
400
400
mA
mA
us
Current Limit, VOUT13 = VOUT13 x 0.95
Soft-start Time
400
2.7
tSS13
COUT Discharge Switch ON Resistance
RDIS13
Ohm
CH14 SWITCH1 ( VCC_SD)
Input supply voltage range
Rated output current
VINPUT14
IMAX14
5.5
V
300
mA
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21
RK808
Power Management System
Parameter
Symbol
Min.
Typ.
200
Max.
Unit
mohm
mA
On resistance( Vgs=3V)
Current Limit
ICL14
400
500
COUT Discharge Switch ON Resistance
CH15 SWITCH2 ( VCC_LCD)
Input supply voltage range
Rated output current
RDIS14
400
Ohm
VINPUT15
IMAX15
2.7
5.5
V
300
200
500
400
mA
On resistance( Vgs=3V)
Current Limit
mohm
mA
ICL15
400
COUT Discharge Switch ON Resistance
RDIS15
Ohm
Real Time Clock (RTC)
RTC Operating Voltage Range
RTC Supply Current
VIN
IQ
2.5
5.5
V
uA
ns
%
5
CLK32OUT1 jitter (open drain) (always on)
CLK32OUT1 duty cycle
-25
40
+25
60
CLK32OUT2 jitter (open drain)
CLK32OUT2 duty cycle
-25
40
+25
60
ns
%
I2C Interface TIMING SPECIFICATIONS
SCL clock frequency
fSCL
tHIGH
tLOW
400
kHz
us
us
us
us
us
us
ns
ns
ns
pF
SCL high time
0.6
1.3
0.1
0.1
0.1
0.1
SCL low time
Data setup time
tSU,DAT
Data hold time
tHD,DAT1
Setup time for repeated start
HOLD time for start/repeated start
Rise time of SCL/SDA，CB =400pF
Fall width of SCL/SDA，CB =400pF
Pulse width of suppressed spike
Capacitive load for each of bus line
tSU,STA
tHD,STA
tr
300
300
tf
tSP
50
CB
400
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22
RK808
Power Management System
9 STATE MACHINE DESCRIPTION
9.1 STATE MACHINE DESCRIPTION
SLEEP
POWER ON disabled
Sleep disabled
OFF
POWER ON disabled
Sleep enabled
POWER ON enabled
ACTIVE
Figure 9-1 State Machine
9.2 DEVICE POWER-ON ENABLE CONDITIONS
If none of the device power-on disable conditions is met, the following conditions are available
to turn on and/or maintain the ON state of the device:
•
•
PWRON signal low level.
Or interrupt flag active (INT low) while the device is off (NRESPWRON = 0)
The power-on enable condition occurs only if the interrupt status bit is initially low (no
previous identical interrupt pending in the status register).
The Interrupt sources expected when the device is off are:
•
•
PWRON low-level interrupt (PWRON_INT = 1 in INT_STS_REG1 register)
First VDC rising above plug-in threshold (PLUG_IN interrupt(PLUG_IN_INT=1 in
INT_STS_REG2 register) (Charger plug in interrupt)
The Interrupt source expected if enabled when the device is off is:
•
RTC Alarm interrupt (INT_ALARM_EN=1 in RTC_INT_REG and RTC_ALARM_INT = 1
in INT_STS_REG register)
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23
RK808
Power Management System
PWRON
POWER ON
NRESPWRON
PWRON ON enable
PLUG_IN_INT
RTC_ALARM_INT
POWER ON conditions(if non POWER OFF conditions exist):
1. PWRON falling edge
2. RTC_ALARM_INT=1(if RTC_ALARM_INT_IM=0) or
PLUG_IN_INT=1(if PLUG_IN_INT_IM=0)
when NRESPWRON=0
DEV_OFF_RST
DEV_OFF
PWRON_LP_INT
POWER OFF
POWER OFF:
2s
1. DEV_OFF_RST=1
2. DEV_OFF=1
3. 2s delay after PWRON_LP_INT=1
4. VB_UV=1
5. TSD=1
VB_UV
VB_LO_STS
TSD
6. VB_LO_STS=1 and if VB_LO_ACT=0
VB_LO_ACT
Figure 9-2 Power On Enable Control
9.3 DEVICE POWER-ON DISABLE CONDITIONS
•
•
PWRON signal low level during more than the long-press delay: TDPWRONLP. The interrupt
corresponding to this condition is PWRON_LP_INT in the INT_STS_REG register.
Or Die temperature has reached the thermal shutdown threshold: TSD_STS=1 in
THERMAL_REG).
•
•
Or Vbat down below UVLO threshold: VB_UV_STS=1 in VB_MON_REG.
Or DEV_OFF or DEV_OFF_RST control bit set to 1 (value of DEV_OFF is cleared when
the device is in OFF state).
9.4 DEVICE SLEEP ENABLE CONDITIONS
•
•
•
SLEEP signal high level.
OR DEV_SLP control bit set to 1
And interrupt flag inactive (INT high): No non-masked interrupt pending
The SLEEP state can be controlled by programming DEV_SLP and keeping the SLEEP
state.
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RK808
Power Management System
INT=1的条件：下面9种发生任意一种情况都会令INT=1
1. VOUT_INT=1(if VOUT_INT_IM=0)
2. VB_LO_INT=1(if VB_LO_INT_IM=0)
3. PWRON_INT=1(if PWRON_INT_IM=0)
4. PWRON_LP_INT=1(if PWRON_LP_INT_IM=0)
5. HOTDIE_INT=1(if HOTDIE_INT_IM=0)
6. RTC_ALARM_INT=1(if RTC_ALARM_INT_IM=0)
7. RTC_PERIOD_INT=1(if RTC_PERIOD_INT_IM=0)
8. PLUG_IN_INT=1(if PLUG_IN_INT_IM=0)
9. PLUG_OUT_INT=1(if PLUG_OUT_INT_IM=0)
DEV_SLP
SLEEP
SLEEP enable
INT
Figure 9-3 SLEEP Enable Control
10 POWER SEQUENCE
Power
On
Preset
Power
On
Preset
Power
On
Preset
Power On
Sequence
Preset Voltage
Voltage
Voltage
Voltage
Seque
nce
Seque
nce
Seque
nce
Boot1,
Boot0
11
00
01
10
B*
2
C*
2
B*
C*
4
5
2
1
1.1V/ON
1.1V/ON
X*/ON
4
5
2
1
1.2V/ON
1.2V/ON
X*/ON
4
4
3
1
1
1.0V/ON
1.0V/ON
X*/ON
1.0V/ON
1.0V/ON
X*/ON
1.0V/ON
1.0V/ON
X*/ON
BUCK1
BUCK2
BUCK3
BUCK4
LDO1
3
3
4
4
3.0V/ON
3.3V/OFF
3.3V/OFF
1.1V/ON
2.5V/ON
2.8V/OFF
1.2V/OFF
1.8/OFF
3.3V/OFF
3.0V/ON
3.0V/OFF
3.0V/ON
3.3V/OFF
3.3V/ON
1.2V/ON
2.5V/OFF
2.8V/OFF
1.2V/OFF
1.8V/OFF
1.8V/OFF
3.0V/ON
3.0V/OFF
3.0V/ON
3.3v/ON
3.3V/OFF
1.0V/ON
1.8V/ON
2.8V/OFF
1.2V/OFF
1.8V/OFF
3.3V/OFF
3.0V/ON
3.0V/OFF
7
6
3.3V/ON
3.3V/ON
1.8V/OFF
1.0V/ON
3.3V/OFF
3.3V/ON
1.8V/OFF
1.8V/ON
3.3V/OFF
3.3V/ON
1.8V/OFF
1.8V/ON
3.3V/ON
1.8V/OFF
1.0V/ON
3.3V/OFF
3.3V/OFF
1.8V/OFF
1.8V/OFF
3.3V/OFF
3.3V/OFF
1.8V/OFF
6
7
2
3
LDO2
3
3
2
2
1
8
5
8
1
LDO3
LDO4
LDO5
LDO6
LDO7
LDO8
1
1
5
SWITCH1
SWITCH2
Table 10-1 Power Start Up Sequence
The startup sequence of BOOT11 is the only difference between RK808-B and RK808-C
B*: it is RK808-B,
C*: it is RK808-C
X*: The buck3 voltage is decided by external resistors.
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RK808
Power Management System
10.1 BOOT1=0, BOOT0 = 0
PWRON_EN
BUCK4_EN
SWITCH1_EN
BUCK3_EN
LDO3_EN
LDO4_EN
BUCK1_EN
BUCK2_EN
NRESPWRON
toff2
toff1
ton1
ton4
ton5
ton6
ton3
TdONT
ton2
TdOFFT
Switch off sequence
power on sequence
Figure 10-1 Power On/Off Timing, BOOT1=0, BOOT0=0
10.2 BOOT1=0, BOOT0 = 1
PWRON_EN
BUCK4_EN
SWITCH1_EN
BUCK3_EN
LDO2_EN
LDO3_EN
BUCK1_EN
BUCK2_EN
NRESPWRON
toff2
ton1
toff1
ton4
ton5
ton6
ton3
TdONT
ton2
TdOFFT
Switch off sequence
power on sequence
Figure 10-2 Power On/Off Timing, BOOT1=0, BOOT0=1
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RK808
Power Management System
10.3 BOOT1=1, BOOT0 = 0
PWRON_EN
BUCK4_EN
LDO1_EN
LDO3_EN
LDO4_EN
BUCK3_EN
BUCK1_EN
BUCK2_EN
SWITCH1_EN
NRESPWRON
toff2
toff1
ton1
ton4
ton5
ton6
ton3
TdONT
ton2
TdOFFT
Switch off sequence
power on sequence
Figure 10-3 Power On/Off Timing, BOOT1=1, BOOT0=0
10.4 BOOT1=1, BOOT0 = 1(RK808-B/RK808-C)
RK808-B:
PWRON_EN
LDO3_EN
BUCK1_EN
BUCK2_EN
BUCK3_EN
LDO7_EN
LDO1_EN
BUCK4_EN
LDO5_EN
SWITCH1_EN
NRESPWRON
2mS
2mS
2mS
ton6
2mS
toff2
2mS
2mS
2mS
2mS
toff1
TdONT
TdOFFT
Switch off sequence
power on sequence
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RK808
Power Management System
RK808-C:
PWRON_EN
LDO3_EN
BUCK1_EN
BUCK2_EN
BUCK3_EN
BUCK4_EN
LDO1_EN
NRESPWRON
ton1
toff2
ton2
toff1
ton3
ton0
ton5
ton6
ton4
TdONT
TdOFFT
Switch off sequence
power on sequence
10.5 BOOT TIMING CHARACTERISTIC
PARAMETERS
DESCRIPTION
Delay to 1st channel enable after power on
enable debouce time
MIN
TYP
MAX
UNIT
us
ton1
66×tCK32K
66×tCK32K
66×tCK32K
66×tCK32K
132×t CK32K
66×tCK32K
50
1st channel enable to 2st channel enable
delay
ton2
ton3
ton4
ton0
ton5
Ton6
toff1
Toff2
us
us
us
us
Us
ms
us
ms
2nd channel enable to 3rd channel enable
delay
3rd channel enable to 4th channel enable
delay
BUCK3 enable to BUCK4 enable
delay(ONLY in BOOT11 MODE)
4th channel enable to 5th channel enable
delay
The last channel enable to NRESPWRON
rising edge delay
PWRON disable to NRESPWRON falling
delay
1×tCK32K
2
NRESPWRON falling delay to supplies
disable delay
Table 10-2 Boot Timing Characteristics
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RK808
Power Management System
11 POWER CONTROL TIMING
11.1 DEVICE TURN-ON WITH PLUG_IN
VPLUG-IN
VPLUG-OUT
VDC
VPLUG_IN_STS
VPLUG_OUT_STS
PLUG_IN_INT
PLUG_OUT_INT
INT
Power On Enable
BUCK4_EN
NRESPWRON
PWRHOLD(internal)
TdbPLUG_OUT
TdbPLUG-IN
TdONT
Power on sequence
Figure 11-1Power ON Timing with VDC Plug in (PLUP_IN_INT Trigger a Power on Enable)
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RK808
Power Management System
11.2 DEVICE TURN OFF WITH FALLING INPUT VOLTAGE
VB_LO
VB_OK
VB_UV
VIN
VB_LO_STS
VB_UV_STS
Power On Enable
INT
TdbVB_LOF
TdbVB_UVF
TdbVB_LOR
TdONT
TdOFFT
Switch off sequence
Power on sequence
Figure 11-2 Power Control Timing with VIN Falling
11.3 TIMING CHARACTERISTICS(Vin rising/falling and
Plug-in)
PARAMETER
DESCRIPTION
MIN
TYP MAX UNIT
TdbVB_LOF
VB_LO falling-edge debouncing delay
Total power on delay time(ton1~ton6)
VB_LO rising-edge debouncing delay
2
ms
TdONT
62
2
ms
ms
TdbVB_LOR
2
TdVB_UVF
VB_UV falling-edge debouncing delay
Total power off delay time
ms
ms
2
TdOFFT
TdbPLUG_IN
VDC plug-in debouncing delay
VDC plug-out debouncing delay
100
100
ms
ms
TdbPLUG_OUT
Figure 11-3 Vin and PLUG_IN Timing Characteristics
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RK808
Power Management System
11.4 DEVICE STATE CONTROL THROUGH PWRON SIGNAL
PWRON
Power On Enable
BUCK4_EN
NRESPWRON
PWRON_INT
INT
DEV_OFF
TdONT
toff2
TdbPWRONF
toff1
TdbPWRONF
TdbPWRON_EN
TdOFFT
Switch on sequence
Switch off sequence
Figure 11-4 PWRON Turn-On/DEV_OFF Turn Off
PWRON
PWRON_EN
BUCK4_EN
NRESPWRON
INT
PWRON_INT=1
PWRON_LP_INT=1
PWRON_INT=1
TdPWRONLP
TdPWRONLPTO
toff2
TdbPWRONF
toff1
TdOFFT
Switch off sequence
Figure 11-5 PWRON Long Press Turn Off
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RK808
Power Management System
11.5 TIMING CHARACTERISTICS (PWRON, DEV_OFF)
PARAMETER
TdbPWRONF
TdONT
DESCRIPTION
MIN
TYP
MAX UNIT
PWRON falling-edge debouncing delay
500
ms
Total power on delay time(ton1~ton6)
62
6
ms
s
PWRON long press delay to interrupt
(PWRON falling edge to PWRON_LP_INT=1)
PWRON long press delay to turn off (PWRON
falling edge to NRESPWRON falling edge)
POWER ON disable to NRESPWRON falling
delay
TdPWRONLP
TdPWRONLPTO
toff1
8
s
1×t CK32K
us
NRESPWRON falling delay to supplies
disable delay
Toff2
2
2
ms
ms
TdOFFT
total power off delay time
Table 11-1 PWRON/DEV_OFF Timing Characteristics
11.6 DEVICE SLEEP STATE CONTROL
SLEEP
High-power mode
On mode
High-power mode
Low-power mode
Off mode
DC-DC
LDO(n)
On mode
TdbSLP2ACT
TdSLPON
TdbACT2SLP
Figure 11-6 SLEEP/ACTIVE Transition Timing
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RK808
Power Management System
11.7 TIMING CHARACTERISTICS (SLEEP)
PARAMETER
TdbACT2SLP
DESCRIPTION
MIN
TYP
MAX UNIT
SLEEP falling-edge debouncing delay
SLEEP rising-edge debouncing delay
3×t ck32k
3×t ck32k
1×t ck32k
us
us
us
TdbSLP2ACT
Delay to turn on enable after SLEEP
rising-edge debouncing
TdSLPON
Table 11-2 SLEEP Timing Characteristics
12 PIN ASSIGNMENT
VCC10
VLDO6
PWRON
1
2
51
50 SLEEP
INT
NC
NC
VLDO3
3
49
48
47
VCC7
4
5
VLDO7
VPPOTP
VSWOUT1
VCC8
6
46 GND5
7
45
44
43
42
VCC1
VCC1
SW1
8
QFN68
7×7
GND
VCCRTC
VCC12
9
10
11
SW1
VSWOUT2
41 GND1
40 GND1
VLDO4 12
VCC9 13
39
38
VFB1
VLDO5 14
VLDO8 15
DGND
37 VREF
VCCA
16
36
35
VCC11
VDDIO 17
VLDOA
Figure 12-1 Pin Assignment
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RK808
Power Management System
13 PINOUT DEFINITION
NO
9
NAME
VCCRTC
SUPPLIES
FUNCTIONAL
BLOCK
TYPE
Power
Analog
Analog
Digital
I/O
O
I
DESCRIPTION
PU/PD
NO
VCCRTC
/AGND
RTC power supply
65
66
68
OSC32KIN
OSC32KOUT
VCCRTC
/DGND
32KHz crystal oscillator
input
NO
VCCRTC
/DGND
I
32KHz
output
crystal
oscillator
NO
RTC
CLK32KOUT1 VCCRTC
/DGND
O
32KHz clock output 1,OD
output
NO
(always on)
67
37
CLK32KOUT2 VCCRTC
/DGND
Digital
O
O
32KHz clock output 2,OD
output
PD
PD
VREF
VCCA
Analog
bandgap voltage
/REFGND
REFGND
VCCA
REFERENCE
Analog Power
Analog Power
64
36
VREFGND
VCCA
Analog
Power
Gnd
I
reference ground
power supply for
NO
NO
/GNDA
VPPOTP
/GNDA
VCC1
6
VPPOTP
VCC1
VCC1
SW1
Power
Power
Power
Power
I
OTP power supply
NO
NO
NO
PD
45
44
43
42
41
40
39
I/O
I/O
I/O
buck1 dc-dc power
supply
/GND1
VCC1
buck1 dc-dc power
supply
/GND1
VCC1
buck1 dc-dc switch
output
/GND1
VCC1
SW1
BUCK1
/GND1
VCC1
GND1
GND1
VFB1
VCC2
Power
Gnd
buck1 dc-dc switch
ground
NO
/GND1
VCC1
/GND1
VCC1
Analog
Power
I
I
buck1 dc-dc switch
feedback voltage
buck2 dc-dc power
supply
PD
NO
/REFGND
VCC2
BUCK2
23
/GND2
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RK808
Power Management System
VCC2
SW2
VCC2
Power
Power
Power
Power
Power
Analog
Power
Power
Power
Analog
Power
Power
Power
Analog
I
I/O
I/O
Gnd
Gnd
I
buck2 dc-dc power
supply
NO
PD
PD
NO
NO
PD
NO
PD
NO
PD
NO
PD
NO
PD
24
25
/GND2
VCC2
buck2 dc-dc switch
output
/GND2
VCC2
SW2
buck2 dc-dc switch
output
26
/GND2
VCC2
GND2
GND2
VFB2
VCC3
SW3
buck2 dc-dc switch
ground
27
28
29
59
58
57
56
60
61
62
63
47
46
48
32
/GND2
VCC2
buck2 dc-dc switch
ground
/GND2
VCC2
buck2 dc-dc switch
feedback voltage
buck3 dc-dc power
supply
/REFGND
VCC3
I
/GND3
VCC3
I/O
Gnd
I
buck3 dc-dc switch
output
/GND3
VCC3
BUCK3
GND3
VFB3
VCC4
SW4
buck3 dc-dc switch
ground
/GND3
VCC3
buck3 dc-dc switch
feedback voltage
buck4 dc-dc power
supply
/REFGND
VCC4
I
/GND4
VCC4
I/O
Gnd
I
buck4 dc-dc switch
output
/GND4
VCC4
BUCK4
GND4
VFB4
NC
buck4 dc-dc switch
ground
/GND4
VCC4
buck4 dc-dc switch
feedback voltage
/REFGND
GND5
NC
VCCA
/GND5
Power
Gnd
ground
NO
VCC6
VCC7
VCC8
VCC6
/AGND
VCC7
/AGND
VCC8
/AGND
Power
Power
Power
I
I
I
LDO1,LDO2 power
supply
NO
NO
NO
4
LDO 1~8,
LDO3,LDO7 power
supply
SWITCH1,2
8
SWITCH1 power
supply
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RK808
Power Management System
VCC9
VCC9
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Digital
Digital
I
I
LDO4,LDO5 power
supply
NO
NO
NO
NO
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
NO
NO
NO
NO
NO
PD in
13
/AGND
VCC11
/AGND
VCC11
/AGND
VCC12
/AGND
VCC7
1
VCC10
VCC11
VCC12
VLDO1
VLDO2
VLDO3
VLDO4
VLDO5
VLDO6
VLDO7
VLDO8
VSWOUT1
VSWOUT2
AGND
LDO6 power supply
I
LDO8 power supply
16
10
31
33
I
SWITCH2 power
supply
O
LDO1 regulator output
/AGND
VCC7
O
LDO2 regulator output
LDO3 regulator output
LDO4 regulator output
LDO5 regulator output
LDO6 regulator output
LDO7 regulator output
LDO8 regulator output
Switch 1 output
/AGND
VCC8
3
O
/AGND
VCC9
O
12
14
/AGND
VCC10
/AGND
VCC9
O
2
O
/AGND
VCC1
5
O
1/AGND
VCC11
/AGND
VCC8
O
15
7
O
/AGND
VCC12
/AGND
POWER
PAD
O
Switch 2 output
11
Analog ground
LDOA
Gnd
I/O
Gnd
I/O
I
Analog ground
30
35
38
17
50
20
VLDOA
DGND
POWER
PAD
supply for internal analog
circuit
POWER
PAD
Digital ground
Digital ground
VDDIO
SLEEP
VDDIO
/DGND
VDDIO
/DGND
Digital I/O power supply
Active-Sleep state
IO
transition control signal
Power off reset for AP/
NRESPWRON VDDIO
/DGND
O
External
reset
digital power-off
state
core(excludes RTC)
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RK808
Power Management System
INT
VDDIO
/DGND
Digital
O
Interrupt flag (polarity
is I2C programmable,
Program
mable
PU/PD
NO
49
default active high)
External switch-on
control signal(ON button)
I2C data signal
PWRON
SDA
VCCRTC
/DGND
VDDIO
Digital
Digital
Digital
Digital
Digital
Digital
I
I/O
I/O
I
51
18
19
52
53
55
IO
NO
NO
NO
NO
PD
/DGND
VDDIO
SCL
I2C clock signal
/DGND
VCCRTC
/DGND
VCCRTC
/DGND
VCCRTC
/DGND
BOOT0
BOOT1
EXT_EN
Power-up
sequence
selection
I
Power-up
sequence
in
selection
O
Output enable for
external
BUCK
two-battery-cells
application
DVS1
DVS2
VDDIO
/DGND
Digital
Digital
I
I
BUCK1 DVS voltage
/normal voltage transition
control signal(polarity is
I2C programmable,
NO
NO
22
21
IO
default active high)
VDDIO
/DGND
BUCK2 DVS voltage
/normal voltage transition
control signal(polarity is
I2C programmable, default
active high)
DVSOK
VDC
VDDIO
/DGND
Digital
Digital
O
I
BUCK1 and BUCK2 power
good flag after dynamic
voltage setting
PD
NO
54
34
VDC
Adapter voltage detect
input
/AGND
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RK808
Power Management System
14 APPLICATION NOTE
No information here.
15 REGISTER DEFINITION
15.1 REGISTER SUMMARY
HEX
ACTION/
R/W
DEFAULT/
RESET
ADDRESS
DESCRIPTION
RTC REGISTERS
00
01
02
03
04
05
06
08
09
0A
0B
0C
0D
10
11
12
13
14
SECONDS REG
MINUTES REG
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
00
50
08
21
01
13
01
00
00
00
01
01
00
00
82
00
00
00
HOURS REG
DAYS_REG
MONTHS_REG
YEARS_REG
WEEKS_REG
ALARM_SECONDS_REG
ALARM_MINUTES REG
ALARM_HOURS REG
ALARM_DAYS_REG
ALARM_MONTHS_REG
ALARM_YEARS_REG
RTC_CTRL_REG
RTC_STATUS_REG
RTC_INT_REG
RTC_COMP_LSB_REG
RTC_COMP_MSB_REG
RESERVED REGISTERS
0E
0F
15
16
17
18
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RW
RW
RW
RW
RW
RW
00
00
00
00
00
00
MISC REGISTERS
CLK32KOUT_REG
20
RW
00
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RK808
Power Management System
21
22
VB_MON_REG
THERMAL_REG
RW
RW
06
00
POWER CHANNEL CONTROL/MONITOR REGISTERS
23
24
25
26
27
28
29
2A
2B
2C
2D
DCDC_EN_REG
LDO_EN_REG
RW
boot
boot
00
RW
RW
RW
RO
RW
RO
RW
RO
RO
RW
SLEEP_SET_OFF_REG1
SLEEP_SET_OFF_REG2
DCDC_UV_STS_REG
DCDC_UV_ACT_REG
LDO_UV_STS_REG
LDO_UV_ACT_REG
DCDC_PG_REG
00
00
1F
00
FF
00
LDO_PG_REG
00
VOUT_MON_TDB_REG
02
POWER CHANNEL CONFIGIGRATION REGISTERS
BUCK1_CONFIG_REG
BUCK1_ON_VSEL
2E
2F
30
31
32
33
34
35
36
37
38
39
90
3B
3C
3D
3E
3F
40
41
42
43
44
45
46
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
01
boot
00
BUCK1_SLP_VSEL
BUCK1_DVS_VSEL
00
BUCK2_CONFIG_REG
BUCK2_ON_VSEL
01
boot
00
BUCK2_SLP_VSEL
BUCK2_DVS_VSEL
00
BUCK3_CONFIG_REG
BUCK4_CONFIG_REG
BUCK4_ON_VSEL
01
00
boot
00
BUCK4_SLP_VSEL_REG
DCDC_ILMAX_REG
LDO1_ON_VSEL_REG
LDO1_SLP_VSEL_REG
LDO2_ON_VSEL_REG
LDO2_SLP_VSEL_REG
LDO3_ON_VSEL_REG
LDO3_SLP_VSEL_REG
LDO4_ON_VSEL_REG
LDO4_SLP_VSEL_REG
LDO5_ON_VSEL_REG
LDO5_SLP_VSEL_REG
LDO6_ON_VSEL_REG
LDO6_SLP_VSEL_REG
00
boot
00
boot
00
boot
00
boot
00
boot
00
boot
00
Version 1.0.1
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Power Management System
47
48
49
4A
4B
LDO7_ON_VSEL_REG
LDO7_SLP_VSEL_REG
LDO8_ON_VSEL_REG
LDO8_SLP_VSEL_REG
DEVCTRL_REG
RW
RW
RW
RW
RW
boot
00
boot
00
00
INTERRUPT REGISTERS
INT_STS_REG1
4C
4D
4E
4F
50
RW
RW
RW
RW
RW
00
00
00
00
06
INT_STS_MSK_REG1
INT_STS_REG2
INT_STS_MSK_REG2
IO_POL_REG
NOTE: Address 51h through 97h are for OTP registers. Customer’s accessibility to those
addresses is not allowed.
15.2 REGISTER DESCRIPTION
15.2.1 RTC REGISTERS
15.2.1.1 SECONDS_REG : RTC SECOND Register
Type: RW
Bit4
Address: 00H
Bit
SYMBOL
Default
Bit7
RESV
0
Bit6
0
Bit5
SEC1
0
Bit3
0
Bit2
SEC0
0
Bit1
0
Bit0
0
0
Description
Bit 7
Reserved
Bit 6-4
Bit 3-0
Note
Set the second digit of the RTC seconds (0-5)
Set the first digit of the RTC seconds (0-9)
BCD coding from 00 - 59
15.2.1.2 MINUTES_REG : RTC MINUTE Register
Type: RW
Bit4
Address: 01H
Bit
SYMBOL
Default
Bit7
RESV
0
Bit6
1
Bit5
MIN1
0
Bit3
0
Bit2
Bit1
0
Bit0
0
MIN0
1
0
Description
Bit 7
Reserved
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Power Management System
Bit 6-4
Bit 3-0
Note
Set the second digit of the RTC minutes
Set the first digit of the RTC minutes
BCD coding from 00 – 59
15.2.1.3 HOURS_REG : RTC HOUR Register
Address: 02H
Bit
Type: RW
Bit7
PM/AM
0
Bit6
RESV
0
Bit5
0
Bit4
Bit3
1
Bit2
Bit1
0
Bit0
0
SYMBOL
Default
HOUR1
HOUR0
0
0
Description
Bit 7
Bit 6
Set PM or AM: Only used in PM-AM mode, 1: PM. 0:AM.
Reserved
Bit 5-4
Bit 3-0
Note
Set the second digit of the RTC hours
Set the first digit of the RTC hours
HOUR1/0 BCD coding from 0-11/23
15.2.1.4 DAYS_REG : RTC DAY Register
Address: 03H
Bit
Type: RW
Bit7
RESV
0
Bit6
RESV
0
Bit5
1
Bit4
Bit3
0
Bit2
DAY0
Bit1
0
Bit0
1
DAY1
SYMBOL
Default
0
0
Description
Bit 7-6
Bit 5-4
Bit 3-0
Note
Reserved
Set the second digit of the RTC days
Set the first digit of the RTC days
BCD coding from 01 - 28/29/30/31
15.2.1.5 MONTHS_REG : RTC MONTH Register
Address: 04H
Bit
Type: RW
Bit4
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
0
Bit2
0
Bit1
Bit0
1
MONTH1
0
MONTH0
SYMBOL
Default
0
Description
Bit 7-5
Bit 4
Bit 3-0
Reserved
Set the second digit of the RTC months
Set the first digit of the RTC months
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Power Management System
Note
BCD coding from 01 - 12
15.2.1.6 YEARS_REG : RTC YEAR Register
Address: 05H
Bit
Type: RW
Bit4
Bit7
0
Bit6
Bit5
0
Bit3
0
Bit2
YEAR0
Bit1
1
Bit0
1
YEAR1
SYMBOL
Default
0
1
0
Description
Bit 7-5
Bit 3-0
Note
Set the second digit of the RTC years
Set the first digit of the RTC years
BCD coding from 00 - 99
15.2.1.7 WEEKS_REG : RTC WEEK Register
Address: 06H
Bit
Type: RW
Bit4
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
RESV
0
Bit2
0
Bit1
WEEK
0
Bit0
1
RESV
0
SYMBOL
Default
Description
Bit 7-3
Bit 2-0
Note
Reserved
Set the RTC weeks
BCD coding from 1 - 7
15.2.1.8 ALARM_SECONDS_REG : RTC ALARM SECOND Register
Address: 08H
Bit
Type: RW
Bit4
Bit7
RESV
0
Bit6
0
Bit5
Bit3
0
Bit2
Bit1
Bit0
0
ALARM_SEC1
ALARM_SEC0
SYMBOL
Default
0
0
0
0
Description
Bit 7
Reserved
Bit 6-4
Bit 3-0
Note
Set the second digit of the RTC alarm seconds
Set the first digit of the RTC alarm seconds
BCD coding from 00 - 59
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Power Management System
15.2.1.9 ALARM_MINUTES_REG : RTC ALARM MINUTE Register
Address: 09H
Bit
Type: RW
Bit4
Bit7
RESV
0
Bit6
0
Bit5
Bit3
0
Bit2
Bit1
Bit0
0
ALARM_MIN1
ALARM_MIN0
SYMBOL
Default
0
0
0
0
Description
Bit 7
Reserved
Bit 6-4
Bit 3-0
Note
Set the second digit of the RTC alarm minutes
Set the first digit of the RTC alarm minutes
BCD coding from 00 - 59
15.2.1.10 ALARM_HOURS_REG : RTC ALARM HOUR Register
Address: 0AH
Bit
Type: RW
Bit4
Bit7
Bit6
Bit5
Bit3
0
Bit2
Bit1
Bit0
ALARM_PM_AM RESV
ALARM_HOUR1
ALARM_HOUR0
SYMBOL
Default
0
0
0
0
0
0
0
Description
Bit 7
Bit 6
Set PM or AM: Only used in PM-AM mode, 1: PM. 0:AM.
Reserved
Bit 5-4
Bit 3-0
Note
Set the second digit of the RTC alarm hours
Set the first digit of the RTC alarm hours
HOUR1/0 BCD coding from 0-11/23
15.2.1.11 ALARM_DAYS_REG : RTC ALARM DAY Register
Address: 0BH
Bit
Type: RW
Bit4
Bit7
RESV
0
Bit6
RESV
0
Bit5
Bit3
0
Bit2
Bit1
Bit0
1
ALARM_DAY1
ALARM_DAY0
SYMBOL
Default
0
0
0
0
Description
Bit 7-6
Reserved
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Power Management System
Bit 5-4
Bit 3-0
Note
Set the second digit of the RTC alarm days
Set the first digit of the RTC alarm days
BCD coding from 01 - 28/29/30/31
15.2.1.12 ALARM_MONTHS_REG : RTC ALARM MONTH Register
Address: 0CH
Bit
Type: RW
Bit4
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
0
Bit2
Bit1
Bit0
1
ALARM_
MONTH1
0
SYMBOL
ALARM_MONTH0
Default
0
0
Description
Bit 7-5
Bit 4
Bit 3-0
Note
Reserved
Set the second digit of the RTC alarm months
Set the first digit of the RTC alarm months
BCD coding from 01 - 12
15.2.1.13 ALARM_YEARS_REG : RTC ALARM YEAR Register
Address: 0DH
Bit
Type: RW
Bit7
0
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
ALARM_YEAR1
ALARM_YEAR0
SYMBOL
Default
0
0
0
0
0
0
0
Description
Bit 7-4
Bit 3-0
Note
Set the second digit of the RTC alarm years
Set the first digit of the RTC alarm years
BCD coding from 00 - 99
15.2.1.14 RTC_CTRL_REG : RTC Control Register
Address: 10H
Type: RW
Bit4
Bit
Bit7
Bit6
GET_TI
ME
Bit5
Bit3
Bit2
AUTO_
COMP
Bit1
Bit0
STOP_
RTC
RTC_READ
SET_32_
COUNTER
TEST_M
ODE
0
AMPM_
MODE
0
ROUND_30S
(Auto Clr)
0
SYMBOL
SEL
Default
0
0
0
0
0
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Power Management System
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RTC_READSEL: 0: Read access directly to dynamic registers.
1: Read access to static shadowed registers
GET_TIME: Rising transition of this register transfers dynamic registers into
static shadowed registers.
SET_32_COUNTER: 1: set the 32-kHz counter with COMP_REG value. It must
only be used when the RTC is frozen.
TEST_MODE: 1: test mode (Auto compensation is enable when the 32kHz
counter reaches at its end)
AMPM_MODE: 0: 24 hours mode.
1: 12 hours mode (PM-AM mode)
AUTO_COMP:
0: No auto compensation RW0.
1: Auto compensation enabled
ROUND_30S: 1: When 1 is written, the time is rounded to the closest
minute in next second. self cleared after rounding
STOP_RTC: 1: RTC is frozen.
0: RTC is running.
RTC_time can only be changed during RTC frozen
15.2.1.15 RTC_STATUS_REG : RTC Status Register
Address: 11H
Type: RW
Bit4
Bit
Bit7
Bit6
ALARM
(Write 1
Clr)
Bit5
Bit3
Bit2
Bit1
Bit0
SYMBOL
POWER_UP
(Write 1 Clr)
EVENT_1D
(Write 1 Clr)
EVENT_1H
(Write 1 Clr)
EVENT_1M
(Write 1 Clr)
EVENT_1S
(Write 1 Clr)
RUN
(RO)
RESV
Default
1
0
0
0
0
0
1
0
Description
Bit 7
Bit 6
POWER_UP: POWER_UP is set by a reset, is cleared by writing one in this
bit.
ALARM: Indicates that an alarm interrupt has been generated (bit clear by
writing 1) The alarm interrupt keeps its low level, until the micro-controller
writes 1 in the ALARM bit of the RTC_STATUS register.The timer interrupt is a
low-level pulse (15 μs duration).
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
EVENT_1D: One day has occurred
EVENT_1H: One hour has occurred
EVENT_1M: One minute has occurred
EVENT_1S :One secondr has occurred
RUN: 0, RTC is frozen. 1, RTC is running. This bit shows the real state of the
RTC
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Power Management System
Bit 0
RESEVERED
15.2.1.16 RTC_INT_REG : RTC Interrupt Register
Address: 12H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
0
INT_SLEEP_
MASK_EN
INT_ALARM INT_TIMER
EVERY
SYMBOL
RESV
RESV
RESV
_EN
_EN
Default
0
0
0
0
0
0
0
Description
Bit 7-5
Bit 4
RESEVERED
INT_SLEEP_MASK_EN:
1: Mask periodic interrupt while the device is in SLEEP mode
0: Normal mode, no interrupt masked.
Bit 3
INT_ALARM_EN: Enable one interrupt when the alarm value is reached
1: Enable
0: Disable
Bit 2
INT_TIMER_EN:Enable periodic interrupt
1:Enable
0:Disable
Bit 1-0
EVERY: 00: every second 01: every minute 10: every hour 11: every
day
15.2.1.17 RTC_COMP_LSB_REG : RTC Comensation LSB Register
Address: 13H
Bit
Type: RW
Bit4
Bit7
0
Bit6
0
Bit5
0
Bit3
Bit2
0
Bit1
0
Bit0
0
RTC_COMP_LSB
SYMBOL
Default
0
0
Description
Bit7-0
This register contains the number of 32-kHz periods to be added into the
32KHz counter every hour [LSB]
15.2.1.18 RTC_COMP_MSB_REG : RTC Compensation MSB Register
Address: 14H
Type: RW
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Power Management System
Bit
Bit7
0
Bit6
0
Bit5
0
Bit4
Bit3
Bit2
Bit1
Bit0
RTC_COMP_MSB
SYMBOL
Default
0
0
0
0
0
Description
Bit7-0
This register contains the number of 32-kHz periods to be added into the
32KHz counter every hour [MSB]
15.2.2 MISC REGISTERS
15.2.2.1 CLK32KOUT_REG : RTC Compensation MSB Register
Address: 20H
Bit
Type: RW
Bit7
0
Bit6
0
Bit5
Bit4
RESERVED
0
Bit3
Bit2
0
Bit1
0
Bit0
CLK32KOUT2
SYMBOL
_EN
Default
0
0
0
Description
Bit 7-1
Bit 0
Reserved
CLK32KOUT2_EN:
1. CLK32KOUT2 output is enabled
0. CLK32KOUT2 output is disabled
15.2.2.2 VB_MON_REG : Battery Voltage Monitor Register
Address: 21H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
VB_LO_
STS
Bit2
1
Bit1
VB_LO_SEL
1
Bit0
0
PLUG_OU PLUG_IN VB_UV_
SYMBOL
VB_LO_
ACT
T_STS
(RO)
0
_STS
(RO)
0
STS
(RO)
0
(RO)
0
Default
Bit 7
0
Description
PLUG_OUT_STS: charger plug-out event occurs(DC PIN voltage <3.5V)
0: no charger plug out
1: charger pluged out
This bit is read only
Bit 6
PLUG_IN_STS: charger plug-in event occurs(DC PIN voltage >3.8V)
0: no charger plug in
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Power Management System
1: charger pluged in
This bit is read only
Bit 5
Bit 4
Bit 3
VB_UV_STS: Battery under voltage lockout status(shut down system if the
bit=1)
This bit is read only
VB_LO_ACT: VBAT low action
0: shut down system
1: insert interrupt
VB_LO_STS: Battery low voltage status
0: VBAT>VB_LO_SEL
1: VBAT<VB_LO_SEL
This bit is read only
Bit 2-0
VB_LO_SEL: Battery low voltage threshold
000~111: 2.8V~ 3.5V, step=100mV
15.2.2.3 THERMAL_REG : Thermal Control Register
Address: 22H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
TSD_T
EMP
HOTDIE_STS TSD_STS
SYMBOL
RESV RESV
HOTDIE_TEMP
(RO)
(RO)
Default
0
0
0
0
0
0
0
Description
Bit 7-5
Bit 4
Reserved
TSD_TEMP: Thermal shutdown temperture threshold
0: 140℃;
1: 170℃
Bit 3-2
HOTDIE_TEMP: Hot-die temperature threshold
00: 85℃;
01: 95℃;
10: 105℃;
11: 115℃
Bit 1
Bit 0
HOTDIE_STS: Hot-die warning
This bit is read only bit.
TSD_STS: Thermal shut down
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Power Management System
15.2.3 POWER CHANNEL CONTROL/MONITOR REGISTERS
15.2.3.1 DCDC_EN_REG : DC-DC Converter Enable Register
Address: 23H
Bit
Type: RW
Bit4
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
SWITC SWITC
H2_EN H1_EN
BUCK4 BUCK3 BUCK2 BUCK1
SYMBOL
RESV
RESV
Boot
Description
_EN
_EN
_EN
_EN
Default
Bit 7
Reserved
Bit 6-5
SWITCH(n): SWITCH1 and SWITCH2 enable
1, Enable
0, Disable
The default value is set by boot.
Reserved
Bit 4
Bit 3-0
BUCK(n)_EN: BUCKn enable
1, Enable
0, Disable
The default value is set by boot.
15.2.3.2 LDO_EN_REG : LDO Enable Register
Address: 24H
Bit
Type: RW
Bit4
Bit7
LDO8_
EN
Bit6
LDO7_
EN
Bit5
LDO6_
EN
Bit3
Bit2
LDO3_
EN
Bit1
LDO2_
EN
Bit0
LDO1_
EN
LDO5_
EN
LDO4_
EN
SYMBOL
Default
Boot
Description
Bit 7-0
LDOn: LDO(n) enable
1, Enable
0, Disable
The default value is set by boot.
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15.2.3.3 SLEEP_SET_OFF_REG1 : Sleep set Off Register #1
Address: 25H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
SWITCH2_ SWITCH1_
BUCK4_S
BUCK3_S
BUCK2_S
BUCK1_
RESV
SLP_SET_ SLP_SET_
RESV
LP_SET_O LP_SET_O LP_SET_O SLP_SE
SYMBOL
Default
OFF
OFF
FF
FF
FF
T_OFF
0
0
0
0
0
0
0
0
Description
Bit 7
Bit 6
Reserved
1: Switch2 is set off in sleep mode
0: Switch2 is enable in sleep mode
1: Switch1 is set off in sleep mode
0: Switch1 is enable in sleep mode
Reserved
Bit 5
Bit 4
Bit 3
1: Buck4 is set off in sleep mode
0: Buck4 is enable in sleep mode
1: Buck3 is set off in sleep mode
0: Buck3 is enable in sleep mode
1: Buck2 is set off in sleep mode
0: Buck2 is enable in sleep mode
1: Buck1 is set off in sleep mode
0: Buck1 is enable in sleep mode
Bit 2
Bit 1
Bit 0
15.2.3.4 SLEEP_SET_OFF_REG2 : Sleep set Off Register #2
Address: 26H
Bit
Type: RW
Bit4
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
LDO8_S
LDO7_S
LDO6_S
LDO5_S
LDO4_S
LDO3_S
LDO2_S
LDO1_S
SYMBOL
LP_SET_ LP_SET_ LP_SET_ LP_SET_ LP_SET_ LP_SET_ LP_SET_ LP_SET_
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Default
0
0
0
0
0
0
0
0
Description
Bit 7
Bit 6
Bit 5
1: LDO8 is set off in sleep mode
0: LDO8 is enable in sleep mode
1: LDO7 is set off in sleep mode
0: LDO7 is enable in sleep mode
1: LDO6 is set off in sleep mode
0: LDO6 is enable in sleep mode
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Power Management System
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1: LDO5 is set off in sleep mode
0: LDO5 is enable in sleep mode
1: LDO4 is set off in sleep mode
0: LDO4 is enable in sleep mode
1: LDO3 is set off in sleep mode
0: LDO3 is enable in sleep mode
1: LDO2 is set off in sleep mode
0: LDO2 is enable in sleep mode
1: LDO1 is set off in sleep mode
0: LDO1 is enable in sleep mode
15.2.3.5 DCDC_UV_STS_REG : DC-DC Under Voltage Status Register
Address: 27H
Type:
Bit4
R
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
BUCK4_
UV_STS
0
Bit2
BUCK3_
UV_STS
0
Bit1
BUCK2_
UV_STS
0
Bit0
BUCK1_
UV_STS
0
SYMBOL
RESV
Default
0
Description
Bit 7-5
Bit 4
Reserved
Reserved
Bit 3
BUCK4_UV_STS: BUCK4 under voltage flag.
1: Output voltage drop below 85% of nominal voltage
0: Normal
Bit 2
Bit 1
Bit 0
BUCK3_UV_STS: BUCK3 under voltage flag.
1: Output voltage drop below 85% of nominal voltage
0: Normal
BUCK2_UV_STS: BUCK2 under voltage flag.
1: Output voltage drop below 85% of nominal voltage
0: Normal
BUCK1_UV_STS: BUCK1 under voltage flag.
1: Output voltage drop below 85% of nominal voltage
0: Normal
15.2.3.6 DCDC_UV_ACT_REG : DC-DC Under Voltage Action Register
Address: 28H
Bit Bit7
Type:
Bit4
R
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
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Power Management System
BUCK4_
UV_ACT
1
BUCK3_
UV_ACT
1
BUCK2_
UV_ACT
1
BUCK1_
UV_ACT
1
SYMBOL
Default
RESV
RESV
RESV
RESV
0
0
0
1
Description
Bit 7-5 Reserved
Bit 4
Bit 3
Reserved
BUCK4_UV_ACT: BUCK4 under voltage flag.
1: restart converter
0: No effect
Bit 2
Bit 1
Bit 0
BUCK3_UV_ACT: BUCK3 under voltage flag.
1: restart converter
0: No effect
BUCK2_UV_ACT: BUCK2 under voltage flag.
1: restart converter
0: No effect
BUCK1_UV_ACT: BUCK1 under voltage flag.
1: restart converter
0: No effect
15.2.3.7 LDO_UV_STS_REG : LDO Under Voltage Status Register
Address: 29H
Type:
Bit4
R
Bit
Bit7
LDO8_UV
_STS
Bit6
LDO7_UV
_STS
Bit5
LDO6_UV
_STS
Bit3
LDO4_UV
_STS
Bit2
LDO3_U
V_STS
Bit1
LDO2_U
V_STS
Bit0
LDO1_U
V_STS
SYMBOL
LDO5_UV
_STS
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
0
0
0
0
0
0
0
0
Description
LDO8_UV_STS: LDO8 under voltage flag.
1, Output voltage drop below 85% of nominal voltage
0, Normal
LDO7_UV_STS: LDO7 under voltage flag.
1, Output voltage drop below 85% of nominal voltage
0, Normal
LDO6_UV_STS: LDO6 under voltage flag.
1, Output voltage drop below 85% of nominal voltage
0, Normal
LDO5_UV_STS: LDO5 under voltage flag.
1, Output voltage drop below 85% of nominal voltage
0, Normal
LDO4_UV_STS: LDO4 under voltage flag.
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RK808
Power Management System
1, Output voltage drop below 85% of nominal voltage
0, Normal
Bit 2
Bit 1
Bit 0
LDO3_UV_STS: LDO3 under voltage flag.
1, Output voltage drop below 85% of nominal voltage
0, Normal
LDO2_UV_STS: LDO2 under voltage flag.
1, Output voltage drop below 85% of nominal voltage
0, Normal
LDO1_UV_STS: LDO1 under voltage flag.
1, Output voltage drop below 85% of nominal voltage
0, Normal
15.2.3.8 LDO_UV_ACT_REG : LDO Under Voltage Action Register
Address: 2AH
Bit
Type: RW
Bit4
Bit7
LDO8_U
V_ACT
Bit6
LDO7_U
V_ACT
Bit5
LDO6_U
V_ACT
Bit3
Bit2
LDO3_U
V_ACT
Bit1
LDO2_U
V_ACT
Bit0
LDO1_U
V_ACT
SYMBOL
LDO5_U
LDO4_U
V_ACT
V_ACT
Default
1
1
1
1
1
1
1
1
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
LDO8_UV_ACT: LDO8 under voltage action
1: restart converter
0: No effect
LDO7_UV_ACT: LDO7 under voltage action
1: restart converter
0: No effect
LDO6_UV_ACT: LDO6 under voltage action
1: restart converter
0: No effect
LDO5_UV_ACT: LDO5 under voltage action
1: restart converter
0: No effect
LDO4_UV_ACT: LDO4 under voltage action
1: restart converter
0: No effect
LDO3_UV_ACT: LDO3 under voltage action
1: restart converter
0: No effect
LDO2_UV_ACT: LDO2 under voltage action
1: restart converter
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Power Management System
0: No effect
Bit 0
LDO1_UV_ACT: LDO1 under voltage action
1: restart converter
0: No effect
15.2.3.9 DCDC_PG_REG : DC-DC Converter Power Good Status
Register
Address: 2BH
Type:
Bit4
R
Bit
Bit7
Bit6
RESV
0
Bit5
RESV
0
Bit3
Bit2
Bit1
Bit0
BUCK4_P BUCK3_P BUCK2_P BUCK1_P
SYMBOL
RESV
RESV
G_STS
G_STS
G_STS
G_STS
Default
0
0
0
0
0
0
Description
Bit 7-5
Bit 4
Reserved
Reserved
Bit 3
Bit 2
Bit 1
Bit 0
BUCK4_PG_STS : BUCK4 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
BUCK3_PG_STS : BUCK3 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
BUCK2_PG_STS : BUCK2 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
BUCK1_PG_STS : BUCK1 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
15.2.3.10 LDO_PG_REG : LDO Power Good Status Register
Address: 2CH
Type:
Bit4
R
Bit
Bit7
LDO8_PG
_STS
Bit6
LDO7_PG
_STS
Bit5
LDO6_PG
_STS
Bit3
LDO4_PG
_STS
Bit2
LDO3_P
G_STS
Bit1
LDO2_P
G_STS
Bit0
LDO1_P
G_STS
SYMBOL
LDO5_PG
_STS
Default
0
0
0
0
0
0
0
0
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Power Management System
Description
LDO8_PG_STS : LDO8 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
LDO7_PG_STS : LDO7 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
LDO6_PG_STS : LDO6 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
LDO5_PG_STS : LDO5 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
LDO4_PG_STS : LDO4 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
LDO3_PG_STS : LDO3 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
LDO2_PG_STS : LDO2 power good flag.
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
LDO1_PG_STS : LDO1 power good flag.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1: Power good, Vout>90% of setting voltage
0: Power not good, Vout<90% of setting voltage
15.2.3.11 VOUT_MON_TDB_REG : VOUT Debounce Monitor Register
Address: 2DH
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
RESV
0
Bit2
RESV
0
Bit1
Bit0
SYMBOL
RESV
VOUT_MON_TDB
Default
0
1
0
Description
Bit 7-2
Bit 1-0
Reserved
VOUT_MON_TDB: Vout monitor debouncing time(UV_STS rising edge and
PG_STS rising edge debounce time)
00: 62us
01: 124us
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Power Management System
10: 186us(default)
11: 248us
15.2.4 POWER CHANNEL CONFIGURATION REGISTERS
15.2.4.1 BUCK1_CONFIG_REG : BUCK1 Configuration Register
Address: 2EH
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
BUCK1_
PHASE
0
Bit5
RESV
0
Bit3
Bit2
0
Bit1
BUCK1_ILMIN
0
Bit0
1
SYMBOL
BUCK1_RATE
Default
0
0
Description
Bit 7
Bit 6
Reserved
BUCK1_PHASE,
0: Normal,
1: Inverted
Reserved
Bit 5
Bit 4-3
BUCK1_RATE: Voltage change rate after DVS
00: 2mv/us
01: 4mv/us
10: 6mv/us
11: 10mv/us
Bit 2-0
BUCK1_ILMIN: The minimum of inductor current
000: 50mA
001: 100mA(default);
010: 150mA
011: 200mA
100: 250mA
101: 300mA
110: 350mA
111: 400mA
15.2.4.2 BUCK1_ON_VSEL : BUCK1 Active Mode Register
Address: 2FH
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
SYMBOL
RESV
RESV
BUCK1_ON_VSEL
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Default
Boot
Description
Bit 7
Bit 6
Reserved
Reserved
Bit 5-0
BUCK1_ON_VSEL:
0.7125V~1.5V ,step=12.5mV
000 000: 0.7125V
000 001: 0.725V
BUCK1
active
mode
voltage
select,
……
111 111: 1.5V
The default value is set by boot.
15.2.4.3 BUCK1_SLP_VSEL : BUCK1 Sleep Mode Register
Address: 30H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
0
Bit3
Bit2
Bit1
0
Bit0
0
SYMBOL
BUCK1_SLP_VSEL
Default
0
0
0
Description
Bit 7
Bit 6
Reserved
Reserved
Bit 5-0
BUCK1_SLP_VSEL:
BUCK1
sleep
mode
voltage
select,
0.7125V~1.5V ,step=12.5mV
000 000: 0.7125V
000 001: 0.725V
……
111 111: 1.5V
15.2.4.4 BUCK1_DVS_VSEL : BUCK1 DVS Mode Register
Address: 31H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
0
Bit3
Bit2
Bit1
Bit0
0
BUCK1_DVS_VSEL
SYMBOL
Default
0
0
0
0
Description
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Power Management System
Bit 7-6
Bit 5-0
Reserved
BUCK1_DVS_VSEL:
BUCK1
DVS
voltage
select,
0.7125V~1.5V ,step=12.5mV
000 000: 0.7125V
000 001: 0.725V
……
111 111: 1. 5V
15.2.4.5 BUCK2_CONFIG_REG : BUCK2 Configuration Register
Address: 32H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
BUCK2_
PHASE
0
Bit5
RESV
0
Bit3
Bit2
0
Bit1
BUCK2_ILMIN
0
Bit0
1
SYMBOL
BUCK2_RATE
Default
0
0
Description
Bit 7
Bit 6
Reserved
BUCK2_PHASE,
0: Normal,
1: Inverted
Reserved
Bit 5
Bit 4-3
BUCK2_RATE: Voltage change rate after DVS
00: 2mv/us
01: 4mv/us
10: 6mv/us
11: 10mv/us
Bit 2-0
BUCK2_ILMIN: The minimum of inductor current
000: 50mA
001: 100mA(default);
010: 150mA
011: 200mA
100: 250mA
101: 300mA
110: 350mA
111: 400mA
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Power Management System
15.2.4.6 BUCK2_ON_VSEL : BUCK2 Active Mode Register
Address: 33H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
SYMBOL
RESV
RESV
BUCK2_ON_VSEL
Default
Boot
Description
Bit 7
Bit 6
Reserved
Reserved
Bit 5-0
BUCK2_ON_VSEL:
BUCK2
active
mode
voltage
select,
0.7125V~1.5V ,step=12.5mV
000 000: 0.7125V
000 001: 0.725V
……
111 111: 1.5V
The default value is set by boot.
15.2.4.7 BUCK2_SLP_VSEL : BUCK2 Sleep Mode Register
Address: 34H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
0
Bit3
Bit2
Bit1
Bit0
0
SYMBOL
BUCK2_SLP_VSEL
Default
0
0
0
0
Description
Bit 7
Bit 6
Reserved
Reserved
Bit 5-0
BUCK2_SLP_VSEL:
BUCK1
sleep
mode
voltage
select,
0.7125V~1.5V ,step=12.5mV
000 000: 0.7125V
000 001: 0.725V
……
111 111: 1.5V
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Power Management System
15.2.4.8 BUCK2_DVS_VSEL : BUCK2 DVS Mode Register
Address: 35H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
0
Bit3
Bit2
Bit1
0
Bit0
0
BUCK2_DVS_VSEL
SYMBOL
Default
0
0
0
Description
BUCK1
Bit 7-6
Bit 5-0
Reserved
BUCK2_DVS_VSEL:
DVS
voltage
select,
0.7125V~1.5V ,step=12.5mV
000 000: 0.7125V
000 001: 0.725V
……
111 111: 1.5V
15.2.4.9 BUCK3_CONFIG_REG : BUCK3 Configuration Register
Address: 36H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
Bit5
RESV
0
Bit3
RESV
0
Bit2
0
Bit1
Bit0
SYMBOL
BUCK3_
PHASE
RESV
BUCK3_ILMIN
Default
0
0
0
1
Description
Bit 7
Bit 6
Reserved
BUCK3_PHASE,
0: Normal,
1: Inverted
Reserved
Bit 5-3
Bit 2-0
BUCK3_ILMIN: The minimum of inductor current
000: 50mA
001: 100mA(default);
010: 150mA
011: 200mA
100: 250mA
101: 300mA
110: 350mA
111: 400mA
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Power Management System
15.2.4.10 BUCK4_CONFIG_REG : BUCK4 Configuration Register
Address: 37H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
BUCK4_
PHASE
0
Bit5
RESV
0
Bit3
RESV
0
Bit2
0
Bit1
BUCK4_ILMIN
0
Bit0
0
SYMBOL
RESV
Default
0
Description
Bit 7
Bit 6
Reserved
BUCK4_PHASE,
0: Normal,
1: Inverted
Bit 2-0
BUCK4_ILMIN:The minimum of inductor current
000: 50mA
001: 100mA(default);
010: 150mA
011: 200mA
100: 250mA
101: 300mA
110: 350mA
111: 400mA
15.2.4.11 BUCK4_ON_VSEL : BUCK4 Active Mode Register
Address: 38H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
SYMBOL
RESV
RESV
RESV
RESV
BUCK4_ON_VSEL
Default
Boot
Description
Bit 7
Bit 6-4
Bit 3-0
Reserved
Reserved
BUCK4_ON_VSEL:
BUCK4
active
mode
voltage
select,
1.8V~3.3V ,step=100mV
0000: 1.8V
0001: 1.9V
……
1110: 3.2V
1111: 3.3V
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Power Management System
the default value is set by boot.
15.2.4.12 BUCK4_SLP_VSEL : BUCK4 Sleep Mode Register
Address: 39H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
0
Bit2
Bit1
Bit0
0
SYMBOL
RESV
BUCK4_SLP_VSEL
Default
0
0
0
Description
Bit 7
Bit 6-4
Bit 3-0
Reserved
Reserved
BUCK4_SLP_VSEL:
BUCK4
sleep
mode
voltage
select,
1.8V~3.3V ,step=100mV
0000: 1.8V
0001: 1.9V
……
1110: 3.2V
1111: 3.3V
15.2.4.13 LDO1_ON_VSEL_REG : LDO1 Active Mode Voltage Select
Address: 3BH
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
RESV
RESV
RESV
LDO1_ON_VSEL
SYMBOL
Default
Boot
Description
Bit 7-5
Bit 4-0
Reserved
LDO1_ON_VSEL: LDO1 active mode voltage select.
1.8V~3.4V, step=0.1V
00000: 1.8V
00001: 1.9V
….
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01110: 3.2V
01111: 3.3V
10000: 3.4V
the default value is set by boot.
15.2.4.14 LDO1_SLP_VSEL_REG : LDO1 Sleep Mode Voltage Select
Address: 3CH
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
Bit2
Bit1
0
Bit0
0
LDO1_SLP_VSEL
SYMBOL
Default
0
0
0
Description
Bit 7-5
Bit 4-0
Reserved
LDO1_SLP_VSEL: LDO1 SLEEP mode voltage select.
1.8V~3.4V, step=0.1V
00000: 1.8V
00001: 1.9V
….
01110: 3.2V
01111: 3.3V
10000: 3.4V
15.2.4.15 LDO2_ON_VSEL_REG : LDO2 Active Mode Voltage Select
Address: 3DH
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
RESV
RESV
RESV
LDO2_ON_VSEL
SYMBOL
Default
Boot
Description
Bit 7-5
Bit 4-0
Reserved
LDO2_ON_VSEL: LDO2 active mode voltage select.
1.8V~3.4V, step=0.1V
00000: 1.8V
00001: 1.9V
….
01110: 3.2V
01111: 3.3V
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Power Management System
10000: 3.4V
the default value is set by boot.
15.2.4.16 LDO2_SLP_VSEL_REG : LDO2 Sleep Mode Voltage Select
Address: 3EH
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
Bit2
Bit1
0
Bit0
0
LDO2_SLP_VSEL
SYMBOL
Default
0
0
0
Description
Bit 7-5
Bit 4-0
Reserved
LDO2_SLP_VSEL: LDO2 SLEEP mode voltage select.
1.8V~3.4V, step=0.1V
00000: 1.8V
00001: 1.9V
….
01110: 3.2V
01111: 3.3V
10000: 3.4V
15.2.4.17 LDO3_ON_VSEL_REG : LDO3 Active Mode Voltage Sel
Address: 3FH
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
RESV
RESV
RESV
RESV
LDO3_ON_VSEL
SYMBOL
Default
Boot
Description
Bit 7-4
Bit 3-0
Reserved
LDO3_ON_VSEL: LDO3 active voltage select.
0.8V~2.5V, step=0.1V
0000: 0.8V
0001: 0.9V
….
1100: 2.0V
1101: 2.2V
1111: 2.5V
the default value is set by boot.
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Power Management System
15.2.4.18 LDO3_SLP_VSEL_REG : LDO3 Sleep Mode Voltage Select
Address: 40H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
0
Bit2
Bit1
Bit0
0
RESV
LDO3_SLP_VSEL
SYMBOL
Default
0
0
0
Description
Bit 7-4
Bit 3-0
Reserved
LDO3_SLP_VSEL: LDO3 SLEEP mode voltage select.
0.8V~2.5V, step=0.1V
0000: 0.8V
0001: 0.9V
….
1100: 2.0V
1101: 2.2V
1111: 2.5V
the default value is set by boot.
15.2.4.19 LDO4_ON_VSEL_REG : LDO4 Active Mode Voltage Select
Address: 41H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
RESV
RESV
RESV
LDO4_ON_VSEL
SYMBOL
Default
Boot
Description
Bit 7-5
Bit 4-0
Reserved
LDO4_ON_VSEL: LDO4 active mode voltage select.
1.8V~3.4V, step=0.1V
00000: 1.8V
00001: 1.9V
….
01110: 3.2V
01111: 3.3V
10000: 3.4V
the default value is set by boot.
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Power Management System
15.2.4.20 LDO4_SLP_VSEL_REG : LDO4 Sleep Mode Voltage Select
Address: 42H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
Bit2
Bit1
0
Bit0
0
LDO4_SLP_VSEL
SYMBOL
Default
0
0
0
Description
Bit 7-5
Bit 4-0
Reserved
LDO2_SLP_VSEL: LDO2 SLEEP mode voltage select.
1.8V~3.4V, step=0.1V
00000: 1.8V
00001: 1.9V
….
01110: 3.2V
01111: 3.3V
10000: 3.4V
15.2.4.21 LDO5_ON_VSEL_REG : LDO5 Active Mode Voltage Select
Address: 43H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
RESV
RESV
RESV
LDO5_ON_VSEL
SYMBOL
Default
Boot
Description
Bit 7-5
Bit 4-0
Reserved
LDO5_ON_VSEL: LDO5 active mode voltage select.
1.8V~3.4V, step=0.1V
00000: 1.8V
00001: 1.9V
….
01110: 3.2V
01111: 3.3V
10000: 3.4V
the default value is set by boot.
Version 1.0.1
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Power Management System
15.2.4.22 LDO5_SLP_VSEL_REG : LDO5 Sleep Mode Voltage Select
Address: 44H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit3
0
Bit2
Bit1
Bit0
0
LDO5_SLP_VSEL
SYMBOL
Default
0
0
0
Description
Bit 7-5
Bit 4-0
Reserved
LDO5_SLP_VSEL: LDO5 SLEEP mode voltage select.
1.8V~3.4V, step=0.1V
00000: 1.8V
00001: 1.9V
….
01110: 3.2V
01111: 3.3V
10000: 3.4V
15.2.4.23 LDO6_ON_VSEL_REG : LDO6 Active Mode Voltage Select
Address: 45H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
RESV
RESV
RESV
LDO6_ON_VSEL
SYMBOL
Default
Boot
Description
Bit 7-5
Bit 4-0
Reserved
LDO6_ON_VSEL: LDO6 active mode voltage select.
0.8V~2.5V, step=0.1V
00000: 0.8V
00001: 0.9V
……
10000: 2.4V
10001: 2.5V
the default value is set by boot.
15.2.4.24 LDO6_SLP_VSEL_REG : LDO6 Sleep Mode Voltage Select
Address: 46H
Type: RW
Version 1.0.1
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Power Management System
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit4
Bit3
Bit2
Bit1
Bit0
LDO6_SLP_VSEL
SYMBOL
Default
0
0
0
0
0
Description
Bit 7-5
Bit 4-0
Reserved
LDO6_SLP_VSEL: LDO6 SLEEP mode voltage select.
0.8V~2.5V, step=0.1V
00000: 0.8V
00001: 0.9V
……
10000: 2.4V
10001: 2.5V
15.2.4.25 LDO7_ON_VSEL_REG : LDO7 Active Mode Voltage Select
Address: 47H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
RESV
RESV
RESV
LDO7_ON_VSEL
SYMBOL
Default
Boot
Description
Bit 7-5
Bit 4-0
Reserved
LDO7_ON_VSEL: LDO7 active mode voltage select.
0.8V~2.5V, step=0.1V
00000: 0.8V
00001: 0.9V
……
10000: 2.4V
10001: 2.5V
the default value is set by boot.
15.2.4.26 LDO7_SLP_VSEL_REG : LDO7 Sleep Mode Voltage Select
Address: 48H
Bit
Bit7
Type: RW
Bit4
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
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Power Management System
RESV
RESV
RESV
LDO7_SLP_VSEL
SYMBOL
Default
0
0
0
0
0
0
0
0
Description
Bit 7-5
Bit 4-0
Reserved
LDO7_SLP_VSEL: LDO7 SLEEP mode voltage select.
0.8V~2.5V, step=0.1V
00000: 0.8V
00001: 0.9V
……
10000: 2.4V
10001: 2.5V
15.2.4.27 LDO8_ON_VSEL_REG : LDO8 Active Mode Voltage Select
Address: 49H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
RESV
RESV
RESV
LDO8_ON_VSEL
SYMBOL
Default
Boot
Description
Bit 7-5
Bit 4-0
Reserved
LDO8_ON_VSEL: LDO8 active mode voltage select.
1.8V~3.4V, step=0.1V
00000: 1.8V
00001: 1.9V
….
01110: 3.2V
01111: 3.3V
10000: 3.4V
the default value is set by boot.
15.2.4.28 LDO8_SLP_VSEL_REG : LDO8 Sleep Mode Voltage Select
Address: 4AH
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
RESV
RESV
RESV
LDO8_SLP_VSEL
SYMBOL
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Power Management System
Default
0
0
0
0
0
0
0
0
Description
Bit 7-5
Bit 4-0
Reserved
LDO8_SLP_VSEL: LDO8 SLEEP mode voltage select.
1.8V~3.4V, step=0.1V
00000: 1.8V
00001: 1.9V
….
01110: 3.2V
01111: 3.3V
10000: 3.4V
15.2.4.29 DEVCTRL_REG : Device Control Register
Address: 4BH
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
Bit3
Bit2
RESV
0
Bit1
Bit0
PWRON_LP_OFF_TI DEV_OFF
DEV_SL DEV_O
SYMBOL
Default
ME
_RST
P
FF
0
0
0
0
0
Description
Bit 7-6
Bit 5-4
Reserved
PWRON_LP_OFF_TIME: PWRON long press turn off time:
00: 6s
01: 8s
10: 10s
11: 12s
Bit 3
DEV_OFF_RST: Write 1 will start an ACTIVE to OFF or SLEEP to OFF device
state transition (switch-off event) and activate reset of the digital core.
Reserved
Bit 2
Bit 1
DEV_SLP:
Write 1 allows SLEEP device state (if DEV_OFF = 0 and
DEV_OFF_RST = 0).
Write ‘0’ will start a SLEEP to ACTIVE device state transition (wake-up event)
(if DEV_OFF = 0 and DEV_OFF_RST = 0). This bit is cleared in OFF state.
DEV_OFF: Write 1 will start an ACTIVE to OFF or SLEEP to OFF device state
transition (switch-off event). This bit is cleared in OFF state.
Bit 0
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15.2.5 INTERRUPT REGISTERS
15.2.5.1 INT_STS_REG1 : Interrupt Status Register #1
Address: 4CH
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
Bit5
Bit3
Bit2
PWRO
N_INT
(Write 1
Clr)
Bit1
Bit0
HOTDI
E_INT
(Write 1
Clr)
PWRON
_LP_INT
(Write 1
Clr)
VB_LO VOUT_L
RTC_PERI RTC_ALA
_INT
(Write 1
Clr)
O_INT
(Write 1
Clr)
OD_INT
RM_INT
SYMBOL
Default
(Write 1 Clr)
(Write 1 Clr)
0
0
0
0
0
0
0
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Reserved
RTC_PERIOD_INT: RTC period event interrupt.
RTC_ALARM_INT: RTC alarm event interrupt.
HOTDIE_INT: Hot die event interrupt status.
PWRON_LP_INT: PWRON PIN long press event interrupt status.
Bit 2
Bit 1
Bit 0
Note:
PWRON_INT: PWRON event interrupt status.
VB_LO_INT: Battery under voltage alarm event interrupt status.
VOUT_LO_INT: VOUT under voltage alarm event interrupt status
1: Interrupt asserted, write "1" to clear
0: No interrupt
15.2.5.2 INT_MSK_REG1 : Interrupt Mask Register #1
Address: 4DH
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
RTC_PE
RTC_AL HOTDIE_ PWRON
PWRON VB_LO_I VOUT_
SYMBOL
Default
RIOD_IM ARM_IM
IM
_LP_IM
_IM
M
LO_IM
0
0
0
0
0
0
0
Description
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Reserved
RTC_PERIOD_INT: RTC period event interrupt mask.
RTC_ALARM_INT: RTC alarm event interrupt mask.
HOTDIE_INT: Hot die event interrupt status mask.
PWRON_LP_INT: PWRON PIN long press event interrupt status mask.
Bit 2
Bit 1
PWRON_INT: PWRON event interrupt status mask.
VB_LO_INT: Battery under voltage alarm event interrupt status mask.
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Bit 0
VOUT_LO_IM: Vout under voltage alarm event interrupt status mask
Note:
1: Mask the specified interrupt
0: Do not mask the specified interrupt
15.2.5.3
INT_STS_REG2 : Interrupt Status Register #2
Address: 4EH
Type: RW
Bit
Bit7
RESV
0
Bit6
RESV
0
Bit5
RESV
0
Bit4
RESV
0
Bit3
RESV
0
Bit2
RESV
0
Bit1
Bit0
PLUG_I
N_INT
(Write 1
Clr)
PLUG_OU
T_INT
SYMBOL
Default
(Write 1 Clr)
0
0
Description
Bit 7-2
Bit 1
Reserved
PLUG_OUT_INT: charger plug out event interrupt(PLUG_IN_STS falling edge
interrupt)
Bit 0
PLUG_IN_INT: charger plug in event interrupt(PLUG_IN_STS rising edge
interrupt)
Note:
Write “1” to clear.
15.2.5.4 INT_STS_MSK_REG2 : Interrupt Status Register #2
Type: RW
Bit4
Address: 4FH
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
PLUG_OU PLUG_IN
RESV
RESV
RESV
RESV
RESV
RESV
SYMBOL
Default
T_INT_IM
_INT_IM
0
0
0
0
0
0
0
0
Description
Bit 7-2
Bit 1
Reserved
PLUG_OUT_INT_IM: Charger plug out event interrupt mask.
1: Mask the interrupt
0: Do not mask the interrupt
Bit 0
PLUG_IN_INT_IM: Charger plug in event interrupt mask
1: Mask the interrupt
0: Do not mask the interrupt
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15.2.5.5 IO_POL_REG : IO Polarity Register
Address: 50H
Type: RW
Bit4
Bit
Bit7
RESV
0
Bit6
Bit5
Bit3
Bit2
DVS2_POL
1
Bit1
Bit0
RESV RESV
RESV
RESV
DVS1_POL INT_POL
SYMBOL
Default
0
0
0
0
1
0
Description
Bit 7-3
Bit 2
Reserved
DVS2_POL: DVS2 pin polarity
0: active low
1: active high
Bit 1
Bit 0
DVS1_POL: DVS1 pin polarity
0: active low
1: active high
INT_POL: INT pin polarity
0: active low
1: active high
15.2.5.6 DCDC_ILMAX_REG : DCDC max inductor current Register
Address: 90H
Type: RW
Bit4
Bit
Bit7
Bit6
Bit5
Bit3
Bit2
Bit1
Bit0
BUCK4_ILMAX
BUCK3_ILMAX
BUCK2_ILMAX
BUCK1_ILMAX
SYMBOL
Default
0
1
0
1
0
1
0
1
Description
BUCK4_ILMAX: BUCK4 max inductor current
00:2A 01:2.5A 10:3A 11:3.5A
BUCK3_ILMAX: BUCK4 max inductor current
00:2A 01:2.5A 10:3A 11:3.5A
Bit 7-6
Bit 5-4
Bit 3-2
Bit 1-0
BUCK2_ILMAX: BUCK4 max inductor current
00:4.5A 01: 5A 10:5.5A 11:6A
BUCK1_ILMAX: BUCK4 max inductor current
00:4.5A 01: 5A 10:5.5A 11:6A
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Power Management System
16 PACKAGE INFORMATION
QFN68 7mm X 7mm
MILLIMETER
DESCRIPTION
SYMBOL
MIN
0.70
0
NOM
0.75
MAX
0.80
0.05
TOTAL THICKNESS
STAND OFF
A
A1
0.035
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Power Management System
MOLD THICKNESS
A2
A3
D
-
0.55
0.203REF
7BSC
0.57
-
MATERIAL THICKNESS
-
-
-
PACKAGE SIZE
EP SIZE
E
-
7BSC
-
D1
E1
L
5.39
5.39
0.30
5.49
5.59
5.59
0.50
5.49
LEAD LENGTH
LEAD PITCH
0.4
e
0.35BSC
0.15
LEAD WIDTH
b
0.1
0.2
LEAD OSITION OFFSET
LEAD COPLANARITY
PACKAGE EDGE PROFILE
MOLD FLATNESS
aaa
bbb
ccc
ddd
eee
fff
0.07
0.08
0.10
0.10
EP POSITION OFFSET
0.10
0.05
Note:
1. Coplanarity applies to leads, corner leads and die attach pad.
2. Dimension b applies to metalized terminal and is measured between 0.15mm and
0.30mm from the terminal tip. If the terminal has the optional radius on the other end
of the terminal, the dimension b should not be measure in that radius area.
3. 0.15mm of dimension b is recommended in PCB layout.
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