TLV2341IP [ROCHESTER]
OP-AMP, 10000uV OFFSET-MAX, 1.7MHz BAND WIDTH, PDIP8, PLASTIC, DIP-8;
| 型号： | TLV2341IP |
| 厂家： | 
Rochester Electronics |
| 描述： | OP-AMP, 10000uV OFFSET-MAX, 1.7MHz BAND WIDTH, PDIP8, PLASTIC, DIP-8 放大器 光电二极管 |
| 文件： | 总56页 (文件大小：1458K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
12
Wide Range of Supply Voltages Over
Specified Temperature Range:
High Input Impedance . . . 10 Ω Typ
Low Noise . . . 25 nV/√Hz Typically at
T = –40°C to 85°C . . . 2 V to 8 V
A
f = 1 kHz (High-Bias Mode)
Fully Characterized at 3 V and 5 V
Single-Supply Operation
ESD-Protection Circuitry
Designed-In Latch-Up Immunity
Common-Mode Input-Voltage Range
Extends Below the Negative Rail and up to
Bias-Select Feature Enables Maximum
Supply Current Range From 17 µA to
1.5 mA at 25°C
V
–1 V at 25°C
DD
Output Voltage Range Includes Negative
Rail
D OR P PACKAGE
(TOP VIEW)
PW PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
OFFSET N1
IN–
BIAS SELECT
OFFSET N1
IN–
BIAS SELECT
1
2
3
4
8
7
6
5
V
V
DD
DD
IN+
GND
OUT
OFFSET N2
IN+
GND
OUT
OFFSET N2
description
The TLV2341 operational amplifier has been specifically developed for low-voltage, single-supply applications
and is fully specified to operate over a voltage range of 2 V to 8 V. The device uses the Texas Instruments
silicon-gate LinCMOS technology to facilitate low-power, low-voltage operation and excellent offset-voltage
stability. LinCMOS technology also enables extremely high input impedance and low bias currents allowing
direct interface to high-impedance sources.
The TLV2341 offers a bias-select feature, which allows the device to be programmed with a wide range of
different supply currents and therefore different levels of ac performance. The supply current can be set at
17 µA, 250 µA, or 1.5 mA, which results in slew-rate specifications between 0.02 and 2.1 V/µs (at 3 V).
The TLV2341 operational amplifiers are especially well suited to single-supply applications and are fully
specified and characterized at 3-V and 5-V power supplies. This low-voltage single-supply operation combined
with low power consumption makes this device a good choice for remote, inaccessible, or portable
battery-powered applications. The common-mode input range includes the negative rail.
The device inputs and outputs are designed to withstand –100-mA currents without sustaining latch-up. The
TLV2341 incorporates internal ESD-protection circuits that prevents functional failures at voltages up to
2000 V as tested under MIL-STD 883 C, Methods 3015.2; however, care should be exercised in handling these
devices as exposure to ESD may result in the degradation of the device parametric performance.
AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP
V
max
IO
SMALL
OUTLINE
(D)
PLASTIC
DIP
FORM
(Y)
T
A
TSSOP
(PW)
AT 25°C
(P)
–40°C to 85°C
8 mV
TLV2341ID
TLV2341IP
TLV2341IPWLE
TLV2341Y
The D package is available taped and reeled. Add R suffix to the device type (e.g., TLV2341IDR).
The PW package is only available left-end taped and reeled (e.g., TLV2341IPWLE).
LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
bias-select feature
The TLV2342 offers a bias-select feature that allows the user to select any one of three bias levels, depending
on the level of performance desired. The tradeoffs between bias levels involve ac performance and power
dissipation (see Table 1).
Table 1. Effect of Bias Selection on Performance
MODE
TYPICAL PARAMETER VALUES
UNIT
HIGH BIAS
MEDIUM BIAS
LOW BIAS
T
A
= 25°C, V
= 3 V
DD
R
= 10 kΩ
975
2.1
R
= 100 kΩ
R
L
= 1 MΩ
L
L
P
Power dissipation
Slew rate
195
15
µW
V/µs
D
SR
0.38
32
0.02
68
V
B
Equivalent input noise voltage at f = 1 kHz
Unity-gain bandwidth
25
nV/√Hz
kHz
n
790
46°
300
27
1
φ
m
Phase margin
39°
34°
A
VD
Large-signal differential voltage amplification
11
83
400
V/mV
bias selection
Bias selection is achieved by connecting BIAS SELECT to one of three voltage levels (see Figure 1). For
medium-bias applications, it is recommended that the bias-select pin be connected to the midpoint between the
supply rails. This procedure is simple in split-supply applications since this point is ground. In single-supply
applications, the medium-bias mode necessitates using a voltage divider as indicated in Figure 1. The use of
large-value resistors in the voltage divider reduces the current drain of the divider from the supply line. However,
large-value resistors used in conjunction with a large-value capacitor require significant time to charge up to
the supply midpoint after the supply is switched on. A voltage other than the midpoint may be used if it is within
the voltages specified in the following table.
V
DD
BIAS-SELECT VOLTAGE
(single supply)
1 MΩ
BIAS MODE
Low
Medium
Low
Medium
High
V
DD
1 V to V
To the Bias-Select Pin
–1 V
High
DD
GND
1 MΩ
0.01 µF
Figure 1. Bias Selection for Single-Supply Applications
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
high-bias mode
In the high-bias mode, the TLV2341 series feature low offset voltage drift, high input impedance, and low noise.
Speed in this mode approaches that of BiFET devices but at only a fraction of the power dissipation.
medium-bias mode
The TLV2341 in the medium-bias mode features a low offset voltage drift, high input impedance, and low noise.
Speed in this mode is similar to general-purpose bipolar devices but power dissipation is only a fraction of that
consumed by bipolar devices.
low-bias mode
In the low-bias mode, the TLV2341 features low offset voltage drift, high input impedance, extremely low power
consumption, and high differential voltage gain.
ORDER OF CONTENTS
TOPIC
BIAS MODE
Schematic
all
all
all
Absolute maximum ratings
Recommended operating conditions
Electrical characteristics
Operating characteristics
Typical characteristics
high
(Figures 2 – 31)
Electrical characteristics
Operating characteristics
Typical characteristics
medium
(Figures 32 – 61)
Electrical characteristics
Operating characteristics
Typical characteristics
low
(Figures 62 – 91)
Parameter measurement information
Application information
all
all
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TLV2341Y chip information
This chip, when properly assembled, displays characteristics similar to the TLV2341. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
(2)
(1)
(8)
(7)
V
DD
(7)
(1)
(3)
OFFSET N1
IN+
+
–
(6)
OUT
(2)
IN–
(4)
GND
(5)
(8)
OFFSET N2
48
BIAS SELECT
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
(3)
T max = 150°C
J
(4)
(5)
(6)
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
55
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
equivalent schematic
V
DD
P3
P12
P9A
R6
N5
P4
P5
P9B
P11
P10
P1
P2 R2
IN–
R1
N11
N12
N13
IN+
P6A
P6B
P7B
P7A
P8
C1
R5
N3
N9
N6
N7
N1
N2
N4
R3
D1
R4
D2
R7
N10
OFFSET
N1
OFFSET
N2
OUT
GND
BIAS
SELECT
†
COMPONENT COUNT
Transistors
Diodes
27
2
Resistors
Capacitors
7
1
†
Includes the amplifier and all
ESD, bias, and trim circuitry
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
DD
Differential input voltage (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Input voltage range, V (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V
DD±
I
DD
Input current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA
I
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 mA
O
Duration of short-circuit current at (or below) T = 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
A
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any conditions beyond those indicated under “recommended operating conditions” is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may effect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at the noninverting input with respect to the inverting input.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T = 85°C
A
POWER RATING
A
PACKAGE
POWER RATING
ABOVE T = 25°C
A
D
P
725 mW
5.8 mW/°C
8.0 mW/°C
4.2 mW/°C
377 mW
1000 mW
520 mW
PW
525 mW
273 mW
recommended operating conditions
MIN
2
MAX
8
UNIT
Supply voltage, V
V
DD
V
V
= 3 V
= 5 V
–0.2
–0.2
–40
1.8
3.8
85
DD
Common-mode input voltage, V
V
IC
Operating free-air temperature, T
DD
°C
A
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
HIGH-BIAS MODE
electrical characteristics at specified free-air temperature
TLV2341I
TEST
CONDITIONS
†
PARAMETER
V
= 3 V
DD
TYP
V
= 5 V
DD
TYP
UNIT
T
A
MIN
MAX
MIN
MAX
V
V
R
R
= 1 V,
= 1 V,
= 50 Ω,
= 10 kΩ
O
IC
S
L
25°C
0.6
8
1.1
8
V
IO
Input offset voltage
mV
Full range
10
10
Average temperature of input
offset voltage
25°C to
85°C
α
2.7
2.7
µV/°C
pA
VIO
25°C
85°C
25°C
85°C
0.1
22
0.1
24
V
V
= 1 V,
= 1 V
O
IC
I
IO
Input offset current (see Note 4)
Input bias current (see Note 4)
1000
2000
1000
2000
0.6
175
0.6
200
V
V
= 1 V,
= 1 V
O
IC
I
IB
pA
–0.2
to
–0.3
to
2.3
–0.2
to
4
–0.3
to
4.2
25°C
V
V
2
Common-mode input voltage range
(see Note 5)
V
ICR
–0.2
to
–0.2
to
Full range
1.8
3.8
V
V
= 1 V,
= 100 mV,
= –1 mA
25°C
Full range
25°C
1.75
1.7
1.9
120
11
3.2
3
3.7
90
23
80
95
IC
ID
V
V
A
High-level output voltage
Low-level output voltage
V
OH
I
OH
V
V
= 1 V,
= –100 mV,
= 1 mA
150
190
150
190
IC
ID
mV
V/mV
dB
OL
Full range
25°C
I
OL
V
R
= 1 V,
= 10 kΩ,
3
2
5
3.5
65
60
70
65
IC
Large-signal differential
voltage amplification
VD
L
Full range
25°C
See Note 6
V
V
R
= 1 V,
65
60
70
65
78
O
IC
CMRR Common-mode rejection ratio
= V
= 50 Ω
min,
ICR
Full range
25°C
S
V
V
R
= 1 V,
= 1 V,
= 50 Ω
95
IC
O
Supply-voltage rejection ratio
k
dB
µA
µA
SVR
(∆V
DD
/∆V )
IO
Full range
25°C
S
I
I
Bias select current
Supply current
V
–1.2
325
–1.4
675
I(SEL)
I(SEL) = 0
V
V
= 1 V,
= 1 V,
O
IC
25°C
1500
2000
1600
2200
DD
Full range
No load
†
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At V
= 5 V, V = 0.25 V to 2 V; at V = 3 V, V = 0.5 V to 1.5 V.
DD O
DD
O
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
HIGH-BIAS MODE
operating characteristics at specified free-air temperature, V
= 3 V
DD
TLV2341I
TYP
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
MAX
V
R
= 1 V,
V
= 1 V,
25°C
85°C
2.1
1.7
IC
= 10 kΩ,
I(PP)
C
R
C
= 20 pF,
= 20 Ω,
= 20 pF,
SR
Slew rate at unity gain
V/µs
L
L
S
L
See Figure 92
f = kHz,
See Figure 93
V
n
Equivalent input noise voltage
Maximum output-swing bandwidth
Unity-gain bandwidth
25°C
25
nV/√Hz
25°C
85°C
25°C
85°C
–40°C
25°C
85°C
170
145
790
690
53°
49°
47°
V
R
= V
OH
= 10 kΩ,
,
O
B
kHz
OM
1
See Figure 92
C = 20 pF,
L
L
V = 10 mV,
I
B
kHz
R
= 10 kΩ,
See Figure 94
L
V = 10 mV,
f = B ,
R = 1 MΩ,
I
1
C
= 20 pF,
φ
m
Phase margin
L
L
See Figure 94
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLV2341I
TYP
3.6
PARAMETER
TEST CONDITIONS
T
UNIT
A
MIN
MAX
25°C
85°C
25°C
85°C
V
R
C
= 1 V,
IC
L
L
V
= 1 V
I(PP)
I(PP)
2.8
= 10 kΩ,
= 20 pF,
See Figure 92
SR
Slew rate at unity gain
V/µs
2.9
V
= 2.5 V
2.3
f = 1 kHz,
See Figure 93
R
= 20 Ω,
S
V
n
Equivalent input noise voltage
Maximum output-swing bandwidth
Unity-gain bandwidth
25°C
25
nV/√Hz
25°C
85°C
25°C
85°C
–40°C
25°C
85°C
320
250
1.7
1.2
49°
46°
43°
V
R
= V
OH
= 10 kΩ,
,
C
= 20 pF,
O
L
L
B
kHz
OM
1
See Figure 92
C = 20 pF,
L
V = 10 mV,
I
L
B
MHz
R
= 10 kΩ,
See Figure 94
V = 10 mV,
f = B ,
R = 10 kΩ,
I
L
1
C
= 20 pF,
φ
m
Phase margin
L
See Figure 94
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
HIGH-BIAS MODE
electrical characteristics, T = 25°C
A
TLV2341I
V
= 3 V
DD
TYP
V
= 5 V
DD
TYP
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
MIN
MAX
V
= 1 V,
= 50 Ω,
V
R
= 1 V,
= 10 kΩ
O
IC
L
V
Input offset voltage
0.6
8
1.1
8
mV
IO
R
S
O
O
I
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 1 V,
= 1 V,
V
V
= 1 V
= 1 V
0.1
0.6
0.1
0.6
pA
pA
IO
IC
IB
IC
–0.2
to
–0.3
to
2.3
–0.2
to
4
–0.3
to
4.2
Common-mode input voltage
range (see Note 5)
V
V
V
ICR
2
V
I
= 1 V,
= –1
V
V
= 100 mV,
IC
OH
mA
ID
V
V
High-level output voltage
1.75
1.9
3.2
3.7
OH
V
= 1 V,
= 1 mA
= –100 mV,
IC
ID
Low-level output voltage
120
11
150
90
23
80
150
mV
V/mV
dB
OL
I
OL
Large-signal differential voltage
amplification
V
IC
= 1 V,
R
= 10 kΩ,
L
A
VD
3
65
70
50
65
70
See Note 6
V
R
= 1 V,
= 50 Ω
V
= V
min,
ICR
O
IC
IC
CMRR Common-mode rejection ratio
78
S
Supply-voltage rejection ratio
V
R
= 1 V,
= 50 Ω
V
= 1 V,
= 1 V,
O
k
95
–1.2
325
95
–1.4
675
dB
µA
µA
SVR
I(SEL)
DD
(∆V
DD
/∆V
IO
)
S
I
I
Bias select current
V
= 0
I(SEL)
V
O
= 1 V,
V
IC
Supply current
1500
1600
No load
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At V
= 5 V, V = 0.25 V to 2 V; at V = 3 V, V = 0.5 V to 1.5 V.
DD O
DD
O
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
Table of Graphs
FIGURE
2,3
V
Input offset voltage
Distribution
Distribution
IO
α
Input offset voltage temperature coefficient
4,5
VIO
vs Output current
vs Supply voltage
vs Temperature
6
7
8
V
OH
V
OL
High-level output voltage
vs Common-mode input voltage
vs Temperature
vs Differential input voltage
vs Low-level output current
9
10, 12
11
Low-level output voltage
13
vs Supply voltage
vs Temperature
vs Frequency
14
15
26, 27
A
VD
Large-signal differential voltage amplification
I
I
Input bias current
vs Temperature
vs Temperature
vs Supply voltage
16
16
17
IB
Input offset current
IO
V
Common-mode input voltage
IC
vs Supply voltage
vs Temperature
18
19
I
Supply current
Slew rate
DD
vs Supply voltage
vs Temperature
20
21
SR
Bias select current
vs Supply voltage
vs Frequency
22
23
V
B
Maximum peak-to-peak output voltage
O(PP)
vs Temperature
vs Supply voltage
24
25
Unity-gain bandwidth
Phase margin
1
vs Supply voltage
vs Temperature
vs Load capacitance
28
29
30
φ
m
V
n
Equivalent input noise voltage
Phase shift
vs Frequency
vs Frequency
31
26, 27
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
60
50
50
V
T
= 5 V
V
T
= 3 V
DD
= 25°C
DD
= 25°C
A
A
P Package
P Package
40
30
40
30
20
20
10
0
10
0
–5 –4 –3 –2
–5 –4 –3 –2
–1
0
1
2
3
4
5
–1
0
1
2
3
4
5
V
IO
– Input Offset Voltage – mV
V
IO
– Input Offset Voltage – mV
Figure 2
Figure 3
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
TEMPERATURE COEFFICIENT
50
60
50
V
T
= 5 V
V
T
= 3 V
DD
= 25°C to 85°C
DD
= 25°C to 85°C
A
A
P Package
Outliers:
(1) 20.5 mV/°C
P Package
40
30
40
30
20
10
0
20
10
0
–10 –8 –6 –4 –2
0
2
4
6
8
10
–8 –6 –4 –2
–10
0
2
4
6
8
10
α
– Temperature Coefficient – µV/°C
α
– Temperature Coefficient – µV/°C
VIO
VIO
Figure 4
Figure 5
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
SUPPLY VOLTAGE
8
6
4
5
4
3
V
V
R
= 1 V
= 100 mV
= 1 MΩ
= 25°C
V
V
T
A
= 1 V
= 100 mV
= 25°C
IC
ID
L
IC
ID
T
A
V
= 5 V
DD
V
DD
= 3 V
2
1
0
2
0
0
– 2
– 4
– 6
– 8
0
2
4
6
8
I
– High-Level Output Current – mA
V
DD
– Supply Voltage – V
OH
Figure 6
Figure 7
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
COMMON-MODE INPUT VOLTAGE
700
650
600
550
3
2.4
1.8
1.2
0.6
0
V
V
V
= 3 V
= 1 V
= 100 mV
V
I
T
A
= 5 V
DD
IC
ID
DD
= 5 mA
OL
= 25°C
V
= –100 mV
ID
500
450
400
350
I
I
I
I
I
= –500 µA
= –1 mA
= –2 mA
= –3 mA
= –4 mA
OH
OH
OH
OH
OH
V
ID
= –1 V
300
– 75 – 50 – 25
0
25
50
75 100 125
0
1
2
3
4
T
A
– Free-Air Temperature – °C
V
IC
– Common-Mode Input Voltage – V
Figure 8
Figure 9
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
FREE-AIR TEMPERATURE
800
700
600
500
200
185
V
V
I
= 5 V
= |V / 2|
ID
= 5 mA
V
V
V
I
= 3 V
= 1 V
= –100 mV
= 1 mA
DD
IC
OL
DD
IC
ID
T
A
= 25°C
OL
150
125
400
300
100
75
200
100
50
0
– 75 – 50 – 25
0
25
50
75 100 125
0
–1
–2 –3
–4
–5
–6
–7 –8
V
ID
– Differential Input Voltage – V
T
A
– Free-Air Temperature – °C
Figure 10
Figure 11
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
FREE-AIR TEMPERATURE
900
800
700
600
500
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
V
V
T
= 1 V
= –100 mV
= 25°C
V
V
V
= 5 V
IC
ID
A
DD
IC
ID
= 0.5 V
= –1 V
= 5 mA
I
OL
V
DD
= 5 V
400
300
V
DD
= 3 V
200
100
0.2
0.1
0
0
0
1
2
3
4
5
6
7
8
– 75 – 50 – 25
0
25
50
75 100 125
I
– Low-Level Output Current – mA
T
A
– Free-Air Temperature – °C
OL
Figure 12
Figure 13
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
50
45
60
50
40
30
20
10
0
R = 10 kΩ
L
R
= 10 kΩ
L
40
35
T
A
= –40°C
30
V
DD
= 5 V
25
20
15
10
5
V
DD
= 3 V
T
A
= 25°C
T
A
= 85°C
0
0
2
4
6
8
–75 –50 –25
0
25
50
75 100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 14
Figure 15
INPUT BIAS CURRENT AND INPUT OFFSET
COMMON-MODE INPUT VOLTAGE
POSITIVE LIMIT
CURRENT
vs
FREE-AIR TEMPERATURE
vs
SUPPLY VOLTAGE
4
8
6
4
10
V
V
= 3 V
DD
= 1 V
T
A
= 25°C
IC
See Note A
3
10
2
10
1
10
I
IB
I
IO
2
0
1
0.1
25 35 45 55 65 75 85 95 105 115 125
0
2
4
6
8
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
NOTE: The typical values of input bias current and input offset
current below 5 pA were determined mathematically.
Figure 16
Figure 17
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
2
1.6
1.2
2
V
V
= 1 V
= 1 V
V
V
= 1 V
= 1 V
IC
O
IC
O
1.75
No Load
No Load
1.5
T
A
= –40°C
1.25
T
A
= 25°C
1
V
= 5 V
DD
0.8
0.4
0
0.75
V
= 3 V
DD
T
= 85°C
0.5
0.25
0
A
0
2
4
6
8
–50 –25
–75
0
25
50
75 100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 18
Figure 19
SLEW RATE
vs
SUPPLY VOLTAGE
SLEW RATE
vs
FREE-AIR TEMPERATURE
8
7
6
5
4
3
2
8
7
6
5
4
3
2
V
= 1 V
I(PP)
= 1
V
= 1 V
I(PP)
= 1
A
V
A
V
R
C
= 10 kΩ
= 20 pF
= 25°C
L
L
R
C
= 10 kΩ
= 20 pF
L
L
T
A
V
DD
= 5 V
V
DD
= 3 V
1
0
1
0
0
2
4
6
8
–75 –50 –25
0
25
50
75 100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 20
Figure 21
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
BIAS SELECT CURRENT
vs
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
FREQUENCY
– 3
5
4
3
R
= 10 kΩ
T
V
= 25°C
L
A
= 0
I(SEL)
V
DD
= 5 V
– 2.4
– 1.8
– 1.2
– 0.6
V
DD
= 3 V
2
1
0
T
A
= –40°C
T
A
= 25°C
T
A
= 85°C
0
2
4
6
8
10
100
1000
10000
V
DD
– Supply Voltage – V
f – Frequency – kHz
Figure 22
Figure 23
UNITY-GAIN BANDWIDTH
vs
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
0.3
0.1
3.5
V = 10 mV
V = 10 mV
I
I
R
C
= 10 kΩ
= 20 pF
R
C
T
A
= 10 kΩ
= 20 pF
= 25°C
L
L
L
L
2.9
2.3
V
= 5 V
DD
1.7
1.1
0.5
V
DD
= 3 V
50
0
1
2
3
4
5
6
7
8
–75 –50 –25
0
25
75 100 125
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 24
Figure 25
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
6
5
4
3
2
1
10
10
10
10
10
10
10
–60°
–30°
0°
V
R
C
= 3 V
= 10 kΩ
= 20 pF
= 25°C
DD
L
L
T
A
30°
60°
A
VD
Phase Shift
90°
120°
150°
180°
1
0.1
10
100
1 K
10 K
100 K
1 M
10 M
f – Frequency – Hz
Figure 26
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
6
5
4
3
2
1
10
10
10
10
10
10
10
–60°
–30°
0°
V
R
C
= 5 V
= 10 kΩ
= 20 pF
= 25°C
DD
L
L
T
A
30°
60°
A
VD
90°
Phase Shift
120°
1
150°
180°
0.1
10
100
1 k
10 k
100 k
1 M
10 M
f – Frequency – Hz
Figure 27
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (HIGH-BIAS MODE)
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
PHASE MARGIN
vs
SUPPLY VOLTAGE
60°
58°
53°
51°
49°
47°
45°
V = 10 mV
V = 10 mV
I
I
R
C
= 10 kΩ
= 20 pF
R
C
T
A
= 10 kΩ
= 20 pF
= 25°C
L
L
L
L
56°
54°
52°
V
= 3 V
DD
50°
48°
46°
44°
42°
V
DD
= 5 V
40°
–75 –50 –25 –0
25
50
75 100 125
0
2
4
6
8
T
A
– Free-Air Temperature – °C
V
– Supply Voltage – V
DD
Figure 28
Figure 29
EQUIVALENT INPUT NOISE VOLTAGE
PHASE MARGIN
vs
vs
FREQUENCY
LOAD CAPACITANCE
400
50°
45°
R
T
A
= 20 Ω
= 25°C
S
300
200
V
= 3 V
DD
40°
35°
V
DD
= 5 V
V
DD
= 5 V
100
0
30°
25°
V
DD
= 3 V
10
V = 10 mV
I
R
T
A
= 10 kΩ
= 25°C
L
1
100
1000
0
10 20 30 40 50 60 70 80 90 100
f – Frequency – Hz
C
– Load Capacitance – pF
L
Figure 30
Figure 31
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
MEDIUM-BIAS MODE
electrical characteristics at specified free-air temperature
TLV2341I
TEST
CONDITIONS
†
PARAMETER
V
= 3 V
DD
TYP
V
= 5 V
DD
TYP
UNIT
T
A
MIN
MAX
MIN
MAX
V
V
R
= 1 V,
= 1 V,
= 50 Ω,
= 100 kΩ
O
IC
S
L
25°C
0.6
8
1.1
8
V
IO
Input offset voltage
mV
Full range
10
10
R
Average temperature coefficient of
input offset voltage
25°C to
85°C
α
1
1.7
µV/°C
pA
VIO
25°C
85°C
25°C
85°C
0.1
22
0.1
24
V
V
= 1 V,
= 1 V
O
IC
I
IO
Input offset current (see Note 4)
Input bias current (see Note 4)
1000
2000
1000
2000
0.6
175
0.6
200
V
V
= 1 V,
= 1 V
O
IC
I
IB
pA
–0.2
to
–0.3
to
2.3
–0.2
to
4
–0.3
to
4.2
25°C
V
V
2
Common-mode input voltage range
(see Note 5)
V
ICR
–0.2
to
–0.2
to
Full range
1.8
3.8
V
V
= 1 V,
= 100 mV,
= –1 mA
25°C
Full range
25°C
1.75
1.7
1.9
115
83
3.2
3
3.9
95
IC
ID
V
V
A
High-level output voltage
Low-level output voltage
V
OH
I
OH
V
V
= 1 V,
= –100 mV,
= 1 mA
150
190
150
190
IC
ID
mV
V/mV
dB
OL
Full range
25°C
I
OL
V
R
= 1 V,
= 100 kΩ,
25
15
65
60
70
65
25
15
65
60
70
65
170
91
IC
Large-signal differential
voltage amplification
L
VD
Full range
25°C
See Note 6
V
V
R
= 1 V,
= V
92
O
IC
min,
ICR
CMRR Common-mode rejection ratio
Full range
25°C
= 50 Ω
S
V
V
R
= 1 V,
= 1 V,
= 50 Ω
94
94
IC
O
Supply-voltage rejection ratio
k
dB
nA
µA
SVR
(∆V
DD
/∆V )
IO
Full range
25°C
S
I
I
Bias select current
Supply current
V
–100
65
–130
105
I(SEL)
DD
I(SEL) = 0
V
= 1 V,
O
25°C
250
360
280
400
V
IC
= 1 V,
Full range
No load
†
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At V
= 5 V, V = 0.25 V to 2 V; at V = 3 V, V = 0.5 V to 1.5 V.
DD O
DD
O
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
MEDIUM-BIAS MODE
operating characteristics at specified free-air temperature, V
= 3 V
DD
TLV2341I
TYP
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
MAX
V
R
= 1 V,
= 100 kΩ,
V
= 1 V,
= 20 pF,
25°C
85°C
0.38
0.29
IC
L
I(PP)
C
R
C
SR
Slew rate at unity gain
V/µs
L
S
L
See Figure 92
f = kHz,
See Figure 93
= 20 Ω,
V
n
Equivalent input noise voltage
Maximum output-swing bandwidth
Unity-gain bandwidth
25°C
32
nV/√Hz
25°C
85°C
25°C
85°C
–40°C
25°C
85°C
34
32
V
R
= V
OH
= 100 kΩ,
,
= 20 pF,
O
B
kHz
OM
1
See Figure 92
C = 20 pF,
L
L
300
235
42°
39°
36°
V = 10 mV,
I
B
kHz
R
= 100 kΩ,
See Figure 94
L
V = 10 mV,
f = B ,
R = 100 kΩ,
I
1
C
= 20 pF,
φ
m
Phase margin
L
L
See Figure 94
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLV2341I
TYP
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
MAX
25°C
85°C
25°C
85°C
0.43
V
R
C
= 1 V,
= 100 kΩ,
= 20 pF,
IC
L
L
V
= 1 V
I(PP)
I(PP)
0.35
SR
Slew rate at unity gain
V/µs
0.40
V
= 2.5 V
See Figure 92
0.32
f =1 kHz,
See Figure 93
R
= 20 Ω,
S
V
n
Equivalent input noise voltage
Maximum output-swing bandwidth
Unity-gain bandwidth
25°C
32
nV/√Hz
25°C
85°C
25°C
85°C
–40°C
25°C
85°C
55
45
V
R
= V
OH
= 100 kΩ,
,
C
= 20 pF,
O
L
L
B
kHz
OM
1
See Figure 92
C = 20 pF,
L
525
370
43°
40°
38°
V = 10 mV,
I
L
B
kHz
R
= 100 kΩ,
See Figure 94
V = 10 mV,
f = B ,
R = 100 kΩ,
I
L
1
C
= 20 pF,
φ
m
Phase margin
L
See Figure 94
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
MEDIUM-BIAS MODE
electrical characteristics, T = 25°C
A
TLV2341I
V
= 3 V
DD
TYP
V
= 5 V
DD
TYP
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
MIN
MAX
V
= 1 V,
= 50 Ω,
V
R
= 1 V,
= 100 kΩ
O
IC
L
V
Input offset voltage
0.6
8
1.1
8
mV
IO
R
S
O
O
I
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 1 V,
= 1 V,
V
V
= 1 V
= 1 V
0.1
0.6
0.1
0.6
pA
pA
IO
IC
IB
IC
–0.2
to
–0.3
to
2.3
–0.2
to
4
–0.3
to
4.2
Common-mode input voltage
range (see Note 5)
V
ICR
V
2
V
= 1 V,
= –1 mA
V
V
= 100 mV,
= –100 mV,
= 100 kΩ,
IC
ID
V
V
High-level output voltage
Low-level output voltage
1.75
1.9
115
83
3.2
3.9
95
V
mV
OH
I
OH
V
= 1 V,
= 1 mA
IC
ID
150
150
OL
I
OL
Large-signal differential voltage
amplification
V
IC
= 1 V,
R
L
A
VD
25
65
70
25
65
70
170
91
V/mV
dB
See Note 6
V
R
= 1 V,
= 50 Ω
V
V
= V
min,
ICR
O
IC
CMRR Common-mode rejection ratio
92
S
Supply-voltage rejection ratio
V
R
= 1 V,
= 50 Ω
= 1 V,
= 1 V,
O
IC
k
94
–100
65
94
–130
105
dB
nA
µA
SVR
I(SEL)
DD
(∆V
DD
/∆V
ID
)
S
I
I
Bias select current
V
= 0
I(SEL)
V
O
= 1 V,
V
IC
Supply current
250
280
No load
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At V
= 5 V, V = 0.25 V to 2 V; at V = 3 V, V = 0.5 V to 1.5 V.
DD O
DD
O
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
Table of Graphs
FIGURE
32, 33
V
Input offset voltage
Distribution
Distribution
IO
α
Input offset voltage temperature coefficient
34, 35
VIO
vs Output current
vs Supply voltage
vs Temperature
36
37
38
V
OH
V
OL
High-level output voltage
vs Common-mode input voltage
vs Temperature
vs Differential input voltage
vs Low-level output current
39
40, 42
41
Low-level output voltage
43
vs Supply voltage
vs Temperature
vs Frequency
44
45
56, 57
A
VD
Large-signal differential voltage amplification
I
I
Input bias current
vs Temperature
vs Temperature
vs Supply voltage
46
46
47
IB
Input offset current
IO
V
Common-mode input voltage
IC
vs Supply voltage
vs Temperature
48
49
I
Supply current
Slew rate
DD
vs Supply voltage
vs Temperature
50
51
SR
Bias select current
vs Supply current
vs Frequency
52
53
V
B
Maximum peak-to-peak output voltage
O(PP)
vs Temperature
vs Supply voltage
54
55
Unity-gain bandwidth
Phase margin
1
vs Supply voltage
vs Temperature
vs Load capacitance
58
59
60
φ
m
V
n
Equivalent input noise voltage
Phase shift
vs Frequency
vs Frequency
61
56, 57
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
60
50
50
V
T
= 5 V
V
T
= 3 V
DD
= 25°C
DD
= 25°C
A
A
P Package
P Package
40
30
40
30
20
20
10
0
10
0
–5 –4 –3 –2
–5 –4 –3 –2
–1
0
1
2
3
4
5
–1
0
1
2
3
4
5
V
IO
– Input Offset Voltage – mV
V
IO
– Input Offset Voltage – mV
Figure 32
Figure 33
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
TEMPERATURE COEFFICIENT
50
60
50
V
T
= 5 V
V
T
= 3 V
DD
= 25°C to 85°C
DD
= 25°C to 85°C
A
A
P Package
Outliers:
(1) 33 mV/°C
P Package
40
30
40
30
20
10
0
20
10
0
–8 –6 –4 –2
–10
0
2
4
6
8
10
–10 –8 –6 –4 –2
0
2
4
6
8
10
α
– Temperature Coefficient – µV/°C
α
– Temperature Coefficient – µV/°C
VIO
VIO
Figure 34
Figure 35
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
HIGH-LEVEL OUTPUT VOLTAGE
HIGH-LEVEL OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
HIGH-LEVEL OUTPUT CURRENT
8
6
4
5
4
3
V
V
T
A
= 1 V
= 100 mV
= 25°C
V
V
R
= 1 V
= 100 mV
= 100 kΩ
= 25°C
IC
ID
IC
ID
L
T
A
V
DD
= 5 V
V
DD
= 3 V
2
1
0
2
0
0
–2
–4
–6
–8
0
2
4
6
8
V
DD
– Supply Voltage – V
I
– High-Level Output Current – mA
OH
Figure 36
Figure 37
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
FREE-AIR TEMPERATURE
700
3
2.4
1.8
1.2
0.6
0
V
I
T
A
= 5 V
= 5 mA
= 25°C
V
V
V
= 3 V
= 1 V
= 100 mV
DD
OL
DD
IC
ID
650
600
550
V
= –100 mV
ID
500
450
400
I
I
I
I
I
= –500 µA
= –1 mA
= –2 mA
= –3 mA
= –4 mA
OH
OH
OH
OH
OH
V
ID
= –1 V
350
300
0
1
2
3
4
–75 –50 –25
0
25
50
75 100 125
V
IC
– Common-Mode Input Voltage – V
T
A
– Free-Air Temperature – °C
Figure 38
Figure 39
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
DIFFERENTIAL INPUT VOLTAGE
800
700
600
500
200
185
170
155
140
125
110
95
V
V
V
I
= 3 V
= 1 V
= –100 mV
= 1 mA
V
V
I
= 5 V
= |V / 2|
ID
= 5 mA
DD
IC
ID
DD
IC
OL
T
A
= 25°C
OL
400
300
200
100
80
65
50
0
–75 –50 –25
0
25
50
75 100 125
0
–2
–4
–6
–8
T
A
– Free-Air Temperature – °C
V
ID
– Differential Input Voltage – V
Figure 40
Figure 41
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
FREE-AIR TEMPERATURE
1000
900
800
700
600
500
400
300
900
800
700
600
500
V
V
T
A
= 1 V
= –100 mV
= 25°C
IC
ID
V
V
V
= 5 V
DD
IC
ID
= 0.5 V
= –1 V
= 5 mA
I
OL
V
DD
= 5 V
V
DD
= 3 V
400
300
200
100
200
100
0
0
0
1
2
3
4
5
6
7
8
–75 –50 –25
0
25
50
75 100 125
I – Low-Level Output Current – mA
OL
T
A
– Free-Air Temperature – °C
Figure 42
Figure 43
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
500
450
500
450
R
= 100 kΩ
R = 100 kΩ
L
L
400
350
400
350
T
A
= –40°C
300
300
250
200
150
100
50
250
200
150
100
50
T
A
= 25°C
V
= 5 V
DD
V
DD
= 3 V
T
= 85°C
A
0
0
0
2
4
6
8
–75 –50 –25
0
25
50
75 100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 44
Figure 45
INPUT BIAS CURRENT AND INPUT OFFSET CURRENT
COMMON-MODE INPUT VOLTAGE POSITIVE LIMIT
vs
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
4
10
3
10
2
10
8
V
V
= 3 V
T
A
= 25°C
DD
= 1 V
IC
See Note A
6
4
I
IB
1
1
10
I
IO
2
0
.01
25
45
65
85
105
125
0
2
4
6
8
V
DD
– Supply Voltage – V
T
A
– Free-sAir Temperature – °C
NOTE A: The typical values of input bias current and input offset
current below 5 pA are determined mathematically.
Figure 46
Figure 47
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
175
150
250
V
V
= 1 V
= 1 V
V
V
= 1 V
= 1 V
IC
O
IC
O
200
175
150
125
No Load
No Load
T
A
= –40°C
125
100
75
50
25
0
T
A
= 25°C
V
= 5 V
DD
100
75
V
DD
= 3 V
T
A
= 85°C
50
25
0
0
2
4
6
8
–75 –50 –25
0
25
50
75
100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 48
Figure 49
SLEW RATE
vs
SLEW RATE
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.9
0.8
0.7
V
V
= 1 V
V
V
= 1 V
IC
IC
I(PP)
= 1
= 1 V
= 1 V
I(PP)
= 1
A
A
V
V
R
C
= 100 kΩ
= 20 pF
= 25°C
R
C
= 100 kΩ
= 20 pF
L
L
L
L
T
A
0.6
0.5
0.4
0.3
V
DD
= 5 V
V
DD
= 3 V
0.2
0
2
4
6
8
–75 –50 –25
0
25
50
75
100 125
V
– Supply Voltage – V
DD
T
A
– Free-Air Temperature – °C
Figure 50
Figure 51
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
BIAS SELECT CURRENT
vs
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
FREQUENCY
– 300
– 270
– 240
5
4
3
T
V
= 25°C
A
R
= 100 kΩ
L
= 1/2 V
DD
I(SEL)
V
DD
= 5 V
– 210
T
= –40°C
A
– 180
– 150
V
DD
= 3 V
– 120
2
1
0
– 90
– 60
– 30
0
T
A
= 85°C
T
A
= 25°C
0
2
4
6
8
10
10
100
1000
V
DD
– Supply Voltage – V
f – Frequency – kHz
Figure 52
Figure 53
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
1000
900
800
700
600
500
400
300
200
1000
900
800
700
600
500
400
300
200
V = 10 mV
I
V = 10 mV
I
R
L
L
= 100 kΩ
R
L
C
L
= 100 kΩ
= 20 pF
= 25°C
C
= 20 pF
T
A
V
= 5 V
DD
V
DD
= 3 V
–75 –50 –25
0
25
50
75 100
0
1
2
3
4
5
6
7
8
125
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 54
Figure 55
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
6
–60°
–30°
0°
10
V
R
C
= 3 V
= 100 kΩ
= 20 pF
= 25°C
DD
L
L
10
T
A
5
4
10
10
30°
A
VD
3
2
60°
10
10
90°
Phase Shift
1
10
120°
150°
1
0.1
180°
1 M
1
10
100
1 k
10 k
100 k
f – Frequency – Hz
Figure 56
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
10
–60°
–30°
0°
V
R
C
= 5 V
= 100 kΩ
= 20 pF
= 25°C
DD
L
L
6
5
10
T
A
10
4
10
10
30°
A
VD
3
60°
2
10
10
90°
Phase Shift
1
120°
150°
1
0.1
180°
1 M
1
10
100
1 k
10 k
100 k
f – Frequency – Hz
Figure 57
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (MEDIUM-BIAS MODE)
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
PHASE MARGIN
vs
SUPPLY VOLTAGE
50°
48°
45°
43°
V = 10 mV
I
V = 10 mV
I
R
L
L
= 100 kΩ
R
L
L
= 100 kΩ
= 20 pF
= 25°C
C
= 20 pF
C
46°
T
A
44°
42°
40°
38°
41°
39°
37°
35°
V
= 5 V
DD
V
= 3 V
DD
36°
34°
32°
30°
0
1
2
3
4
5
6
7
8
– 75 – 50 – 25
0
25
50
75 100 125
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 58
Figure 59
PHASE MARGIN
vs
LOAD CAPACITANCE
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
44°
300
250
R
= 20Ω
T = 25°C
A
S
V = 10 mV
I
42°
40°
T
R
= 25°C
= 100 kΩ
A
L
V
DD
= 5 V
200
150
100
38°
36°
V
DD
= 3 V
V
= 5 V
DD
34°
32°
30°
28°
V
DD
= 3 V
50
0
0
10
20 30 40 50
60 70 80
90 100
1
10
100
1000
C
– Load Capacitance – pF
f – Frequency – Hz
L
Figure 60
Figure 61
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
LOW-BIAS MODE
electrical characteristics at specified free-air temperature
TLV2341I
TEST
CONDITIONS
†
PARAMETER
V
= 3 V
DD
TYP
V
= 5 V
DD
TYP
UNIT
T
A
MIN
MAX
MIN
MAX
V
V
R
R
= 1 V,
= 1 V,
= 50 Ω,
= 1 MΩ
O
IC
S
L
25°C
0.6
8
1.1
8
V
IO
Input offset voltage
mV
Full range
10
10
Average temperature of
input offset voltage
25°C to
85°C
α
1
1.1
µV/°C
pA
VIO
25°C
85°C
25°C
85°C
0.1
22
0.1
24
V
V
= 1 V,
= 1 V
O
IC
I
IO
Input offset current (see Note 4)
Input bias current (see Note 4)
1000
2000
1000
2000
0.6
175
0.6
200
V
V
= 1 V,
= 1 V
O
IC
I
IB
pA
–0.2
to
–0.3
to
2.3
–0.2
to
4
–0.3
to
4.2
25°C
V
V
2
Common-mode input
voltage range (see Note 5)
V
ICR
–0.2
to
–0.2
to
Full range
1.8
3.8
V
V
= 1 V,
= 100 mV,
= –1 mA
25°C
Full range
25°C
1.75
1.7
1.9
115
400
88
3.2
3
3.8
95
IC
ID
V
V
A
High-level output voltage
Low-level output voltage
V
OH
I
OH
V
V
= 1 V,
= –100 mV,
= 1 mA
150
190
150
190
IC
ID
mV
V/mV
dB
OL
Full range
25°C
I
OL
V
R
= 1 V,
= 1 MΩ,
50
50
65
60
70
65
50
50
65
60
70
65
520
94
IC
Large-signal differential
voltage amplification
L
VD
Full range
25°C
See Note 6
V
V
R
= 1 V,
= V
O
IC
min,
ICR
CMRR Common-mode rejection ratio
Full range
25°C
= 50 Ω
S
V
V
R
= 1 V,
= 1 V,
= 50 Ω
86
86
IC
O
Supply-voltage rejection ratio
k
dB
nA
µA
SVR
(∆V
DD
/∆V )
IO
Full range
25°C
S
I
I
Bias select current
Supply current
V
10
5
65
10
I(SEL)
I(SEL) = 0
V
= 1 V,
O
25°C
17
27
17
27
V
IC
= 1 V,
DD
Full range
No load
†
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At V
= 5 V, V
= 0.25 V to 2 V; at V = 3 V, V = 0.5 V to 1.5 V.
DD
O(PP)
DD O
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
LOW-BIAS MODE
operating characteristics at specified free-air temperature, V
= 3 V
DD
TLV2341I
TYP
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
MAX
V
R
= 1 V,
= 1 MΩ,
V
= 1 V,
= 20 pF,
25°C
85°C
0.02
0.02
IC
L
I(PP)
C
R
C
SR
Slew rate at unity gain
V/µs
L
S
L
See Figure 92
f = kHz,
See Figure 93
= 20 Ω,
V
n
Equivalent input noise voltage
Maximum output-swing bandwidth
Unity-gain bandwidth
25°C
68
nV/√Hz
25°C
85°C
25°C
85°C
–40°C
25°C
85°C
2.5
2
V
R
= V
OH
= 1 MΩ,
,
= 20 pF,
O
B
kHz
OM
1
See Figure 92
C = 20 pF,
L
L
27
V = 10 mV,
I
B
kHz
R
= 1 MΩ,
See Figure 94
21
L
39°
34°
28°
V = 10 mV,
f = B ,
R = 1 MΩ,
I
1
C
= 20 pF,
φ
m
Phase margin
L
L
See Figure 94
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLV2341I
TYP
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
MAX
25°C
85°C
25°C
85°C
0.03
V
R
C
= 1 V,
= 1 MΩ,
= 20 pF,
IC
L
L
V
= 1 V
I(PP)
I(PP)
0.03
SR
Slew rate at unity gain
V/µs
0.03
V
= 2.5 V
See Figure 92
0.02
f =1 kHz,
See Figure 93
R
= 20 Ω,
S
V
n
Equivalent input noise voltage
Maximum output-swing bandwidth
Unity-gain bandwidth
25°C
68
nV/√Hz
25°C
85°C
25°C
85°C
–40°C
25°C
85°C
5
4
V
R
= V
OH
= 1 MΩ,
,
C
= 20 pF,
O
L
L
B
kHz
OM
1
See Figure 92
C = 20 pF,
L
85
V = 10 mV,
I
L
B
kHz
R
= 1 MΩ,
See Figure 94
55
38°
34°
28°
V = 10 mV,
f = B ,
R = 1 MΩ,
I
L
1
C
= 20 pF,
φ
m
Phase margin
L
See Figure 94
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
LOW-BIAS MODE
electrical characteristics, T = 25°C
A
TLV2341Y
V
= 3 V
DD
TYP
V
= 5 V
DD
TYP
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
MIN
MAX
V
R
= 1 V,
= 50 Ω,
V
R
= 1 V,
= 1 MΩ
O
S
IC
L
V
Input offset voltage
0.6
0.1
0.6
8
1.1
0.1
0.6
8
mV
pA
pA
IO
Input offset current
(see Note 4)
I
I
V
O
= 1 V,
= 1 V,
V
IC
= 1 V
= 1 V
IO
Input bias current
(see Note 4)
V
O
V
IC
IB
–0.2
to
–0.3
to
2.3
–0.2
to
4
–0.3
to
4.2
Common-mode input voltage
range (see Note 5)
V
ICR
V
2
V
= 1 V,
= –1 mA
V
V
= 100 mV,
= –100 mV,
= 1 MΩ,
IC
ID
V
V
High-level output voltage
Low-level output voltage
1.75
1.9
115
400
88
3.2
3.8
95
V
mV
OH
I
OH
V
= 1 V,
= 1 mA
IC
ID
150
150
OL
I
OL
Large-signal differential
voltage amplification
V
IC
= 1 V,
R
L
A
VD
50
65
70
50
65
70
520
94
V/mV
dB
See Note 6
V
R
= 1 V,
= 50 Ω
V
V
= V
min,
ICR
O
IC
CMRR Common-mode rejection ratio
S
Supply-voltage rejection ratio
V
V
= 3 V to 5 V,
= 1 V,
= 1 V,
= 50 Ω
DD
O
IC
k
86
10
5
86
65
10
dB
nA
µA
SVR
I(SEL)
DD
(∆V
DD
/∆V
ID
)
R
S
I
I
Bias select current
V = 0
I(SEL)
V
O
= 1 V,
V
IC
= 1 V,
Supply current
17
17
No load
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At V
= 5 V, V = 0.25 V to 2 V; at V = 3 V, V = 0.5 V to 1.5 V.
DD O
DD
O
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OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
Table of Graphs
FIGURE
62, 63
V
Input offset voltage
Distribution
Distribution
IO
α
Input offset voltage temperature coefficient
64, 65
VIO
vs Output current
vs Supply voltage
vs Temperature
66
67
68
V
OH
V
OL
High-level output voltage
vs Common-mode input voltage
vs Temperature
vs Differential input voltage
vs Low-level output current
69
70, 72
71
Low-level output voltage
73
vs Supply voltage
vs Temperature
vs Frequency
74
75
86, 87
A
VD
Large-signal differential voltage amplification
I
I
Input bias current
vs Temperature
vs Temperature
vs Supply voltage
76
76
77
IB
Input offset current
IO
V
Common-mode input voltage
IC
vs Supply voltage
vs Temperature
78
79
I
Supply current
Slew rate
DD
vs Supply voltage
vs Temperature
80
81
SR
Bias select current
vs Supply current
vs Frequency
82
83
V
B
Maximum peak-to-peak output voltage
O(PP)
vs Temperature
vs Supply voltage
84
85
Unity-gain bandwidth
Phase margin
1
vs Supply voltage
vs Temperature
vs Load capacitance
88
89
90
φ
m
V
n
Equivalent input noise voltage
Phase shift
vs Frequency
vs Frequency
91
86, 87
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OPERATIONAL AMPLIFIERS
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
70
50
V
T
= 3 V
V
T
= 5 V
DD
= 25°C
DD
= 25°C
A
A
60
50
P Package
P Package
40
30
40
30
20
10
0
20
10
0
–5 –4 –3 –2
–1
0
1
2
3
4
5
–5 –4 –3 –2
–1
0
1
2
3
4
5
V
IO
– Input Offset Voltage – mV
V
IO
– Input Offset Voltage – mV
Figure 62
Figure 63
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2341
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
TEMPERATURE COEFFICIENT
50
70
V
= 5 V
DD
= 25°C to 85°C
V
= 3 V
DD
= 25°C to 85°C
T
A
T
A
P Package
60
50
P Package
Outliers:
(1) 19.2 mV/°C
(1) 12.1 mV/°C
40
30
40
30
20
10
0
20
10
0
–10 –8 –6 –4 –2
0
2
4
6
8
10
–10
0
2
4
6
8
10
–8 –6 –4 –2
α
– Temperature Coefficient – µV/°C
α
– Temperature Coefficient – µV/°C
VIO
VIO
Figure 64
Figure 65
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
SUPPLY VOLTAGE
8
6
4
5
4
3
V
V
T
= 1 V
= 100 mV
= 25°C
V
V
R
= 1 V
= 100 mV
= 1 MΩ
= 25°C
IC
ID
A
IC
ID
L
T
A
V
DD
= 5 V
V
DD
= 3 V
2
1
0
2
0
0
–2
–4
–6
–8
0
2
4
6
8
I
– High-Level Output Current – mA
V
DD
– Supply Voltage – V
OH
Figure 66
Figure 67
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
FREE-AIR TEMPERATURE
700
650
600
550
3
V
= 3 V
= 1 V
= 100 mV
V
I
T
A
= 5 V
DD
DD
= 5 mA
V
IC
V
ID
OL
= 25°C
2.4
1.8
1.2
0.6
0
V
= –100 mV
ID
500
450
I
I
I
I
I
= – 500 µA
= –1 mA
= –2 mA
= –3 mA
= –4 mA
OH
OH
OH
OH
OH
400
350
V
= –1 V
ID
300
0
1
2
3
4
–75 –50 –25
0
25
50
75 100 125
V
IC
– Common-Mode Input Voltage – V
T
A
– Free-Air Temperature – °C
Figure 68
Figure 69
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
DIFFERENTIAL INPUT VOLTAGE
800
700
600
500
200
185
170
155
140
125
110
95
V
V
V
I
= 3 V
= 1 V
= –100 mV
= 1 mA
V
V
I
= 5 V
= |V / 2|
ID
= 5 mA
DD
IC
ID
DD
IC
OL
T
A
= 25°C
OL
400
300
200
100
80
65
50
0
–75 –50 –25
0
25
50
75 100 125
0
–2
–4
–6
–8
T
A
– Free-Air Temperature – °C
V
ID
– Differential Input Voltage – V
Figure 70
Figure 71
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
FREE-AIR TEMPERATURE
900
800
700
600
500
1
V
V
T
A
= 1 V
= –1 V
= 25°C
IC
ID
V
V
V
I
= 5 V
DD
IC
ID
0.9
0.8
0.7
0.6
0.5
0.4
0.3
= 0.5 V
= –1 V
= 5 mA
OL
V
DD
= 5 V
V
DD
= 3 V
400
300
200
100
0.2
0.1
0
0
0
1
2
3
4
5
6
7
8
–75 –50 –25
0
25
50
75 100 125
I
– Low-Level Output Current – mA
T
A
– Free-Air Temperature – °C
OL
Figure 72
Figure 73
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OPERATIONAL AMPLIFIERS
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
2000
1800
1600
1400
2000
1800
1600
1400
R
= 1 MΩ
R
= 1 MΩ
L
L
1200
1000
1200
1000
T
A
= –40°C
800
800
V
DD
= 5 V
600
400
200
0
600
400
200
0
V
= 3 V
DD
T
= 25°C
A
T
A
= 85°C
0
2
4
6
8
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 74
Figure 75
INPUT BIAS CURRENT AND INPUT
OFFSET CURRENT
vs
COMMON-MODE INPUT VOLTAGE
POSITIVE LIMIT
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
4
8
6
4
10
V
V
= 3 V
= 1 V
T
A
= 25°C
DD
IC
See Note A
3
10
2
10
1
10
I
IB
I
IO
2
0
1
0.1
25 35 45 55 65 75 85 95 105 115 125
0
2
4
6
8
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
NOTE A: The typical values of input bias current and input offset
current below 5 pA are determined mathematically.
Figure 76
Figure 77
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OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
30
25
20
15
10
5
45
40
V
V
= 1 V
= 1 V
IC
O
V
V
= 1 V
= 1 V
IC
O
No Load
No Load
35
30
25
V
= 5 V
20
15
DD
T
A
= –40°C
V
DD
= 3 V
T
= 25°C
A
10
5
T
= 85°C
A
0
0
–75 –50 –25
0
25
50
75 100 125
0
2
4
6
8
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 78
Figure 79
SLEW RATE
vs
SLEW RATE
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
0.07
0.06
0.05
0.04
0.03
0.02
0.07
0.06
0.05
V
V
= 1 V
IC
V
V
= 1 V
IC
= 1 V
I(PP)
= 1
= 1 V
I(PP)
= 1
A
V
A
V
R
C
= 1 MΩ
= 20 pF
= 25°C
L
L
R
C
= 1 MΩ
= 20 pF
L
L
T
A
0.04
0.03
V
= 5 V
DD
V
= 3 V
0.02
0.01
DD
0.01
0
0
0
2
4
6
8
–75 –50 –25
0
25
50
75 100 125
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 80
Figure 81
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OPERATIONAL AMPLIFIERS
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
BIAS SELECT CURRENT
vs
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
FREQUENCY
150
120
5
4
3
T
V
= 25°C
A
= V
DD
I(SEL)
V
DD
= 5 V
T
A
= –40°C
T
A
= 25°C
90
60
30
0
V
DD
= 3 V
2
1
0
T
A
= 85°C
R
= 1 MΩ
L
0.1
1
10
100
0
2
4
6
8
V
DD
– Supply Voltage – V
f – Frequency – kHz
Figure 82
Figure 83
UNITY-GAIN BANDWIDTH
vs
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
140
125
110
95
120
110
100
90
V = 10 mV
I
V = 10 mV
I
R
C
= 1 MΩ
= 20 pF
= 25°C
L
L
R
= 1 MΩ
L
L
C
= 20 pF
T
A
V
DD
= 5 V
80
70
80
65
60
50
50
35
40
30
20
V
= 3 V
DD
20
0
1
2
3
4
5
6
7
8
–75 –50 –25
0
25
50
75 100 125
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 84
Figure 85
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
10
6
10
5
10
4
10
3
10
2
10
1
10
–60°
–30°
0°
V
C
R
= 3 V
= 20 pF
= 1 MΩ
= 25°C
DD
L
L
T
A
30°
60°
A
VD
90°
Phase Shift
120°
1
150°
180°
0.1
1
10
100
1 k
10 k
100 k
1 M
f – Frequency – Hz
Figure 86
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
10
10
10
10
10
10
10
–60°
–30°
0°
V
C
R
= 5 V
= 20 pF
= 1 MΩ
= 25°C
DD
L
L
6
5
4
3
2
1
T
A
30°
60°
A
VD
90°
Phase Shift
120°
150°
180°
1
0.1
1
10
100
1 k
10 k
100 k
1 M
f – Frequency – Hz
Figure 87
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TYPICAL CHARACTERISTICS (LOW-BIAS MODE)
PHASE MARGIN
vs
SUPPLY VOLTAGE
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
42°
40°
40°
38°
36°
V = 10 mV
I
V
DD
= 3 V
R
C
= 1 MΩ
= 20 pF
= 25°C
L
L
T
A
V
DD
= 5 V
38°
36°
34°
34°
32°
30°
28°
26°
24°
22°
32°
30°
V = 10 mV
I
L
L
R
C
= 1 MΩ
= 20 pF
20°
0
2
4
6
8
–75 –50 –25
0
25
50
75 100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 88
Figure 89
PHASE MARGIN
vs
EQUIVALENT INPUT NOISE VOLTAGE
vs
LOAD CAPACITANCE
FREQUENCY
40°
38°
36°
200
175
150
125
100
75
V
R
T
A
= 3 V, 5 V
= 20 Ω
= 25°C
DD
S
V
= 3 V
DD
34°
32°
V
= 5 V
DD
30°
28°
26°
24°
22°
50
V = 10 mV
I
L
A
25
0
R
T
= 1 MΩ
= 25°C
20°
0
10 20 30 40 50 60 70 80 90 100
1
10
100
1000
C
– Load Capacitance – pF
f – Frequency – Hz
L
Figure 90
Figure 91
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PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLV2341 is optimized for single-supply operation, circuit configurations used for the various tests
often present some inconvenience since the input signal, in many cases, must be offset from ground. This
inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative
rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives
the same result.
V
DD+
V
DD
–
+
–
+
V
O
V
O
V
I
V
I
C
C
L
R
L
L
R
L
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 92. Unity-Gain Amplifier
2 kΩ
2 kΩ
V
DD
V
DD+
20 Ω
–
+
–
+
1/2 V
V
O
DD
V
O
20 Ω
20 Ω
20 Ω
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 93. Noise-Test Circuits
10 kΩ
10 kΩ
V
DD+
V
DD
100 Ω
100 Ω
V
I
V
–
+
–
+
I
V
V
O
O
1/2 V
DD
C
C
L
L
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 94. Gain-of-100 Inverting Amplifier
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PARAMETER MEASUREMENT INFORMATION
input bias current
Because of the high input impedance of the TLV2341 operational amplifier, attempts to measure the input bias
current can result in erroneous readings. The bias current at normal ambient temperature is typically less than
1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are offered to avoid
erroneous measurements:
•
•
Isolate the device from other potential leakage sources. Use a grounded shield around and between the
device inputs (see Figure 95). Leakages that would otherwise flow to the inputs are shunted away.
Compensate for the leakage of the test socket by actually performing an input bias current test (using a
picoammeter) with no device in the test socket. The actual input bias current can then be calculated by
subtracting the open-socket leakage readings from the readings obtained with a device in the test
socket.
Many automatic testers as well as some bench-top operational amplifier testers use the servo-loop
technique with a resistor in series with the device input to measure the input bias current (the voltage
drop across the series resistor is measured and the bias current is calculated). This method requires
that a device be inserted into the test socket to obtain a correct reading; therefore, an open-socket
reading is not feasible using this method.
8
5
V = V
IC
1
4
Figure 95. Isolation Metal Around Device Inputs (P package)
low-level output voltage
To obtain low-level supply-voltage operation, some compromise is necessary in the input stage. This
compromise results in the device low-level output voltage being dependent on both the common-mode input
voltage level as well as the differential input voltage level. When attempting to correlate low-level output
readings with those quoted in the electrical specifications, these two conditions should be observed. If
conditions other than these are to be used, please refer to the Typical Characteristics section of this data sheet.
input offset voltage temperature coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This
parameter is actually a calculation using input offset voltage measurements obtained at two different
temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device
and the test socket. This moisture results in leakage and contact resistance which can cause erroneous input
offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the
moisture also covers the isolation metal itself, thereby rendering it useless. These measurements should be
performed at temperatures above freezing to minimize error.
full-power response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage
swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is
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PARAMETER MEASUREMENT INFORMATION
generallymeasuredbymonitoringthedistortionleveloftheoutputwhileincreasingthefrequencyofasinusoidal
input signal until the maximum frequency is found above which the output contains significant distortion. The
full-peak response is defined as the maximum output frequency, without regard to distortion, above which full
peak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified
in this data sheet and is measured using the circuit of Figure 92. The initial setup involves the use of a sinusoidal
input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is
increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same
amplitude. Thefrequencyisthenincreaseduntilthemaximumpeak-to-peakoutputcannolongerbemaintained
(Figure 96). A square wave is used to allow a more accurate determination of the point at which the maximum
peak-to-peak output is reached.
(a) f = 100 Hz
(b) B
> f > 100 Hz
(c) f = B
OM
(d) f > B
OM
OM
Figure 96. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume,
short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET
devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more
pronounced with reduced supply levels and lower temperatures.
APPLICATION INFORMATION
single-supply operation
While the TLV2341 performs well using dual-
V
DD
power supplies (also called balanced or split
supplies), the design is optimized for single-
supply operation. This includes an input common-
mode voltage range that encompasses ground as
well as an output voltage range that pulls down to
ground. The supply voltage range extends down
to 2 V, thus allowing operation with supply levels
commonly available for TTL and HCMOS.
R2
R1
V
I
–
V
O
+
TLE2426
Many single-supply applications require that a
voltage be applied to one input to establish a
reference level that is above ground. This virtual
ground can be generated using two large
resistors, but a preferred technique is to use a
virtual-ground generator such as the TLE2426.
The TLE2426 supplies an accurate voltage equal
V
– V
V
DD
I
R2
R1
DD
2
V
O
2
Figure 97. Inverting Amplifier With
Voltage Reference
to V /2, while consuming very little power and is
DD
suitable for supply voltages of greater than 4 V.
45
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
single-supply operation (continued)
The TLV2341 works well in conjunction with digital logic; however, when powering both linear devices and digital
logic from the same power supply, the following precautions are recommended:
•
Power the linear devices from separate bypassed supply lines (see Figure 98); otherwise, the linear
device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital
logic.
•
Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive
decoupling is often adequate; however, RC decoupling may be necessary in high-frequency
applications.
–
Power
Supply
Logic
Logic
Logic
+
(a) COMMON-SUPPLY RAILS
–
+
Power
Supply
Logic
Logic
Logic
(b) SEPARATE-BYPASSED SUPPLY RAILS (preferred)
Figure 98. Common Versus Separate Supply Rails
input offset voltage nulling
The TLV2341 offers external input offset null control. Nulling of the input offset voltage can be achieved by
adjustinga25-kΩ potentiometerconnectedbetweentheoffsetnullterminalswiththewiperconnectedasshown
in Figure 99. The amount of nulling range varies with the bias selection. In the high-bias mode, the nulling range
allows the maximum offset voltage specified to be trimmed to zero. In low-bias and medium-bias modes, total
nulling may not be possible.
–
V
DD
+
N2
–
25 kΩ
N1
+
N2
25 kΩ
N1
GND
(b) SPLIT SUPPLY
(a) SINGLE SUPPLY
Figure 99. Input Offset Voltage Null Circuit
46
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
bias selection
Bias selection is achieved by connecting the bias-select pin to one of the three voltage levels (see Figure 100).
For medium-bias applications, it is recommended that the bias-select pin be connected to the midpoint between
the supply rails. This is a simple procedure in split-supply applications, since this point is ground. In
single-supply applications, the medium-bias mode necessitates using a voltage divider as indicated. The use
of large-value resistors in the voltage divider reduces the current drain of the divider from the supply line.
However, large-valueresistorsusedinconjunctionwithalarge-valuecapacitorrequiresignificanttimetocharge
up to the supply midpoint after the supply is switched on. A voltage other than the midpoint may be used if it
is within the voltages specified in the following table.
V
DD
BIAS-SELECT VOLTAGE
(single supply)
1 MΩ
Low
Medium
BIAS MODE
Low
Medium
High
V
DD
1 V to V
To BIAS SELECT
–1 V
High
DD
GND
1 MΩ
0.01 µF
Figure 100. Bias Selection for Single-Supply Applications
input characteristics
The TLV2341 is specified with a minimum and a maximum input voltage that, if exceeded at either input, could
cause the device to malfunction. Exceeding this specified range is a common problem, especially in
single-supply operation. The lower the range limit includes the negative rail, while the upper range limit is
specified at V
–1 V at T = 25°C and at V
–1.2 V at all other temperatures.
DD
A
DD
The use of the polysilicon-gate process and the careful input circuit design gives the TLV2341 good input offset
voltage drift characteristics relative to conventional metal-gate processes. Offset voltage drift in CMOS devices
is highly influenced by threshold voltage shifts caused by polarization of the phosphorus dopant implanted in
the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate) alleviates the polarization
problem, thus reducing threshold voltage shifts by more than an order of magnitude. The offset voltage drift with
time has been calculated to be typically 0.1 µV/month, including the first month of operation.
Because of the extremely high input impedance and resulting low bias-current requirements, the TLV2341 is
well suited for low-level signal processing; however, leakage currents on printed-circuit boards and sockets can
easily exceed bias-current requirements and cause a degradation in device performance. It is good practice
to include guard rings around inputs (similar to those of Figure 95 in the Parameter Measurement Information
section). These guards should be driven from a low-impedance source at the same voltage level as the
common-mode input (see Figure 101).
The inputs of any unused amplifiers should be tied to ground to avoid possible oscillation.
47
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
input characteristics (continued)
V
I
–
+
–
+
–
+
V
O
V
O
V
O
V
I
V
I
(c) UNITY-GAIN AMPLIFIER
(a) NONINVERTING AMPLIFIER
(b) INVERTING AMPLIFIER
Figure 101. Guard-Ring Schemes
noise performance
The noise specifications in operational amplifiers circuits are greatly dependent on the current in the first-stage
differential amplifier. The low input bias-current requirements of the TLV2341 results in a very low noise current,
which is insignificant in most applications. This feature makes the device especially favorable over bipolar
devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit greater noise
currents.
feedback
Operational amplifier circuits nearly always
employ feedback, and since feedback is the first
prerequisite for oscillation, caution is appropriate.
Most oscillation problems result from driving
capacitive loads and ignoring stray input
capacitance. A small-value capacitor connected
in parallel with the feedback resistor is an effective
remedy (see Figure 102). The value of this
capacitor is optimized empirically.
–
+
electrostatic-discharge protection
Figure 102. Compensation for Input Capacitance
The TLV2341 incorporates an internal electro-
static-discharge (ESD)-protection circuit that
prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care
should be exercised, however, when handling these devices as exposure to ESD may result in the degradation
of the device parametric performance. The protection circuit also causes the input bias currents to be
temperature dependent and have the characteristics of a reverse-biased diode.
latch-up
BecauseCMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLV2341inputs
andoutputaredesignedtowithstand–100-mAsurgecurrentswithoutsustaininglatch-up;however, techniques
should be used to reduce the chance of latch-up whenever possible. Internal protection diodes should not by
48
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
design be forward biased. Applied input and output voltage should not exceed the supply voltage by more that
300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply transients
should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the supply rails as close
to the device as possible.
The current path established if latch-up occurs is usually between the positive supply rail and ground and can
be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply
voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the
forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of
latch-up occurring increases with increasing temperature and supply voltages.
output characteristics
V
DD
The output stage of the TLV2341 is designed to
sink and source relatively high amounts of current
(see Typical Characteristics). If the output is
R
P
V
F
V
I
I
V
I
P
DD
O
I
–
+
R
P
I
I
subjected to
a short-circuit condition, this
L
P
V
O
high-current capability can cause device damage
undercertainconditions. Outputcurrentcapability
increases with supply voltage.
I
P
= Pullup Current
Required by the
Operational Amplifier
(typically 500 µA)
F
R2
I
R1
R
L
Although the TLV2341 possesses excellent
high-level output voltage and current capability,
methods are available for boosting this capability
if needed. The simplest method involves the use
L
Figure 103. Resistive Pullup to Increase V
OH
of a pullup resistor (R )connectedfromtheoutput
P
to the positive supply rail (see Figure 103). There
are two disadvantages to the use of this circuit.
First, the NMOS pulldown transistor N4 (see
equivalent schematic) must sink a comparatively
largeamountofcurrent. Inthiscircuit, N4behaves
likealinearresistorwithanonresistancebetween
approximately 60 Ω and 180 Ω, depending on
how hard the operational amplifier input is driven.
2.5 V
–
V
O
+
V
I
C
L
With very low values of R , a voltage offset from
0 V at the output occurs. Secondly, pullup resistor
P
T
= 25°C
A
f = 1 kHz
= 1 V
R acts as a drain load to N4 and the gain of the
V
P
I(PP)
–2.5 V
operational amplifier is reduced at output voltage
levels where N5 is not supplying the output
current.
Figure 104. Test Circuit for Output Characteristics
All operating characteristics of the TLV2341 are measured using a 20-pF load. The device drives higher
capacitive loads; however, as output load capacitance increases, the resulting response pole occurs at lower
frequencies thereby causing ringing, peaking, or even oscillation (see Figures 105, 106 and 107). In many
cases, adding some compensation in the form of a series resistor in the feedback loop alleviates the problem.
49
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2341, TLV2341Y
LinCMOS PROGRAMMABLE LOW-VOLTAGE
OPERATIONAL AMPLIFIERS
SLOS110A – MAY 1992 – REVISED AUGUST 1994
APPLICATION INFORMATION
output characteristics (continued)
(a) C = 20 pF, R = NO LOAD
(b) C = 130 pF, R = NO LOAD
(c) C = 150 pF, R = NO LOAD
L L
L
L
L
L
Figure 105. Effect of Capacitive Loads in High-Bias Mode
(a) C = 20 pF, R = NO LOAD
(b) C = 170 pF, R = NO LOAD
(c) C = 190 pF, R = NO LOAD
L L
L
L
L
L
Figure 106. Effect of Capacitive Loads in Medium-Bias Mode
(c) C = 310 pF, R = NO LOAD
(a) C = 20 pF, R = NO LOAD
(b) C = 260 pF, R = NO LOAD
L L
L
L
L
L
Figure 107. Effect of Capacitive Loads in Low-Bias Mode
50
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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TLV2341, LinCMOS(TM) Programmable Low-Voltage Operational Amplifier
DEVICE STATUS: ACTIVE
PARAMETER NAME
Vs (max) (V)
TLV2341
8
Vs (min) (V)
2
IQ per channel (max) (mA)
IQ per channel (typ) (mA)
GBW (typ) (MHz)
1.6
0.675
1.7
Slew Rate (typ) (V/us)
3.6
VIO (Full Range) (max) (mV) 10
VIO (25 deg C) (max) (mV)
IIB (max) (pA)
8
2000
65
25
1
CMRR (min) (dB)
Vn at 1kHz (typ) (nV/rtHz)
Number of Channels
Spec'd at Vs (V)
5
Open Loop Gain (min) (dB)
Offset Drift (typ) (uV/C)
74
2.7
FEATURES
Back to Top
l Wide Range of Supply Voltages Over Specified Temperature Range:
l T = -40°C to 85°C...2 V to 8 V
A
l Fully Characterized at 3 V and 5 V
Single-Supply Operation
l
l Common-Mode Input-Voltage Range
Extends Below the Negative Rail and up to
V
-1 V at 25°C
DD
l Output Voltage Range Includes Negative Rail
2 of 4
12
l High Input Impedance...10
Typ
Low Noise...25 nV/ Hz\ Typically at
l
f = 1 kHz (High-Bias Mode)
l ESD-Protection Circuitry
Designed-In Latch-Up Immunity
l
l Bias-Select Feature Enables Maximum Supply Current Range From 17 uA to
1.5 mA at 25°C
LinCMOS is a trademark of Texas Instruments Incorporated.
DESCRIPTION
Back to Top
The TLV2341 operational amplifier has been specifically developed for low-voltage, single-
supply applications and is fully specified to operate over a voltage range of 2 V to 8 V. The
TM
device uses the Texas Instruments silicon-gate LinCMOS
technology to facilitate low-power,
TM
low-voltage operation and excellent offset-voltage stability. LinCMOS
technology also
enables extremely high input impedance and low bias currents allowing direct interface to
high-impedance sources.
The TLV2341 offers a bias-select feature, which allows the device to be programmed with a
wide range of different supply currents and therefore different levels of ac performance. The
supply current can be set at
17 uA, 250 uA, or 1.5 mA, which results in slew-rate specifications between 0.02 and 2.1 V/us
(at 3 V).
The TLV2341 operational amplifiers are especially well suited to single-supply applications and
are fully specified and characterized at 3-V and 5-V power supplies. This low-voltage single-
supply operation combined with low power consumption makes this device a good choice for
remote, inaccessible, or portable battery-powered applications. The common-mode input
range includes the negative rail.
The device inputs and outputs are designed to withstand -100-mA currents without sustaining
latch-up. The TLV2341 incorporates internal ESD-protection circuits that prevents functional
failures at voltages up to
2000 V as tested under MIL-STD 883 C, Methods 3015.2; however, care should be exercised
in handling these devices as exposure to ESD may result in the degradation of the device
parametric performance.
The D package is available taped and reeled. Add R suffix to the device type (e.g., TLV2341IDR).
The PW package is only available left-end taped and reeled (e.g., TLV2341IPWLE).
TECHNICAL DOCUMENTS
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To view the following documents, Acrobat Reader 3.x is required.
To download a document to your hard drive, right-click on the link and choose 'Save'.
DATASHEET
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Full datasheet in Acrobat PDF: slos110a.pdf (748 KB) (
)
Updated: 08/01/1994
Full datasheet in Zipped PostScript: slos110a.psz (679 KB)
3 of 4
APPLICATION NOTES
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View Application Reports for Signal Amplifiers (Less than equal to 100MHz)
Analog Applications Journal May 2000 (SLYT015 -
)
l
Updated: 04/20/2000
l Analog Applications Journal, September 1999 edition (SLYT005 -
)
Updated: 07/15/1999
l Analysis Of The Sallen-Key Architecture (SLOA024A - Updated: 07/27/1999)
Current Feedback Amplifiers: Review, Stability Analysis, and Applications (SBOA081 -
l
)
Updated: 11/20/2000
Low-Power Signal Conditioning For A Pressure Sensor (SLAA034 -
)
l
Updated: 09/08/1998
Back to Top
USER MANUALS
Universal Op Amp Single, Dual, Quad (SOIC) Evaluation Module With
l
l
Shutdown (SLOU061, 1160 KB -
)
Updated: 10/22/1999
Universal Operational Amplifier EVM (SLVU006A, 387 KB -
)
Updated: 03/22/1999
l Universal Operational Amplifier Evaluation Module Selection Guide (SLOU060A, 16 KB -
)
Updated: 09/28/2000
l Universal Operational Amplifier Single, Dual, Quad (MSOP/TSSOP) (SLOU055, 1196 KB -
)
Updated: 10/22/1999
Universal Operational Amplifier Single, Dual, Quad (PDIP) (SLOU062, 1211 KB -
l
Updated:
)
10/22/1999
BLOCK DIAGRAMS
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Digital Cellphone
SAMPLES
Back to Top
ORDERABLE DEVICE
PACKAGE
PINS
TEMP (ºC)
STATUS
ACTIVE
ACTIVE
SAMPLES
TLV2341ID
TLV2341IP
D
P
8
8
Request Samples
Request Samples
PRICING/AVAILABILITY
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BUDGETARY
ORDERABLE
DEVICE
TEMP
(ºC)
PRICE
US$/UNIT
QTY=1000+
PACK
QTY
PACKAGE PINS
STATUS
PRICING/AVAILABILITY
TLV2341ID
TLV2341IDR
TLV2341IP
D
D
P
8
8
8
ACTIVE
ACTIVE
ACTIVE
0.53
0.53
0.53
75
2500
50
Check stock or order
Check stock or order
Check stock or order
TLV2341IPWLE
TLV2341IPWR
PW
PW
8
8
OBSOLETE
ACTIVE
0.53
2000
Check stock or order
DEVELOPMENT TOOLS
Back to Top
Tool Part
Tool Title
Number
Tool Type
UNIV-OPAMP- Universal EVM for Single/Dual OpAmps without Shutdown in
1B MSOP/SOIC/SOT-23 packages
Evaluation Modules
(EVM)
UNIV-OPAMP- Universal EVM for Single/Dual OpAmps with Shutdown in
2B MSOP/SOIC/SOT-23 packages
Evaluation Modules
(EVM)
4 of 4
UNIV-OPAMP- Universal EVM for Single/Dual/Quad OpAmps with/without Shutdown in
Evaluation Modules
(EVM)
3B
UNIV-OPAMP- Universal EVM for Single/Dual/Quad OpAmps with/without Shutdown in
4B SOIC packages
UNIV-OPAMP- Universal EVM for Single/Dual/Quad OpAmps with/without Shutdown in
5B PDIP packages
MSOP/TSSOP packages
Evaluation Modules
(EVM)
Evaluation Modules
(EVM)
Table Data Updated on: 11/29/2000
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