MAX4051ACEE [ROCHESTER]
Single-Ended Multiplexer, 1 Func, 8 Channel, CMOS, PDSO16, 0.150 INCH, 0.025 INCH PITCH, MO-137AB, QSOP-16;
| 型号： | MAX4051ACEE |
| 厂家： | 
Rochester Electronics |
| 描述： | Single-Ended Multiplexer, 1 Func, 8 Channel, CMOS, PDSO16, 0.150 INCH, 0.025 INCH PITCH, MO-137AB, QSOP-16 光电二极管 |
| 文件： | 总22页 (文件大小：1106K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-0463; Rev 2; 10/05
Low-Voltage, CMOS Analog
Multiplexers/Switches
General Description
____________________________Features
The MAX4051/MAX4052/MAX4053 and MAX4051A/
MAX4052A/MAX4053A are low-voltage, CMOS analog
ICs configured as an 8-channel multiplexer (MAX4051/A),
two 4-channel multiplexers (MAX4052/A), and three sin-
gle-pole/double-throw (SPDT) switches (MAX4053/A).
The A-suffix parts are fully characterized for on-resistance
match, on-resistance flatness, and low leakage.
♦ Pin Compatible with Industry-Standard
74HC4051/74HC4052/74HC4053
♦ Guaranteed On-Resistance:
100Ω with 5V Supplies
♦ Guaranteed Match Between Channels:
6Ω (MAX4051A–MAX4053A)
12Ω (MAX4051–MAX4053)
These CMOS devices can operate continuously with
dual power supplies ranging from 2.ꢀ7 to 87 or a
single supply between +2.ꢀ7 and +167. Each switch
can handle rail-to-rail analog signals. The off-leakage
current is only 0.1nA at +25°C or 5nA at +85°C
(MAX4051A/MAX4052A/MAX4053A).
♦ Guaranteed Low Off-Leakage Currents:
0.1nA at +25°C (MAX4051A–MAX4053A)
1nA at +25°C (MAX4051–MAX4053)
♦ Guaranteed Low On-Leakage Currents:
0.1nA at +25°C (MAX4051A–MAX4053A)
1nA at +25°C (MAX4051–MAX4053)
All digital inputs have 0.87 to 2.47 logic thresholds,
ensuring TTL/CMOS-logic compatibility when using
57 or a single +57 supply.
♦ Single-Supply Operation from +2.0V to +16V
Dual-Supply Operation from 2.7V to 8V
♦ TTL/CMOS-Logic Compatible
♦ Low Distortion: < 0.04% (600Ω)
♦ Low Crosstalk: < -90dB (50Ω)
♦ High Off-Isolation: < -90dB (50Ω)
________________________Applications
Battery-Operated Equipment
Audio and 7ideo Signal Routing
Low-7oltage Data-Acquisition Systems
Communications Circuits
Ordering Information
PART
TEMP RANGE
0°C to +ꢀ0°C
0°C to +ꢀ0°C
0°C to +ꢀ0°C
PIN-PACKAGE
16 Plastic DIP
16 Narrow SO
16 QSOP
MAX4051ACPE
MAX4051ACSE
MAX4051ACEE
Ordering Information continued at end of data sheet.
___________________________________Pin Configurations/Functional Diagrams
TOP VIEW
MAX4052
MAX4053
MAX4051
NO0B
NO2B
COMB
NO3B
NO1B
INH
NOB
NCB
NOA
COMA
NCA
INH
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
NO4
NO6
COM
NO7
NO5
INH
V+
V+
1
2
3
4
5
6
7
8
16
15
14
16
15
14
13
V+
16
15
14
NO2A
NO1A
COMB
COMC
NOC
NO2
NO1
13 COMA
12 NO0A
13 NO0
12 NO3
11 ADDA
12 NCC
11
10
9
NO3A
ADDA
ADDB
11
10
9
ADDC
ADDB
ADDA
V-
V-
V-
LOGIC
10
9
LOGIC
ADDB
ADDC
GND
GND
GND
DIP/SO/QSOP
DIP/SO/QSOP
DIP/SO/QSOP
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Low-Voltage, CMOS Analog
Multiplexers/Switches
ABSOLUTE MAXIMUM RATINGS
7oltages Referenced to GND
Continuous Power Dissipation (T = +ꢀ0°C)
A
7+ ........................................................................-0.37 to +1ꢀ7
7-..........................................................................+0.37 to -1ꢀ7
7+ to 7-................................................................-0.37 to +1ꢀ7
7oltage into Any Terminal (Note 1) ..........(7- - 27) to (7+ + 27)
or 30mA (whichever occurs first)
Continuous Current into Any Terminal.............................. 30mA
Peak Current, NO or COM
Plastic DIP (derate 10.53mW/°C above +ꢀ0°C)............842mW
Narrow SO (derate 8.ꢀ0mW/°C above +ꢀ0°C)..............696mW
QSOP (derate 8.00mW/°C above +ꢀ0°C) .....................640mW
CERDIP (derate 10.00mW/°C above +ꢀ0°C) ................800mW
Operating Temperature Ranges
MAX405_C_ E/MAX405_AC_E.............................0°C to +ꢀ0°C
MAX405_E_ E/MAX405_AE_E...........................-40°C to +85°C
MAX405_MJE/MAX405_AMJE........................-55°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
(pulsed at 1ms, 10% duty cycle) ................................. 100mA
Note 1: Signals on any terminal exceeding 7+ or 7- are clamped by internal diodes. Limit forward-diode current to maximum
current rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Dual Supplies
(7+ = +4.57 to +5.57, 7- = -4.57 to -5.57, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX A
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
ANALOG SWITCH
Analog Signal Range
7
, 7
C, E, M
= +25°C
7-
7+
100
125
7
COM NO
T
60
A
7+ = 57, 7- = -57, I
= 1mA,
NO
COM–NO On-Resistance
R
Ω
ON
7
COM
= 37
C, E, M
MAX4051A,
T
A
= +25°C
6
MAX4052A,
MAX4053A
COM–NO On-Resistance
Match Between Channels
(Note 3)
7+ = 57, 7- = -57,
= 1mA,
C, E, M
= +25°C
12
12
18
10
15
∆R
I
Ω
Ω
ON
NO
MAX4051,
MAX4052,
MAX4053
T
A
7
COM
= 37
C, E, M
7+ = 57, 7- = -57,
I = 1mA,
NO
MAX4051A,
MAX4052A,
MAX4053A
T
A
= +25°C
COM–NO On-Resistance
Flatness (Note 4)
R
FLAT(ON)
C, E, M
= +25°C
7
COM
= -37, 07, 37
T
A
-1
0.002
0.002
1
7+ = 5.57, 7- = -5.57,
MAX4051,
MAX4052,
MAX4053
7
7
= 4.57,
C, E
M
-10
10
NO
= -4.57
COM
-100
100
0.1
5
NO Off-Leakage Current
(Note 5)
I
nA
NO(OFF)
T
A
= +25°C -0.1
7+ = 5.57, 7- = -5.57,
MAX4051A,
MAX4052A, C, E
MAX4053A
7
7
= -4.57,
-5
NO
= 4.57
COM
M
-100
100
2
_______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(7+ = +4.57 to +5.57, 7- = -4.57 to -5.57, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX A
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
T
= +25°C -0.1
0.002
0.002
0.002
0.002
0.002
0.002
0.002
0.002
0.002
0.002
0.002
0.002
0.1
5
A
MAX4051A C, E
M
-5
-100
-1
100
1
T
A
= +25°C
MAX4051
C, E
M
-10
-100
10
100
0.1
2.5
100
1
7+ = 5.57, 7- = -5.57,
7
7
= 4.57,
NO
T
A
= +25°C -0.1
= -4.57
COM
MAX4052A,
MAX4053A
C, E
M
-2.5
-100
-1
T
A
= +25°C
MAX4052,
MAX4053
C, E
M
-5
5
-50
50
0.1
5
COM Off-Leakage
Current (Note 5)
I
nA
COM(OFF)
T
A
= +25°C -0.1
MAX4051A C, E
M
-5
-100
-1
100
1
T
A
= +25°C
MAX4051
C, E
M
-10
-100
10
100
0.1
2.5
50
1
7+ = 5.57, 7- = -5.57,
7
7
= -4.57,
NO
T
A
= +25°C -0.1
= 4.57
COM
MAX4052A,
MAX4053A
C, E
M
-2.5
-50
-1
T
A
= +25°C
MAX4052,
MAX4053
C, E
M
-5
5
-50
50
0.1
5
T
A
= +25°C -0.1
MAX4051A C, E
M
-5
-100
-1
100
1
T
A
= +25°C
MAX4051
C, E
M
-10
-100
10
100
0.1
2.5
50
1
COM On-Leakage
Current (Note 5)
7+ = 5.57, 7- = -5.57,
= 7 4.57
I
nA
COM(ON)
7
=
NO
COM
T
A
= +25°C -0.1
MAX4052A,
MAX4053A
C, E
M
-2.5
-50
-1
T
A
= +25°C
MAX4052,
MAX4053
C, E
M
-5
5
-50
50
_______________________________________________________________________________________
3
Low-Voltage, CMOS Analog
Multiplexers/Switches
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(7+ = +4.57 to +5.57, 7- = -4.57 to -5.57, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX A
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
DIGITAL I/O
SYMBOL
CONDITIONS
UNITS
ADD, INH Input Logic
Threshold High
7
C, E, M
C, E, M
C, E, M
2.4
7
7
IH
ADD, INH Input Logic
Threshold Low
7
0.8
1
IL
ADD, INH Input Current
Logic High or Low
I
, I
IH IL
7
, 7 = 7+, 07
ADD INH
-1
0.03
µA
SWITCH DYNAMIC CHARACTERISTICS
T
= +25°C
50
40
1ꢀ5
225
150
200
250
A
Turn-On Time (Note 6)
Turn-Off Time (Note 6)
t
Figure 3
Figure 3
ns
ns
ON
C, E, M
= +25°C
T
A
t
OFF
C, E, M
Transition Time
t
Figure 2
Figure 4
T
= +25°C
= +25°C
ꢀ5
10
ns
ns
TRANS
A
A
Break-Before-Make Delay
t
T
2
OPEN
C = 1nF, R = 0Ω, 7
= 07,
L
S
NO
Charge Injection (Note 6)
Q
T
A
= +25°C
2
10
pC
Figure 5
NO Off-Capacitance
COM Off-Capacitance
C
7
7
= GND, f = 1MHz, Figure ꢀ
T
T
= +25°C
= +25°C
2
2
pF
pF
NO(OFF)
NO
A
C
= GND, f = 1MHz, Figure ꢀ
COM(OFF)
COM
A
7
= 7
= GND, f = 1MHz,
NO
COM
Switch On-Capacitance
Off-Isolation
C
T
A
T
A
T
A
= +25°C
= +25°C
= +25°C
8
pF
dB
dB
(ON)
Figure ꢀ
C = 15pF, R = 50Ω, f = 100kHz,
7
L
NO
L
7
<-90
<-90
ISO
= 17
, Figure 6
RMS
Channel-to-Channel
Crosstalk
C = 15pF, R = 50Ω, f = 100kHz,
7
L
NO
L
7
CT
= 17
, Figure 6
RMS
POWER SUPPLY
Power-Supply Range
7+, 7-
I+
C, E, M
= +25°C
2.ꢀ
-1
8
1
7
T
A
0.1
0.1
7+ Supply Current
7- Supply Current
INH = ADD = 07 or 7+
INH = ADD = 07 or 7+
µA
C, E, M
= +25°C
10
1
T
A
-1
I-
µA
C, E, M
-10
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: ∆R = R - R
.
ON(MIN)
ON
ON(MAX)
Note 4: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges; i.e., 7 = 37 to 07 and 07 to -37.
NO
Note 5: Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at
= +25°C.
T
A
Note 6: Guaranteed by design, not production tested.
4
_______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(7+ = +4.57 to +5.57, 7- = 07, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX A
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
ANALOG SWITCH
Analog Signal Range
7
, 7
C, E, M
= +25°C
7-
7+
225
280
1
7
COM NO
T
A
125
7+ = 57, I
= 1mA,
NO
COM–NO On-Resistance
R
Ω
ON
7
= 3.57
COM
C, E, M
= +25°C
T
A
-1
-10
-100
-1
0.002
7+ = 5.57, 7
= 4.57,
NO
C, E
M
10
100
1
7
= 07
COM
NO Off-Leakage Current
(Note 5)
I
nA
nA
nA
NO(OFF)
T
A
= +25°C
0.002
0.002
0.002
0.002
0.002
0.002
0.002
7+ = 5.57, 7
= 07,
NO
C, E
M
-10
-100
-1
10
100
1
7
= 4.57
COM
T
A
= +25°C
MAX4051/A C, E
M
-10
-100
-1
10
100
1
7+ = 5.57, 7
= 07
= 4.57,
NO
7
COM
T
A
= +25°C
MAX4052/A,
MAX4053/A
C, E
M
-5
5
-50
-1
50
1
COM Off-Leakage
Current (Note 5)
I
COM(OFF)
T
A
= +25°C
MAX4051/A C, E
M
-10
-100
-1
10
100
1
7+ = 5.57, 7
= 07,
NO
7
= 4.57 or 07
COM
T
A
= +25°C
MAX4052/A,
MAX4053/A
C, E
M
-5
5
-50
-1
50
1
T
A
= +25°C
MAX4051/A C, E
M
-10
-100
-1
10
100
1
COM On-Leakage
Current (Note 5)
7+ = 5.57,
7 = 7
I
COM(ON)
= 4.57
NO
COM
T
A
= +25°C
MAX4052/A,
MAX4053/A
C, E
M
-10
-100
10
100
DIGITAL I/O
ADD, INH Input Logic
Threshold High
7
C, E, M
C, E, M
C, E, M
2.4
7
7
IH
ADD, INH Input Logic
Threshold Low
7
0.8
1
IL
ADD, INH Input Current
Logic High or Low
I
I
7
7 = 7+, 07
ADD, INH
-1
-1
0.03
µA
IH, IL
POWER SUPPLY
T
A
= +25°C
1
7+ Supply Current
I+
INH = ADD = 07 or 7+
µA
C, E, M
10
_______________________________________________________________________________________
5
Low-Voltage, CMOS Analog
Multiplexers/Switches
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(7+ = +4.57 to +5.57, 7- = 07, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX A
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
SWITCHDYNAMIC CHARACTERISTICS
T
= +25°C
90
60
200
2ꢀ5
125
1ꢀ5
A
Turn-On Time (Note 6)
t
Figure 3
ns
ON
C, E, M
= +25°C
T
A
Turn-Off Time (Note 6)
Break-Before-Make Delay
Charge Injection (Note 6)
t
Figure 3
Figure 4
ns
ns
OFF
C, E, M
t
T
A
= +25°C
30
2
OPEN
C = 1nF, R = 0Ω, 7
= 07,
L
S
NO
Q
T
A
= +25°C
10
pC
Figure 5
C = 15pF, R = 50Ω, f = 100kHz,
NO
L
L
Off-Isolation
7
T
T
= +25°C
= +25°C
<-90
<-90
dB
dB
ISO
A
7
= 17
, Figure 6
RMS
Channel-to-Channel
Crosstalk
C = 15pF, R = 50Ω, f = 100kHz,
L
L
7
CT
A
7
= 17
, Figure 6
RMS
NO
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: ∆R = R - R
.
ON(MIN)
ON
ON(MAX)
Note 4: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges; i.e., 7 = 37 to 07 and 07 to -37.
NO
Note 5: Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at
= +25°C.
T
A
Note 6: Guaranteed by design, not production tested.
6
_______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(7+ = +3.07 to +3.67, 7- = 07, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX A
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
ANALOG SWITCH
Analog Signal Range
7
, 7
C, E, M
= +25°C
7-
7+
525
ꢀ00
1
7
COM NO
T
A
250
I
7
= 1mA, 7+ = 37,
NO
COM–NO On-Resistance
R
Ω
ON
= 1.57
COM
C, E, M
= +25°C
T
A
-1
-10
-100
-1
0.002
7+ = 3.67, 7
7
= 37,
NO
NO
C, E
M
10
100
1
= 07
COM
NO Off-Leakage Current
(Note 5)
I
nA
nA
nA
NO(OFF)
T
A
= +25°C
0.002
0.002
0.002
0.002
0.002
0.002
0.002
7+ = 3.67, 7
= 37
= 07,
= 37,
C, E
M
-10
-100
-1
10
100
1
7
COM
T
A
= +25°C
MAX4051/A C, E
M
-10
-100
-1
10
100
1
7+ = 3.67, 7
7
NO
= 07
COM
T
A
= +25°C
MAX4052/A,
MAX4053/A
C, E
M
-5
5
-50
-1
50
1
COM Off-Leakage
Current (Note 5)
I
COM(OFF)
T
A
= +25°C
MAX4051/A C, E
M
-10
-100
-1
10
100
1
7+ = 3.67, 7
7
= 07,
NO
= 37
COM
T
A
= +25°C
MAX4052/A,
MAX4053/A
C, E
M
-5
5
-50
-1
50
1
T
A
= +25°C
MAX4051/A C, E
M
-10
-100
-1
10
100
1
COM On-Leakage
Current (Note 5)
7+ = 3.67,
7 = 7
I
COM(ON)
= 37
NO
COM
T
A
= +25°C
MAX4052/A,
MAX4053/A
C, E
M
-10
-100
10
100
7
DIGITAL I/O
ADD, INH Input Logic
Threshold High
7
C, E, M
C, E, M
C, E, M
2.4
IH
ADD, INH Input Logic
Threshold Low
7
0.8
1
7
IL
ADD, INH Input Current
Logic High or Low
I
I
7
7 = 7+, 07
ADD, INH
-1
-1
0.03
µA
µA
IH, IL
POWER SUPPLY
T
A
= +25°C
1
7+ Supply Current
I+
INH = ADD = 07 or 7+
C, E, M
10
_______________________________________________________________________________________
7
Low-Voltage, CMOS Analog
Multiplexers/Switches
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
(7+ = +3.07 to +3.67, 7- = 07, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX A
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
SWITCHDYNAMIC CHARACTERISTICS
T
= +25°C
180
100
600
ꢀ00
300
400
A
Turn-On Time (Note 6)
t
Figure 3
ns
ON
C, E, M
= +25°C
T
A
Turn-Off Time (Note 6)
Break-Before-Make Delay
Charge Injection (Note 6)
t
Figure 3
Figure 4
ns
ns
OFF
C, E, M
t
T
A
= +25°C
90
1
OPEN
C = 1nF, R = 0Ω, 7
= 07,
L
S
NO
Q
T
A
= +25°C
10
pC
Figure 5
C = 15pF, R = 50Ω, f = 100kHz,
NO
L
L
Off-Isolation
7
T
T
= +25°C
= +25°C
<-90
<-90
dB
dB
ISO
A
7
= 17
, Figure 6
RMS
Channel-to-Channel
Crosstalk
C = 15pF, R = 50Ω, f = 100kHz,
L
L
7
CT
A
7
= 17
, Figure 6
RMS
NO
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: ∆R = R - R
.
ON(MIN)
ON
ON(MAX)
Note 4: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges; i.e., 7 = 37 to 07 and 07 to -37.
NO
Note 5: Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at
= +25°C.
T
A
Note 6: Guaranteed by design, not production tested.
8
_______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
__________________________________________Typical Operating Characteristics
(7+ = +57, 7- = -57, GND = 07, T = +25°C, unless otherwise noted.)
A
ON-RESISTANCE vs. V
COM
ON-RESISTANCE vs. V
(DUAL SUPPLIES)
ON-RESISTANCE vs. V
(SINGLE SUPPLY)
AND TEMPERATURE
(DUAL SUPPLIES)
COM
COM
300
275
110
110
V+ ꢀ 5V
V- ꢀ -5V
V- ꢀ 0V
100
90
100
90
250
225
V
ꢀ
3V
T
T
ꢀ +125°C
ꢀ +85°C
A
A
80
70
80
70
200
175
150
125
V+ ꢀ 3V
60
50
60
50
T
T
ꢀ +25°C
ꢀ -55°C
A
A
V
ꢀ
5V
4
100
75
V+ ꢀ 5V
40
30
40
30
50
-5 -4 -3 -2 -1
0
1
2
3
5
0
1
2
3
4
5
-5 -4 -3 -2 -1
0
1
2
3
4
5
V
(V)
V
(V)
COM
V
(V)
COM
COM
ON-RESISTANCE vs. V
AND TEMPERATURE
(SINGLE SUPPLY)
COM
ON-LEAKAGE vs.
TEMPERATURE
OFF-LEAKAGE vs.
TEMPERATURE
1000
100
180
160
10,000
1000
100
V+ ꢀ 5.5V
V- ꢀ -5.5V
V+ ꢀ 5.5V
V- ꢀ -5.5V
V+ ꢀ 5V
V- ꢀ 0V
T
ꢀ +125°C
A
140
120
100
80
T
ꢀ +85°C
A
T
ꢀ +25°C
A
10
1
10
1
T
ꢀ -55°C
A
60
40
0.1
0.1
-50 -25
0
25 50
75 100 125
0
1
2
3
4
5
-50 -25
0
25 50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
V
(V)
COM
SUPPLY CURRENT vs.
TEMPERATURE
CHARGE INJECTION vs. V
COM
5
0
10
V+ ꢀ 5V
V- ꢀ -5V
ꢀ V ꢀ 0V, 5V
V
EN
A
I+
I-
V+ ꢀ 5V
V- ꢀ 0V
1
V+ ꢀ 5V
V- ꢀ -5V
-5
0.1
-5 -4 -3 -2 -1
0
1
2
3
4
5
-50 -25
0
25 50
75 100 125
V
(V)
TEMPERATURE (°C)
COM
_______________________________________________________________________________________
9
Low-Voltage, CMOS Analog
Multiplexers/Switches
____________________________Typical Operating Characteristics (continued)
(7+ = +57, 7- = -57, GND = 07, T = +25°C, unless otherwise noted.)
A
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
FREQUENCY RESPONSE
5
0
-10
-20
100
10
V
ꢀ
5V
0
600Ω IN AND OUT
-5
INSERTION LOSS
-10
-15
-20
-25
-30
-35
-40
-30
-40
-50
-60
-70
-80
-90
OFF-ISOLATION
1
0.1
0.01
ON PHASE
50Ω IN/OUT
0.01
0.1
1
10
100 300
10
100
1k
10k
FREQUENCY (MHz)
FREQUENCY (Hz)
_____________________________________________________________Pin Descriptions
PIN
NAME
FUNCTION
MAX4051/
MAX4051A
MAX4052/
MAX4052A
MAX4053/
MAX4053A
1, 2, 4, 5, 12,
13, 14, 15
—
—
NO0–NOꢀ
Analog Switch Inputs 0–ꢀ
Analog Switch Common
Analog Switch “B” Inputs 0–3
Analog Switch “B” Common
3
—
1, 2, 4, 5
—
—
15
1
2
3
COM
NO0B–NO3B
COMB
NOB
—
—
—
—
—
—
3
—
—
—
—
Analog Switch “B” Normally Open Input
Analog Switch “B” Normally Closed Input
Analog Switch “A” Normally Open Input
Analog Switch “A” Normally Closed Input
NCB
NOA
NCA
5
Digital Inhibit Input. Normally connect to GND. Can be driven
to logic high to set all switches off.
6
ꢀ
8
6
ꢀ
8
6
ꢀ
8
INH
7-
Negative Analog Supply 7oltage Input. Connect to GND for
single-supply operation.
Ground. Connect to digital ground. (Analog signals have no
ground reference; they are limited to 7+ and 7-.)
GND
9
—
9
10
11
10
9
—
4
12
13
14
16
ADDC
ADDB
ADDA
Digital Address “C” Input
Digital Address “B” Input
Digital Address “A” Input
Analog Switch “A” Inputs 0–3
10
11
—
—
—
—
—
16
11, 12, 14, 15
NO0A–NO3A
COMA
NCC
13
—
—
—
16
Analog Switch “A” Common
Analog Switch “C” Normally Closed Input
Analog Switch “C” Normally Open Input
Analog Switch “C” Common
NOC
COMC
7+
Positive Analog and Digital Supply 7oltage Input
Note: NO, NC, and COM pins are identical and interchangeable. Any may be considered an input or output; signals pass equally
well in both directions.
10 ______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
Table 1. Truth Table/Switch Programming
ADDRESS BITS
ON SWITCHES
INH
1
MAX4051/
MAX4051A
MAX4052/
MAX4052A
MAX4053/
MAX4053A
ADDC*
ADDB
ADDA
X
X
X
All switches open
All switches open
All switches open
COMA–NCA,
COMB–NCB,
COMC–NCC
COMB–NO0B,
COMA–NO0A
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
COM–NO0
COMA–NOA,
COMB–NCB,
COMC–NCC
COMB–NO1B,
COMA–NO1A
0
0
0
0
0
0
COM–NO1
COM–NO2
COM–NO3
COM–NO4
COM–NO5
COM–NO6
COM–NOꢀ
COMA–NCA,
COMB–NOB,
COMC–NCC
COMB–NO2B,
COMA–NO2A
COMA–NOA,
COMB–NOB,
COMC–NCC
COMB–NO3B,
COMA–NO3A
COMA–NCA,
COMB–NCB,
COMC–NOC
COMB–NO0B,
COMA–NO0A
COMA–NOA,
COMB–NCB,
COMC–NOC
COMB–NO1B,
COMA–NO1A
COMA–NCA,
COMB–NOB,
COMC–NOC
COMB–NO2B,
COMA–NO2A
COMA–NOA,
COMB–NOB,
COMC–NOC
COMB–NO3B,
COMA–NO3A
0
X = Don’t care
* ADDC not present on MAX4052.
Note: NO and COM pins are identical and interchangeable. Either may be considered an input or output; signals pass equally well
in either direction.
7irtually all the analog leakage current comes from the
__________Applications Information
ESD diodes. Although the ESD diodes on a given signal
Power-Supply Considerations
pin are identical, and therefore fairly well balanced,
they are reverse biased differently. Each is biased by
either 7+ or 7- and the analog signal. This means their
leakages will vary as the signal varies. The difference in
the two diode leakages to the 7+ and 7- pins consti-
tutes the analog signal path leakage current. All analog
leakage current flows between each pin and one of the
supply terminals, not to the other switch terminal. This is
why both sides of a given switch can show leakage cur-
rents of either the same or opposite polarity.
Overview
The MAX4051/MAX4052/MAX4053 and MAX4051A/
MAX4052A/MAX4053A construction is typical of most
CMOS analog switches. They have three supply pins:
7+, 7-, and GND. 7+ and 7- are used to drive the inter-
nal CMOS switches and set the limits of the analog volt-
age on any switch. Reverse ESD-protection diodes are
internally connected between each analog signal pin
and both 7+ and 7-. If any analog signal exceeds 7+ or
7-, one of these diodes will conduct. During normal
operation, these (and other) reverse-biased ESD diodes
leak, forming the only current drawn from 7+ or 7-.
There is no connection between the analog signal
paths and GND.
______________________________________________________________________________________ 11
Low-Voltage, CMOS Analog
Multiplexers/Switches
7+ and GND power the internal logic and logic-level
translators, and set both the input and output logic lim-
its. The logic-level translators convert the logic levels
into switched 7+ and 7- signals to drive the gates of
V+
EXTERNAL BLOCKING DIODE
D1
the analog signals. This drive signal is the only connec-
tion between the logic supplies (and signals) and the
analog supplies. 7+ and 7- have ESD-protection
diodes to GND.
MAX4051/A
MAX4052/A
MAX4053/A
V+
The logic-level thresholds are TTL/CMOS compatible
when 7+ is +57. As 7+ rises, the threshold increases
slightly, so when 7+ reaches +127, the threshold is
about 3.17; above the TTL-guaranteed high-level mini-
mum of 2.87, but still compatible with CMOS outputs.
*
*
*
*
COM
NO
V-
Bipolar Supplies
These devices operate with bipolar supplies between
3.07 and 87. The 7+ and 7- supplies need not be
symmetrical, but their sum cannot exceed the absolute
maximum rating of +1ꢀ7.
EXTERNAL BLOCKING DIODE
D2
V-
Single Supply
These devices operate from a single supply between
+37 and +167 when 7- is connected to GND. All of the
bipolar precautions must be observed. At room temper-
ature, they actually “work” with a single supply at near
or below +1.ꢀ7, although as supply voltage decreases,
switch on-resistance and switching times become very
high.
* INTERNAL PROTECTION DIODES
Figure 1. Overvoltage Protection Using External Blocking
Diodes
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat up
to 50MHz (see Typical Operating Characteristics).
Above 20MHz, the on response has several minor
peaks which are highly layout dependent. The problem
is not turning the switch on, but turning it off. The off-
state switch acts like a capacitor, and passes higher
frequencies with less attenuation. At 10MHz, off isola-
tion is about -45dB in 50Ω systems, becoming worse
(approximately 20dB per decade) as frequency
increases. Higher circuit impedances also make off iso-
lation worse. Adjacent channel attenuation is about 3dB
above that of a bare IC socket, and is entirely due to
capacitive coupling.
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings, because stresses beyond the listed rat-
ings can cause permanent damage to the devices.
Always sequence 7+ on first, then 7-, followed by the
logic inputs (NO) and by COM. If power-supply
sequencing is not possible, add two small signal diodes
(D1, D2) in series with the supply pins for overvoltage
protection (Figure 1).
Adding diodes reduces the analog signal range to one
diode drop below 7+ and one diode drop above 7-, but
does not affect the devices’ low switch resistance and
low leakage characteristics. Device operation is
unchanged, and the difference between 7+ and 7-
should not exceed 1ꢀ7. These protection diodes are
not recommended when using a single supply if signal
levels must extend to ground.
12 ______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
______________________________________________Test Circuits/Timing Diagrams
V+
V+
V+
V
V
ADD
50%
ADD
NO0
ADDC
ADDB
ADDA
V+
V-
0V
NO1–NO6
V
NO0
90%
NO7
MAX4051/A
50Ω
V
OUT
INH
COM
0V
V
GND
90%
V-
V-
OUT
35pF
35pF
35pF
V
NO7
300Ω
t
t
TRANS
TRANS
TRANS
TRANS
V+
V+
V+
0V
V
ADD
50%
V
ADD
NO0
NO1–NO2
ADDA
ADDB
V+
V-
V
NO0
90%
MAX4052/A
NO3
50Ω
INH
COM
0V
V
OUT
GND
V
OUT
V-
V-
90%
V
NO3
300Ω
t
t
TRANS
V+
V+
V+
0V
V
ADD
V
ADD
50%
NO
ADD
INH
V-
V
NC
MAX4053/A
90%
NC
V+
50Ω
COM
0V
V
OUT
GND
90%
V-
V
OUT
300Ω
V
NO
V-
t
t
TRANS
V- ꢀ 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
Figure 2. Address Transition Time
______________________________________________________________________________________ 13
Low-Voltage, CMOS Analog
Multiplexers/Switches
V+
V+
V+
0V
V
INH
50%
NO0
ADDC
ADDB
ADDA
V+
NO1–NO7
V
NO0
90%
MAX4051/A
V
INH
V
INH
V
INH
V
OUT
V
OUT
INH
COM
90%
GND
V-
V-
35pF
0V
300Ω
50Ω
t
t
OFF
ON
V+
V+
V+
0V
50%
V
INH
NO0
NO1–NO3
ADDA
ADDB
V+
V
NO0
90%
MAX4052/A
INH
COM
V
OUT
V
OUT
GND
90%
V-
V-
35pF
0V
300Ω
50Ω
t
t
OFF
ON
V+
V+
V+
0V
V
50%
INH
NO
ADD
INH
V+
V-
V
NO_
MAX4053/A
NC
90%
COM
V
OUT
GND
V-
V-
V
OUT
90%
35pF
300Ω
0V
50Ω
t
t
OFF
ON
V- ꢀ 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
Figure 3. Enable Switching Time
14 ______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
V+
V+
V+
V+
V
V
ADD
ADD
NO0–N07
NO0–NO3
ADDC
ADDB
ADDA
ADDA
ADDB
V+
V+
MAX4052/A
MAX4051/A
50Ω
50Ω
V
INH
INH
COM
COM
OUT
V
OUT
GND
GND
V-
V-
V-
V-
35pF
35pF
300Ω
300Ω
V+
V+
t < 20ns
t < 20ns
F
R
V
V+
0V
ADD
V
50%
ADD
NO, NC
ADD
INH
V+
V
NO_
MAX4053/A
80%
50Ω
COM
V
OUT
GND
V-
V-
35pF
V
OUT
300Ω
0V
V- ꢀ 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
t
OPEN
Figure 4. Break-Before-Make Interval
V+
V+
0V
V
INH
V+
NO
ADDC
V
ꢀ 0V
CHANNEL
SELECT
NO
ADDB
MAX4051/A
MAX4052/A
MAX4053/A
ADDA
INH
∆ V
V
OUT
OUT
V
INH
V
COM
OUT
GND
V-
V-
C ꢀ 1000pF
L
50Ω
∆ V
IS THE MEASURED VOLTAGE DUE TO CHARGE
OUT
TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF.
V- ꢀ 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
Q ꢀ ∆ V
X C
L
OUT
Figure 5. Charge Injection
______________________________________________________________________________________ 15
Low-Voltage, CMOS Analog
Multiplexers/Switches
V+
10nF
NETWORK
ANALYZER
50Ω 50Ω
V
V
IN
OUT
V+
OFF-ISOLATION ꢀ 20log
V
NO
ADDC
ADDB
ADDA
IN
CHANNEL
SELECT
MAX4051/A
MAX4052/A
MAX4053/A
V
OUT
ON-LOSS ꢀ 20log
V
IN
V
OUT
MEAS.
REF.
INH
COM
V
OUT
CROSSTALK ꢀ 20log
GND
V-
V-
V
IN
50Ω
50Ω
10nF
MEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM AND "OFF" NO TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM AND "ON" NO TERMINAL ON EACH SWITCH.
CROSSTALK (MAX4052 AND MAX4053) IS MEASURED FROM ONE CHANNEL (A, B, C) TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 6. Off-Isolation, On-Loss, and Crosstalk
V+
V+
NO
NO
ADDC
CHANNEL
SELECT
ADDB
ADDA
MAX4051/A
MAX4052/A
MAX4053/A
1MHz
INH
COM
CAPACITANCE
ANALYZER
GND
V-
V-
Figure 7. NO/COM Capacitance
16 ______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
___________________________________________Ordering Information (continued)
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +ꢀ0°C
PIN-PACKAGE
16 Plastic DIP
16 Narrow SO
16 QSOP
PART
TEMP RANGE
0°C to +ꢀ0°C
0°C to +ꢀ0°C
0°C to +ꢀ0°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +ꢀ0°C
0°C to +ꢀ0°C
0°C to +ꢀ0°C
0°C to +ꢀ0°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
PIN-PACKAGE
16 Plastic DIP
16 Narrow SO
16 QSOP
MAX4051AEPE
MAX4051AESE
MAX4051AEEE
MAX4051AMJE
MAX4051CPE
MAX4051CSE
MAX4051CEE
MAX4051C/D
MAX4051EPE
MAX4051ESE
MAX4051EEE
MAX4051MJE
MAX4052ACPE
MAX4052ACSE
MAX4052ACEE
MAX4052AEPE
MAX4052AESE
MAX4052AEEE
MAX4052AMJE
MAX4052CPE
MAX4052CSE
MAX4052CEE
MAX4052C/D
MAX4052EPE
MAX4052ESE
MAX4052EEE
MAX4052MJE
MAX4053ACPE
MAX4053ACSE
MAX4053ACEE
MAX4053AEPE
MAX4053AESE
MAX4053AEEE
MAX4053AMJE
MAX4053CPE
MAX4053CSE
MAX4053CEE
MAX4053C/D
MAX4053EPE
MAX4053ESE
MAX4053EEE
MAX4053MJE
16 CERDIP**
16 Plastic DIP
16 Narrow SO
16 QSOP
16 Plastic DIP
16 Narrow SO
16 QSOP
0°C to +ꢀ0°C
16 CERDIP**
16 Plastic DIP
16 Narrow SO
16 QSOP
0°C to +ꢀ0°C
0°C to +ꢀ0°C
Dice*
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +ꢀ0°C
16 Plastic DIP
16 Narrow SO
16 QSOP
Dice*
16 Plastic DIP
16 Narrow SO
16 QSOP
16 CERDIP**
16 Plastic DIP
16 Narrow SO
16 QSOP
0°C to +ꢀ0°C
16 CERDIP**
0°C to +ꢀ0°C
* Contact factory for dice specifications.
** Contact factory for availability.
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
0°C to +ꢀ0°C
16 Plastic DIP
16 Narrow SO
16 QSOP
16 CERDIP**
16 Plastic DIP
16 Narrow SO
16 QSOP
Chip Information
0°C to +ꢀ0°C
TRANSISTOR COUNT: 161
SUBSTRATE CONNECTED TO 7+.
0°C to +ꢀ0°C
0°C to +ꢀ0°C
Dice*
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
16 Plastic DIP
16 Narrow SO
16 QSOP
16 CERDIP**
______________________________________________________________________________________ 17
Low-Voltage, CMOS Analog
Multiplexers/Switches
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
18 ______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
INCHES
MILLIMETERS
DIM
A
MIN
MAX
0.069
0.010
0.019
0.010
MIN
1.35
0.10
0.35
0.19
MAX
1.75
0.25
0.49
0.25
0.053
0.004
0.014
0.007
N
A1
B
C
e
0.050 BSC
1.27 BSC
E
0.150
0.228
0.016
0.157
0.244
0.050
3.80
5.80
0.40
4.00
6.20
1.27
E
H
H
L
VARIATIONS:
INCHES
1
MILLIMETERS
DIM
D
MIN
MAX
0.197
0.344
0.394
MIN
4.80
8.55
9.80
MAX
5.00
N
8
MS012
AA
TOP VIEW
0.189
0.337
0.386
D
8.75 14
10.00 16
AB
D
AC
D
C
A
B
0∞-8∞
e
A1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, .150" SOIC
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0041
B
1
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
1
21-0055
E
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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ENGL ISH • ? ? ? ? • ? ? ? • ? ? ?
WH AT 'S NEW
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M EMB ERS
M A X 4 0 5 1 A
Pa rt Nu m ber T abl e
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s
:
1 . S e e t h e M A X 4 0 5 1 A Q u i c k V i e w D a t a S h e e t f o r f u r t h e r i n f o r m a t i o n o n t h i s p r o d u c t f a m i l y o r d o w n l o a d t h e
M A X 4 0 5 1 A f u l l d a t a s h e e t ( P D F , 3 7 6 k B ) .
2 . O t h e r o p t i o n s a n d l i n k s f o r p u r c h a s i n g p a r t s a r e l i s t e d a t : h t t p : / / w w w . m a x i m - i c . c o m / s a l e s .
3 . D i d n ' t F i n d W h a t Y o u N e e d ? A s k o u r a p p l i c a t i o n s e n g i n e e r s . E x p e r t a s s i s t a n c e i n f i n d i n g p a r t s , u s u a l l y w i t h i n
o n e b u s i n e s s d a y .
4 . P a r t n u m b e r s u f f i x e s : T o r T & R = t a p e a n d r e e l ; + = R o H S / l e a d - f r e e ; # = R o H S / l e a d - e x e m p t . M o r e : S e e f u l l
d a t a s h e e t o r P a r t N a m i n g C o n v e n t i o n s .
5 . * S o m e p a c k a g e s h a v e v a r i a t i o n s , l i s t e d o n t h e d r a w i n g . " P k g C o d e / V a r i a t i o n " t e l l s w h i c h v a r i a t i o n t h e p r o d u c t
u s e s .
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S a m p l e
B u y
D i r e c t
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R o H S / L e a d - F r e e ?
M a t e r i a l s A n a l y s i s
P a c k a g e : T Y P E P I N S S I Z E
D R A W I N G C O D E / V A R *
M
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C e r a m i c D I P ; 1 6 p i n ; . 3 0 0 "
D w g : 2 1 - 0 0 4 5 A ( P D F )
- 5 5 C t o + 1 2 5 C R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
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M A X 4 0 5 1 A C / D
M A X 4 0 5 1 A C P E +
M A X 4 0 5 1 A C P E
M A X 4 0 5 1 A E P E
M A X 4 0 5 1 A C E E +
M A X 4 0 5 1 A C E E + T
R o H S / L e a d - F r e e : N o
P D I P ; 1 6 p i n ; . 3 0 0 "
D w g : 2 1 - 0 0 4 3 D ( P D F )
U s e p k g c o d e / v a r i a t i o n : P 1 6 + 1 *
0 C t o + 7 0 C
0 C t o + 7 0 C
R o H S / L e a d - F r e e : Y e s
M a t e r i a l s A n a l y s i s
P D I P ; 1 6 p i n ; . 3 0 0 "
D w g : 2 1 - 0 0 4 3 D ( P D F )
U s e p k g c o d e / v a r i a t i o n : P 1 6 - 1 *
R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
P D I P ; 1 6 p i n ; . 3 0 0 "
D w g : 2 1 - 0 0 4 3 D ( P D F )
U s e p k g c o d e / v a r i a t i o n : P 1 6 - 1 *
- 4 0 C t o + 8 5 C R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
Q S O P ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 5 5 F ( P D F )
U s e p k g c o d e / v a r i a t i o n : E 1 6 + 1 *
0 C t o + 7 0 C
0 C t o + 7 0 C
R o H S / L e a d - F r e e : Y e s
M a t e r i a l s A n a l y s i s
Q S O P ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 5 5 F ( P D F )
R o H S / L e a d - F r e e : Y e s
M a t e r i a l s A n a l y s i s
U s e p k g c o d e / v a r i a t i o n : E 1 6 + 1 *
M A X 4 0 5 1 A C E E
M A X 4 0 5 1 A C E E - T
M A X 4 0 5 1 A E E E +
M A X 4 0 5 1 A E E E - T
M A X 4 0 5 1 A E E E
Q S O P ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 5 5 F ( P D F )
U s e p k g c o d e / v a r i a t i o n : E 1 6 - 1 *
0 C t o + 7 0 C
0 C t o + 7 0 C
R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
Q S O P ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 5 5 F ( P D F )
U s e p k g c o d e / v a r i a t i o n : E 1 6 - 1 *
R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
Q S O P ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 5 5 F ( P D F )
U s e p k g c o d e / v a r i a t i o n : E 1 6 + 1 *
- 4 0 C t o + 8 5 C R o H S / L e a d - F r e e : Y e s
M a t e r i a l s A n a l y s i s
Q S O P ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 5 5 F ( P D F )
U s e p k g c o d e / v a r i a t i o n : E 1 6 - 1 *
- 4 0 C t o + 8 5 C R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
Q S O P ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 5 5 F ( P D F )
- 4 0 C t o + 8 5 C R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
U s e p k g c o d e / v a r i a t i o n : E 1 6 - 1 *
M A X 4 0 5 1 A E E E + T
M A X 4 0 5 1 A C S E + T
M A X 4 0 5 1 A C S E +
M A X 4 0 5 1 A C S E
M A X 4 0 5 1 A C S E - T
M A X 4 0 5 1 A E S E
Q S O P ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 5 5 F ( P D F )
U s e p k g c o d e / v a r i a t i o n : E 1 6 + 1 *
- 4 0 C t o + 8 5 C R o H S / L e a d - F r e e : Y e s
M a t e r i a l s A n a l y s i s
S O I C ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 4 1 B ( P D F )
U s e p k g c o d e / v a r i a t i o n : S 1 6 + 2 *
0 C t o + 7 0 C
0 C t o + 7 0 C
0 C t o + 7 0 C
0 C t o + 7 0 C
R o H S / L e a d - F r e e : Y e s
M a t e r i a l s A n a l y s i s
S O I C ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 4 1 B ( P D F )
U s e p k g c o d e / v a r i a t i o n : S 1 6 + 2 *
R o H S / L e a d - F r e e : Y e s
M a t e r i a l s A n a l y s i s
S O I C ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 4 1 B ( P D F )
U s e p k g c o d e / v a r i a t i o n : S 1 6 - 2 *
R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
S O I C ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 4 1 B ( P D F )
U s e p k g c o d e / v a r i a t i o n : S 1 6 - 2 *
R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
S O I C ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 4 1 B ( P D F )
U s e p k g c o d e / v a r i a t i o n : S 1 6 - 2 *
- 4 0 C t o + 8 5 C R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
M A X 4 0 5 1 A E S E +
M A X 4 0 5 1 A E S E + T
M A X 4 0 5 1 A E S E - T
S O I C ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 4 1 B ( P D F )
U s e p k g c o d e / v a r i a t i o n : S 1 6 + 2 *
- 4 0 C t o + 8 5 C R o H S / L e a d - F r e e : Y e s
M a t e r i a l s A n a l y s i s
S O I C ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 4 1 B ( P D F )
U s e p k g c o d e / v a r i a t i o n : S 1 6 + 2 *
- 4 0 C t o + 8 5 C R o H S / L e a d - F r e e : Y e s
M a t e r i a l s A n a l y s i s
S O I C ; 1 6 p i n ; . 1 5 0 "
D w g : 2 1 - 0 0 4 1 B ( P D F )
U s e p k g c o d e / v a r i a t i o n : S 1 6 - 2 *
- 4 0 C t o + 8 5 C R o H S / L e a d - F r e e : N o
M a t e r i a l s A n a l y s i s
D i d n ' t F i n d W h a t Y o u N e e d ?
C O N T A C T U S : S E N D U S A N E M A I L
C o p y r i g h t 2 0 0 7 b y M a x i m I n t e g r a t e d P r o d u c t s , D a l l a s S e m i c o n d u c t o r • L e g a l N o t i c e s • P r i v a c y P o l i c y
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