IRFR110ATF [ROCHESTER]

4.7A, 100V, 0.4ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252, DPAK-3;
IRFR110ATF
型号: IRFR110ATF
厂家: Rochester Electronics    Rochester Electronics
描述:

4.7A, 100V, 0.4ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252, DPAK-3

开关 脉冲 晶体管
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中文:  中文翻译
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IRFR/U110A  
Advanced Power MOSFET  
FEATURES  
BVDSS = 100 V  
Avalanche Rugged Technology  
Rugged Gate Oxide Technology  
Lower Input Capacitance  
W
RDS(on) = 0.4  
ID = 4.7 A  
Improved Gate Charge  
Extended Safe Operating Area  
D-PAK  
I-PAK  
m
Lower Leakage Current : 10 A (Max.) @ VDS = 100V  
W
Lower RDS(ON) : 0.289  
(Typ.)  
2
1
1
2
3
3
1. Gate 2. Drain 3. Source  
Absolute Maximum Ratings  
Symbol  
Characteristic  
Drain-to-Source Voltage  
Value  
100  
4.7  
3
Units  
VDSS  
V
O
Continuous Drain Current (TC=25 C)  
ID  
A
O
Continuous Drain Current (TC=100 C)  
1
IDM  
VGS  
EAS  
IAR  
Drain Current-Pulsed  
19  
A
V
O
+
_
Gate-to-Source Voltage  
Single Pulsed Avalanche Energy  
Avalanche Current  
20  
2
59  
4.7  
2
mJ  
A
O
1
O
EAR  
dv/dt  
1
Repetitive Avalanche Energy  
mJ  
V/ns  
W
O
3
Peak Diode Recovery dv/dt  
6.5  
2.5  
20  
O
O
*
Total Power Dissipation (TA=25  
Total Power Dissipation (TC=25  
Linear Derating Factor  
)
)
C
O
PD  
C
W
O
0.16  
W/ C  
Operating Junction and  
TJ , TSTG  
- 55 to +150  
300  
Storage Temperature Range  
O
C
Maximum Lead Temp. for Soldering  
Purposes, 1/8” from case for 5-seconds  
TL  
Thermal Resistance  
Symbol  
Characteristic  
Typ.  
Max.  
Units  
Rq  
Junction-to-Case  
--  
--  
--  
6.26  
50  
JC  
O
Rq  
*
Junction-to-Ambient  
Junction-to-Ambient  
C/W  
JA  
Rq  
110  
JA  
*
When mounted on the minimum pad size recommended (PCB Mount).  
Rev. B  
©1999 Fairchild Semiconductor Corporation  
N-CHANNEL  
POWER MOSFET  
IRFR/U110A  
O
Electrical Characteristics (TC=25 C unless otherwise specified)  
Symbol  
BVDSS  
Characteristic  
Min. Typ. Max. Units  
Test Condition  
m
VGS=0V,ID=250 A  
Drain-Source Breakdown Voltage  
Breakdown Voltage Temp. Coeff.  
Gate Threshold Voltage  
V
V/  
V
100 --  
--  
O
m
D BV/DTJ  
VGS(th)  
ID=250 A  
See Fig 7  
C
-- 0.12 --  
m
A
V
DS=5V,ID=250  
2.0  
--  
--  
--  
4.0  
VGS=20V  
Gate-Source Leakage , Forward  
Gate-Source Leakage , Reverse  
100  
IGSS  
nA  
V
GS=-20V  
VDS=100V  
DS=80V,TC=125  
--  
-- -100  
--  
--  
--  
10  
IDSS  
Drain-to-Source Leakage Current  
m
A
O
C
V
--  
100  
Static Drain-Source  
On-State Resistance  
Forward Transconductance  
Input Capacitance  
4
RDS(on)  
W
VGS=10V,ID=2.35A  
VDS=40V,ID=2.35A  
--  
--  
O
0.4  
gfs  
Ciss  
Coss  
Crss  
td(on)  
tr  
4
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
--  
3.23 --  
190 240  
W
O
VGS=0V,VDS=25V,f =1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Turn-On Delay Time  
Rise Time  
65  
25  
30  
40  
70  
50  
12  
--  
55  
21  
10  
14  
28  
18  
8.5  
1.6  
4.1  
pF  
See Fig 5  
VDD=50V,ID=5.6A,  
W
RG=24  
ns  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
4
5
O
See Fig 13  
O
Qg  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain(“ Miller” ) Charge  
V
DS=80V,VGS=10V,  
Qgs  
Qgd  
nC  
ID=5.6A  
4
5
O
O
--  
See Fig 6 & Fig 12  
Source-Drain Diode Ratings and Characteristics  
Symbol  
Characteristic  
Continuous Source Current  
Pulsed-Source Current  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
Min. Typ. Max. Units  
Test Condition  
IS  
ISM  
VSD  
trr  
--  
--  
--  
--  
--  
--  
4.7  
19  
1.5  
--  
Integral reverse pn-diode  
A
1
in the MOSFET  
O
O
4
O
V
C
--  
TJ=25 ,IS=4.7A,VGS=0V  
O
ns  
C
TJ=25 ,IF=5.6A  
85  
m
C
4
Qrr  
m
diF/dt=100A/ s  
-- 0.23 --  
O
Notes ;  
Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature  
1
O
L=4mH, IAS=4.7A, VDD=25V, RG=27W , Starting TJ =25oC  
2
O
ISD _ 5.6A, di/dt 250A/ s, V DD _ BVDSS , Starting TJ =25o  
3
_
<
m
C
<
<
O
_
<
4
Pulse Test : Pulse Width = 250 ms, Duty Cycle 2%  
O
Essentially Independent of Operating Temperature  
5
O
N-CHANNEL  
POWER MOSFET  
IRFR/U110A  
Fig 1. Output Characteristics  
Fig 2. Transfer Characteristics  
VGS  
Top :  
1 5 V  
1 0 V  
8.0 V  
7.0 V  
6.0 V  
5.5 V  
5.0 V  
1
1
10  
10  
150oC  
Bottom : 4.5 V  
0
0
10  
10  
25 oC  
@ Notes :  
1. V = 0 V  
GS  
@ Notes :  
2. V = 40 V  
DS  
µ
- 55oC  
1. 250 s Pulse Test  
3. 250 s Pulse Test  
µ
2. T = 25oC  
C
-1  
-1  
10  
10  
-1  
0
1
2
4
6
8
10  
10  
10  
10  
VGS , Gate-Source Voltage [V]  
VDS , Drain-Source Voltage [V]  
Fig 3. On-Resistance vs. Drain Current  
Fig 4. Source-Drain Diode Forward Voltage  
0.8  
0.6  
0.4  
0.2  
0.0  
1
10  
V
= 10 V  
GS  
0
10  
V
= 20 V  
GS  
@ Notes :  
1. V = 0 V  
o
150  
C
GS  
o
o
25  
C
2. 250 s Pulse Test  
µ
@ Note : T = 25  
C
J
-1  
10  
0
5
10  
15  
20  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.6  
1.8  
2.0  
I , Drain Current [A]  
VSD , Source-Drain Voltage [V]  
D
Fig 5. Capacitance vs. Drain-Source Voltage  
Fig 6. Gate Charge vs. Gate-Source Voltage  
350  
280  
210  
140  
70  
C
iss= Cgs+ Cgd ( Cds= shorted )  
V
DS = 20 V  
Coss= Cds+ C  
gd  
10  
Crss= C  
gd  
V
DS = 50 V  
C iss  
V
DS = 80 V  
C oss  
5
@ Notes :  
1. VGS = 0 V  
C rss  
2. f = 1 MHz  
@ Notes : ID = 5.6 A  
8 10  
0
0
0
1
0
2
4
6
10  
10  
Q , Total Gate Charge [nC]  
VDS , Drain-Source Voltage [V]  
G
N-CHANNEL  
POWER MOSFET  
IRFR/U110A  
Fig 7. Breakdown Voltage vs. Temperature  
Fig 8. On-Resistance vs. Temperature  
1.2  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
1.1  
1.0  
@ Notes :  
0.9  
@ Notes :  
1. V = 10 V  
1. V = 0 V  
GS  
GS  
2. I = 2.8 A  
D
2. I = 250 A  
µ
D
0.8  
-75  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
-75  
-50  
-25  
0
25  
50  
75  
100  
125  
150  
175  
T , Junction Temperature [ oC]  
T , Junction Temperature [ oC]  
J
J
Fig 9. Max. Safe Operating Area  
Fig 10. Max. Drain Current vs. Case Temperature  
5
2
10  
Operation in This Area  
is Limited by RDS(on)  
4
3
2
1
0
1
100 s  
10  
µ
1 ms  
10 ms  
DC  
0
10  
@ Notes :  
1. T = 25oC  
C
2. T = 150oC  
J
3. Single Pulse  
-1  
10  
0
1
2
25  
50  
75  
100  
125  
150  
10  
10  
10  
T , Case Temperature [ oC]  
V
DS , Drain-Source Voltage [V]  
c
Fig 11. Thermal Response  
D=0.5  
@ Notes :  
1. Zθ JC(t)=6.26 oC/W Max.  
0.2  
100  
2. Duty Factor, D=t/t2  
0.1  
1
3. TJM-TC=PDM*Zθ JC(t)  
0.05  
PDM  
0.02  
0.01  
t1  
t2  
single pulse  
10-1  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
101  
t1 , Square Wave Pulse Duration [sec]  
N-CHANNEL  
POWER MOSFET  
IRFR/U110A  
Fig 12. Gate Charge Test Circuit & Waveform  
“ Current Regulator ”  
VGS  
Same Type  
as DUT  
50KW  
Qg  
12V  
200nF  
10V  
300nF  
VDS  
Qgs  
Qgd  
VGS  
DUT  
R2  
3mA  
R1  
Charge  
Current Sampling (IG) Current Sampling (ID)  
Resistor Resistor  
Fig 13. Resistive Switching Test Circuit & Waveforms  
RL  
Vout  
Vin  
Vout  
90%  
VDD  
( 0.5 rated VDS  
)
RG  
DUT  
10%  
Vin  
10V  
td(on)  
tr  
td(off)  
tf  
t on  
t off  
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms  
BVDSS  
1
2
2
LL  
ID  
----  
--------------------  
EAS  
=
LL IAS  
BVDSS -- VDD  
VDS  
BVDSS  
IAS  
Vary tp to obtain  
required peak ID  
RG  
ID (t)  
VDD  
C
DUT  
VDS (t)  
VDD  
10V  
t p  
t p  
Time  
N-CHANNEL  
POWER MOSFET  
IRFR/U110A  
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms  
+
DUT  
VDS  
--  
IS  
L
Driver  
VGS  
Same Type  
as DUT  
RG  
VDD  
VGS  
• dv/dt controlled by “RG”  
• IS controlled by Duty Factor “D”  
Gate Pulse Width  
--------------------------  
VGS  
D =  
Gate Pulse Period  
10V  
( Driver )  
IFM , Body Diode Forward Current  
I S  
di/dt  
( DUT )  
IRM  
Body Diode Reverse Current  
Body Diode Recovery dv/dt  
Vf  
VDS  
( DUT )  
VDD  
Body Diode  
Forward Voltage Drop  
TRADEMARKS  
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is  
not intended to be an exhaustive list of all such trademarks.  
ACEx™  
CoolFET™  
ISOPLANAR™  
MICROWIRE™  
POP™  
PowerTrench™  
QS™  
UHC™  
VCX™  
CROSSVOLT™  
E2CMOSTM  
FACT™  
FACT Quiet Series™  
Quiet Series™  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
TinyLogic™  
FAST®  
FASTr™  
GTO™  
HiSeC™  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER  
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD  
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT  
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT  
RIGHTS, NOR THE RIGHTS OF OTHERS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant into  
the body, or (b) support or sustain life, or (c) whose  
failure to perform when properly used in accordance  
with instructions for use provided in the labeling, can be  
reasonably expected to result in significant injury to the  
user.  
2. A critical component is any component of a life  
support device or system whose failure to perform can  
be reasonably expected to cause the failure of the life  
support device or system, or to affect its safety or  
effectiveness.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Advance Information  
Formative or  
In Design  
This datasheet contains the design specifications for  
product development. Specifications may change in  
any manner without notice.  
Preliminary  
First Production  
This datasheet contains preliminary data, and  
supplementary data will be published at a later date.  
Fairchild Semiconductor reserves the right to make  
changes at any time without notice in order to improve  
design.  
No Identification Needed  
Obsolete  
Full Production  
This datasheet contains final specifications. Fairchild  
Semiconductor reserves the right to make changes at  
any time without notice in order to improve design.  
Not In Production  
This datasheet contains specifications on a product  
that has been discontinued by Fairchild semiconductor.  
The datasheet is printed for reference information only.  
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Improved Gate Charge  
Extended Safe Operating Area  
Lower Leakage Current : 10µA (MAX.)  
Dotted line  
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DS  
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: 0.289(Typ.)  
DS(ON)  
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[E-  
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Improved Gate Charge  
Extended Safe Operating Area  
Lower Leakage Current : 10µA (MAX.)  
Dotted line  
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@ V = 100V  
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: 0.289(Typ.)  
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