FAN7314MX [ROCHESTER]
LIQUID CRYSTAL DISPLAY DRIVER, PDSO20, LEAD FREE, SOIC-20;型号: | FAN7314MX |
厂家: | Rochester Electronics |
描述: | LIQUID CRYSTAL DISPLAY DRIVER, PDSO20, LEAD FREE, SOIC-20 驱动 光电二极管 接口集成电路 |
文件: | 总15页 (文件大小:1052K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
October 2007
FAN7314
LCD Backlight Inverter Drive IC
Features
Description
High-Efficiency Single-Stage Power Conversion
Wide Input Voltage Range: 5V to 25.5V
Back Light Lamp Ballast and Soft Dimming
Reduces Number of Required External Components
Precision Voltage Reference Trimmed to 2%
ZVS Half-Bridge Topology
The FAN7314 provides all the control functions for a
series parallel resonant converter as well as a pulse
width modulation (PWM) controller to develop a supply
voltage. Typical operating frequency range is between
30kHz and 250kHz, depending on the CCFL and the
transformer's characteristics.
Soft Start
PWM Control at Fixed Frequency
Analog and Burst Dimming Function
Programmable Striking Frequency
Open-Lamp Protection
20-SOIC
Open-Lamp Regulation
20-Pin SOIC
Ordering Information
Part Number
FAN7314M
Package
20-SOIC
20-SOIC
Operating Temperature Range
-25°C ~ 85°C
Packing Method
Rail
FAN7314MX
Tape & Reel
All packages are lead free per JEDEC J-SDD-020B standard.
Protected by U.S. Patent: 5,652,479.
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
Internal Block Diagram
RT
OUTA
OSCILLATOR
Output
Driver
max. 2V
OUTB
PGND
OUTC
min. 0.5V
Output
Control
Logic
CT
-
+
+
6μA
2.65V
MRT1
S_S
Output
Driver
OUTD
RT1
OLP
Striking
Logic
S_S
1.4μA
EA_OUT
ADIM
UVLO
OLP
OLR
+
-
SET
CLR
VOLP+α
VOLP
Q
S
R
+
-
Error Amp.
Q
UVLO
2.5V 1.5V
EA_IN
2.4V
+
-
Solr
Solr 105μA
Sburst 85μA
2V
2.5VREF
Voltage
Reference
&
Internal
Bias
REF
ENA
VIN
max. 2V
Va+α
min. 0.5V
+
-
BCT
BDIM
AGND
-
Sburst
1.4V
+
VIN
+
-
UVLO
UVLO 5V
FAN7314 Rev.03
Figure 1. Functional Block Diagram
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
2
Pin Configuration
RT1
20
OUTB OUTA
VIN
17
PGND OUTC OUTD CT
16 15 14 13
RT
12
BCT
11
19
18
FAN7314
1
2
3
4
5
6
7
8
9
10
OLP
OLR
ENA
S_S
REF
ADIM BDIM EA_IN EA_OUT
GND
FAN7314 Rev. 03
Figure 2. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
OLP
Description
Pin #
11
Name
BCT
Description
Burst Dimming Timing Capacitor
Timing Resistor
1
2
Open-Lamp Protection
Open-Lamp Regulation
Enable Input
OLR
12
RT
3
ENA
13
CT
Timing Capacitor
4
S_S
Soft-Start
14
OUTD
OUTC
PGND
VIN
NMOSFET Drive Output D
PMOSFET Drive Output C
Power Ground
5
GND
Analog Ground
15
6
REF
2.5V Reference Voltage
Analog Dimming Input
Burst Dimming Input
Error Amplifier Input
Error Amplifier Output
16
7
ADIM
BDIM
EA_IN
EA_OUT
17
Supply Voltage
8
18
OUTA
OUTB
RT1
PMOSFET Drive Output A
NMOSFET Drive Output B
Striking Frequency Resistor
9
19
10
20
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
3
Absolute Maximum Ratings
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are
not guaranteed at the absolute maximum ratings.
Symbol
VIN
Characteristics
Min.
5.0
Max.
25.5
+85
Unit
V
Supply Voltage
TA
Operating Temperature Range
Junction Temperature
-25
°C
TJ
+150
+ 150
90
°C
TSTG
θJA
Storage Temperature Range
Thermal Resistance Junction-to-Ambient(1)(2)
Power Dissipation
-65
°C
°C/W
W
PD
1.4
Notes:
1. Thermal resistance test board size: 76.2 • 114.3 • 1.6mm (1S0P). JEDEC standard: JESD51-2, JESD51-3.
2. Assume no ambient airflow.
Electrostatic Discharge Level
Parameter
Pins
Conditions
Level
2000
300
Unit
Human Body Model (HBM)
All pins
R=1.5KΩ, C=100pF
All pins except for BDIM
BDIM
V
Machine Model (MM)
C=200pF
250
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
4
Electrical Characteristics
For typical values, TA=25°C and VIN=12V. For min./max. values, TA is the operating ambient temperature range with
-25°C ≤ TA ≤ 85°C and 5V ≤ VIN ≤ 25.5V, unless otherwise specified. Specifications to -25°C ~ 85°C are guaranteed by
design based on final characterization results.
Symbol
Characteristics
Test Condition
Min.
Typ.
Max.
Unit
REFERENCE SECTION (Recommend X7R Capacitor)
ΔVref
Line Regulation
5 ≤ VIN ≤ 25.5V
2
25
mV
V
V25
2.5V Regulation Voltage
2.45
2.50
2.55
OSCILLATOR SECTION (MAIN)
TA=25°C, CT=270pF,
RT=18kΩ
110.4
108
115.0
119.6
122
fOSC
Oscillation Frequency
kHz
CT=270pF, RT=18kΩ
115
2.0
0.5
Vcth
Vctl
CT High Voltage
CT Low Voltage
V
V
OSCILLATOR SECTION (BURST)
TA=25°C, Ctb=10nF,
RT=18kΩ
209.25 225.00 240.75
foscb
Oscillation Frequency
Hz
Ctb=10nF, RT=18kΩ
206.25 225.00 241.75
Vbcth
Vbctl
BCT High Voltage
BCT Low Voltage
2
V
V
0.5
ERROR AMPLIFIER SECTION
AV
GBW
Veh
lsin
Open-Loop Gain(3)
Unit Gain Bandwidth(3)
80
dB
MHz
V
1.5
Feedback Output High Voltage
Output Sink Current
EA_IN=0V
2.0
2.4
2.8
-1
EA_OUT=1.5V
EA_OUT=1.5V
mA
mA
µA
µA
V
lsur
Output Source Current
1
Iolr
EA_IN Driving Current On OLR
EA_IN Driving Current On Burst Dimming
75
61
105
85
135
109
Iburst
Vfbh
SOFT-START SECTION
Feedback High Voltage On Burst Dimming R (EA_IN)=60kΩ
Va+0.1 Va+0.4 Va+0.7
ISS
Soft-Start Current
S_S=1V
4
6
8
µA
V
Vssh
Soft-Start Clamping Voltage
2.30
2.65
3.00
PROTECTION SECTION
Volp0
Volp1
Volr
Open-Lamp Protection Voltage 0
Start at open lamp
2.2
1.3
2.5
1.5
2.8
1.7
V
V
Open-Lamp Protection Voltage 1
Open-Lamp Regulation Voltage
Normal -> open lamp
1.75
0.7
2.00
1.4
2.25
2.1
V
Iolp
Open-Lamp Protection Charging Current
µA
UNDER-VOLTAGE LOCK OUT SECTION
Vth
Ist
Start Threshold Voltage
Start-up Current
5
V
VIN=Vth-0.2
VIN=12V
130
1.5
180
4.0
370
µA
mA
µA
Iop
Isb
Note:
Operating Supply Current
Stand-by Current
VIN=12V
200
3. These parameters, although guaranteed, are not 100% tested in production.
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7314 Rev. 1.0.4
5
Electrical Characteristics (Continued)
For typical values, TA=25°C and VIN=12V. For min./max. values, TA is the operating ambient temperature range with
-25°C ≤ TA ≤ 85°C and 5V ≤ VIN ≤ 25.5V, unless otherwise specified. Specifications to -25°C ~ 85°C are guaranteed by
design based on final characterization results.
Symbol
Characteristics
Test Condition
Min.
Typ.
Max.
Unit
ON/OFF SECTION
Von
Voff
On State Input Voltage
Off Stage Input Voltage
2
5
V
V
0.7
OUTPUT SECTION
Vpdhv
Vphlv
Vndhv
Vndhv
Vpuv
Vnuv
tr
PMOS Gate High Voltage
PMOS Gate Low Voltage
VIN=12V
VIN=12V
VIN=12V
VIN=12V
VIN
V
V
VIN-10.5 VIN-8.5 VIN-6.5
NMOS Gate Drive Vulgate
NMOS Gate Drive Vulgate
6.5
8.5
0
10.5
V
V
PMOS Gate Voltage with UVLO Activated VIN=Vth-0.2
NMOS Gate Voltage with UVLO Activated VIN=Vth-0.2
Rising Time(4)
Falling Time(4)
VIN-0.3
V
0.3
500
500
V
VIN=12V, Cload=2nF
VIN=12V, Cload=2nF
200
200
ns
ns
tf
MAXIMUM / MINIMUM OVERLAP
Min. Overlap between diagonal switches(4) fosc = 100kHz
Max. Overlap between diagonal switches(4) fosc = 100kHz
DELAY TIME
PDR_A/NDR_B(4)
PDR_C/NDR_D(4)
0
%
%
100
RT=18kΩ
RT=18kΩ
450
450
ns
ns
Note:
4. These parameters, although guaranteed, are not 100% tested in production.
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7314 Rev. 1.0.4
6
Function Description
UVLO: The under-voltage lockout circuit guarantees
stable operation of the IC’s control circuit by stopping
and starting it as a function of the VIN value. The UVLO
circuit turns on the control circuit when VIN exceeds 5V.
When VIN is lower than 5V, the IC’s standby current is
less than 200µA.
ENA: Applying voltage higher than 2V to the ENA pin
enables the operation of the IC. Applying voltage lower
than 0.7V to the ENA pin disables the operation of the
inverter.
Soft-start: The soft-start function requires that the S_S
pin is connected through a capacitor to GND. A soft-start
circuit ensures a gradual increase in the input and output
power. The capacitor connected to the S_S pin
determines the rate at which the duty ratio rises. It is
charged by a 6µA current source.
Figure 4. Main Oscillator Waveform
Burst Oscillator and Burst Dimming: The timing
capacitors (BCTs) are charged by the reference current
source, which is formed by the timing resistor (RT). The
timing resistor’s voltage is regulated at 1.25V. The
sawtooth waveform charges up to 2V. Once this voltage
is reached, the capacitors begin discharging down to
0.5V. Next the timing capacitors start charging again and
a new switching cycle begins. The burst dimming
frequency can be programmed by adjusting the RT and
BCT values. The burst dimming frequency can be
calculated as shown below.
3.75
(2)
fburst =
96 ⋅RT ⋅CT
To avoid visible flicker, the burst dimming frequency
should be greater than 120Hz.
Figure 3. Soft-Start During Initial Operation
By comparing the input of BDIM pin with the 0.5~2V
triangular wave of the burst oscillator the PWM pulses
for burst dimming. The PWM pulse controls EA_OUT’s
voltage by summing 85µA into the EA_IN pin.
Main Oscillator: The timing capacitors (CTs) are
charged by the reference current source, which is
formed by the timing resistor (RT). The timing resistor’s
voltage is regulated at 1.25V. The sawtooth waveform
charges up to 2V. Once this voltage is reached, the
capacitors begin discharging down to 0.5V. Next, the
timing capacitors start charging again and a new
switching cycle begins. The main frequency can be
programmed by adjusting the RT and CT values. The
main frequency can be calculated as shown below.
19
(1)
fop =
32 ⋅ RT ⋅CT
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
7
Figure 5. Burst Oscillator Waveform
Figure 7. OLR Voltage During Striking Mode
Output Drives: The four output drives are designed so
that switches A and B, C and D never turn on
simultaneously. The OUTA-OUTB pair is intended to
drive one half-bridge in the external power stage. The
OUTC-OUTD pair drives the other half-bridge.
Figure 6. Burst Dimming
Open-lamp Regulation and Open-lamp Protection:
It is necessary to suspend power stage operation if an
open lamp occurs, because the power stage has high
gain. When a voltage higher than 2V is applied to the
OLR pin, the part enters regulation mode and controls
the EA_OUT voltage. This limits the lamp voltage by
summing 105µA into the feedback node. At the same
time, the OLP capacitor, connected to the OLP pin, is
charged by the 1.4µA internal current source. Once it
reaches 2.5V, the IC shuts down and all the output is high.
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
8
Timing Diagram
The FAN7314 uses the half-bridge to drive CCFL.
EA_ OUT
CT
SYNC
T
POUT A
NOUT B
POUT C
NOUT D
FAN7314 Rev. 02
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
9
Typical Application Circuit
Application
Lamps
Input Voltage
19 inch LCD Monitor
4
13V
1. Schematic
F1
FUSE
C22
220μF
25V
C25
1μF
C27
1μF
CN5
C26 0.1μF
R6 82kΩ
IC1
FAN7314
0
0
0
0
1
2
3
4
5
6
7
8
M1
13V
OLP
RT1
OUTB
OUTA
VIN
0
RT
SN
GN
SP
DN
OUTB
OLR
DN
DP
DP
C7
10μF
OUTA
9
10
ON/OFF
LTM190EX
ENA
R25
10kΩ
R24
10kΩ
C1 0.22μF
C6 1μF
TX1
C28
10nF
1
2
0
0
0
S_S
0
0
HOT
12505WR-10
GP
C8
10μF
CN1
CCFL
0
FDS8958A
M2
GND
REF
PGND
OUTC
OUTD
CT
J1
0Ω
0
COLD
C2
1μF
REF
1
2
DIM(0~3.3V)
HOT
0
CN2
CCFL
SN
GN
SP
DN
DN
DP
DP
R2
56kΩ
ADIM
BDIM
EA_IN
EA_OUT
0
COLD
R7
0Ω
C10
15pF
C11
15pF
C5
R5
C4
220pF
27kΩ
4.7nF
0
0
0
R4
22kΩ
OLP1
OLP2
C21
R27
10kΩ
R3
18kΩ
RT
10nF
GP
BCT
FDS8958A
D4
BAV70
D6
D7
BAV99
0
0
OLR
C3
4.7nF
C14
10nF
C30
10nF
BAV99
R26
1kΩ
R13
1kΩ
R17
1kΩ
R16
1kΩ
RT
R8
R15
FB
0
0
0
0
0
0
0
0
100kΩ
10kΩ
R9
9.1kΩ
FB
TX2
1
HOT
OLR
0
CN3
CCFL
R14
REF
100kΩ
2
COLD
OLP1
OLP2
1
2
HOT
R1
330kΩ
R22
10kΩ
R23
10kΩ
0
OLP
CN4
CCFL
0
C12
15pF
C13
15pF
COLD
D11
BAW56
C9
1μF
Q1
KST2222
OLP3
OLP4
OLP3
OLP4
C19
C20
D1
BAW56
2.2nF
2.2nF
R20
R21
10kΩ
10kΩ
D3
BAV70
D8
D9
0
0
OLR
BAV99
BAV99
R12
1kΩ
C29
10nF
R11
1kΩ
C15
10nF
R18
1kΩ
R19
1kΩ
D10
BAW56
0
0
0
0
0
0
0
0
0
C18
C17
2.2nF
2.2nF
0
0
FB
FAN7314 Rev. 02
2. Transformer Schematic Diagram
Supported by Namyang electronics (http://www.namyangelec.co.kr)
FAN7314 Rev. 02
3. Core & Bobbin
Core: EFD2124
Material: PL7
Bobbin: EFE2124
© 2006 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7314 Rev. 1.0.4
10
4. Winding Specification
Pin No.
5 --> 2
Wire
Turns
12
Inductance
180µH
Leakage Inductance
Remarks
1KHz, 1V
1KHz, 1V
1 UEW 0.45 φ
1 UEW 0.04 φ
7.2µH
7 --> 9
2430 (270*9)
7.2H
330mH
5. BOM of the Application Circuit
Part Ref.
Value
Fuse
24V 3A
Description /Vendor
Part Ref.
Value
220pF
1µF
Description /Vendor
50V 1608 J
50V 2012 K
16V 3216
C5
C6
F1
Fuse
Resistor (SMD)
C7
10µF
10µF
1µF
R1
R2
330kΩ
56kΩ
18kΩ
22kΩ
27kΩ
82kΩ
100kΩ
9.1kΩ
1kΩ
1608 J
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 F
1608 J
1608 J
1608 J
1608 J
1608 J
1608 J
1608 F
1608 J
C8
16V 3216
C9
16V 1608 K
3KV 3216
R3
C10
C11
C12
C13
C14
C15
C17
C18
C19
C20
C21
C25
C26
C27
C28
C29
C30
15pF
15pF
15pF
15pF
10nF
10nF
2.2nF
2.2nF
2.2nF
2.2nF
10nF
1µF
R4
3KV 3216
R5
3KV 3216
R6
3KV 3216
R8
50V 1608 K
50V 1608 K
50V 1608 Z
50V 1608 Z
50V 1608 Z
50V 1608 Z
50V 1608 Z
50V 2012 K
16V 1608 K
50V 2012 K
50V 1608 Z
50V 1608 K
50V 1608 K
R9
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
R26
R27
1kΩ
1kΩ
100kΩ
10kΩ
1kΩ
1kΩ
0.1µF
1µF
1kΩ
1kΩ
10nF
10nF
10nF
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
10kΩ
1kΩ
Diode / TR (SMD)
D1
D3
BAW56
BAV70
BAV70
BAV99
BAV99
BAV99
BAV99
BAW56
BAW56
KST2222
Fairchild Semiconductor
Fairchild Semiconductor
Fairchild Semiconductor
Fairchild Semiconductor
Fairchild Semiconductor
Fairchild Semiconductor
Fairchild Semiconductor
Fairchild Semiconductor
Fairchild Semiconductor
Fairchild Semiconductor
D4
D6
10kΩ
Capacitor (SMD)
0.22µF
1µF
D7
D8
C1
C2
C3
C4
16V 1608 K
50V 2012 K
50V 1608 K
50V 1608 K
D9
D10
D11
Q1
4.7nF
4.7nF
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
11
5. BOM of the Application Circuit (Continued)
Part Ref.
Value
Description /Vendor
Part Ref.
Value
Description /Vendor
Electrolytic capacitor
220µF
Wafer (SMD)
C22
25V
CN1
CN2
CN3
CN4
CN5
35001WR-02A
35001WR-02A
35001WR-02A
35001WR-02A
12505WR-10
MOSFET (SMD)
M1
M2
FDS8958A
FDS8958A
Fairchild Semiconductor
Fairchild Semiconductor
Transformer (SMD)
TX1
TX2
EFD2124
Supported by Namyang electronics (http://www.namyangelec.co.kr)
EFD2124
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
12
Mechanical Dimensions
Inches
Millimeters
Symbol
Notes
Min.
Max.
Min.
Max.
A
.093
.004
.013
.009
.496
.291
.104
.012
.020
.013
.512
.299
2.35
0.10
0.33
0.23
12.60
7.40
2.65
0.30
0.51
0.32
13.00
7.60
A1
B
C
D
E
5
2
2
e
.050 BSC
1.27 BSC
H
h
.394
.010
.016
.419
.029
.050
10.00
0.25
0.40
10.65
0.75
1.27
L
3
6
N
α
20
20
0°
8°
0°
8°
ccc
—
.004
—
0.10
Notes:
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. "D" and "E" do not include mold flash. Mold flash or
protrusions shall not exceed .010 inch (0.25mm).
3. "L" is the length of terminal for soldering to a substrate.
4. Terminal numbers are shown for reference only.
5. "C" dimension does not include solder finish thickness.
6. Symbol "N" is the maximum number of terminals.
20
11
E
H
1
10
D
h x 45°
A1
A
C
SEATING
PLANE
– C –
α
e
B
LEAD COPLANARITY
ccc C
L
January 2001, Rev. A
Figure 8. 20-lead Molded Small Outline Package(SOIC)
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
13
© 2006 Fairchild Semiconductor Corporation
FAN7314 Rev. 1.0.4
www.fairchildsemi.com
14
相关型号:
©2020 ICPDF网 联系我们和版权申明