AMP04FPZ [ROCHESTER]
INSTRUMENTATION AMPLIFIER, 900 uV OFFSET-MAX, 0.7 MHz BAND WIDTH, PDIP8, MINI, PLASTIC, DIP-8;
| 型号： | AMP04FPZ |
| 厂家： | 
Rochester Electronics |
| 描述： | INSTRUMENTATION AMPLIFIER, 900 uV OFFSET-MAX, 0.7 MHz BAND WIDTH, PDIP8, MINI, PLASTIC, DIP-8 放大器 光电二极管 |
| 文件： | 总17页 (文件大小：1017K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Precision Single Supply
Instrumentation Amplifier
a
AMP04*
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Single Supply Operation
Low Supply Current: 700 ꢁA Max
Wide Gain Range: 1 to 1000
Low Offset Voltage: 150 ꢁV Max
Zero-In/Zero-Out
100kꢀ
R
GAIN
IN(–)
IN(+)
V
INPUT BUFFERS
OUT
Single-Resistor Gain Set
8-Lead Mini-DIP and SO Packages
11kꢀ
11kꢀ
100kꢀ
APPLICATIONS
Strain Gages
Thermocouples
RTDs
REF
Battery-Powered Equipment
Medical Instrumentation
Data Acquisition Systems
PC-Based Instruments
Portable Instrumentation
The AMP04 is specified over the extended industrial (–40°C to
+85°C) temperature range. AMP04s are available in plastic and
ceramic DIP plus SO-8 surface mount packages.
GENERAL DESCRIPTION
The AMP04 is a single-supply instrumentation amplifier
designed to work over a +5 volt to 15 volt supply range. It
offers an excellent combination of accuracy, low power con-
sumption, wide input voltage range, and excellent gain
performance.
Contact your local sales office for MIL-STD-883 data sheet
and availability.
PIN CONNECTIONS
Gain is set by a single external resistor and can be from 1 to
1000. Input common-mode voltage range allows the AMP04 to
handle signals with full accuracy from ground to within 1 volt of
the positive supply. And the output can swing to within 1 volt of
the positive supply. Gain bandwidth is over 700 kHz. In addi-
tion to being easy to use, the AMP04 draws only 700 µA of
supply current.
8-Lead Narrow-Body SO
(S Suffix)
8-Lead Epoxy DIP
(P Suffix)
R
1
2
3
4
8
R
GAIN
GAIN
7 V+
R
R
GAIN
GAIN
–IN
AMP04
–IN
V+
AMP04
V
6
+IN
OUT
+IN
V
OUT
5 REF
V–
REF
V–
For high resolution data acquisition systems, laser trimming of
low drift thin-film resistors limits the input offset voltage to
under 150 µV, and allows the AMP04 to offer gain nonlinearity
of 0.005% and a gain tempco of 30 ppm/°C.
A proprietary input structure limits input offset currents to
less than 5 nA with drift of only 8 pA/°C, allowing direct con-
nection of the AMP04 to high impedance transducers and
other signal sources.
*Protected by U.S. Patent No. 5,075,633.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 2000
AMP04–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(VS = 5 V, VCM = 2.5 V, TA = 25ꢂC unless otherwise noted)
AMP04E
AMP04F
Parameter
Symbol Conditions
Min Typ Max
Min
Typ Max Unit
OFFSET VOLTAGE
Input Offset Voltage
VIOS
30
150
300
3
1.5
3
300
600
6
3
6
µV
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +85°C
µV
Input Offset Voltage Drift
Output Offset Voltage
TCVIOS
VOOS
µV/°C
mV
mV
µV/°C
0.5
Output Offset Voltage Drift
TCVOOS
IB
30
50
INPUT CURRENT
Input Bias Current
22
30
50
40
60
nA
nA
pA/°C
nA
nA
pA/°C
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +85°C
Input Bias Current Drift
Input Offset Current
TCIB
IOS
65
1
65
8
5
10
10
15
Input Offset Current Drift
TCIOS
8
INPUT
Common-Mode Input Resistance
Differential Input Resistance
Input Voltage Range
4
4
4
4
GΩ
GΩ
V
VIN
0
3.0
0
3.0
Common-Mode Rejection
CMR
0 V ≤ VCM ≤ 3.0 V
G = 1
G = 10
G = 100
G = 1000
60
80
90
90
80
55
75
80
80
dB
dB
dB
dB
100
105
105
Common-Mode Rejection
Power Supply Rejection
CMR
PSRR
0 V ≤ VCM ≤ 2.5 V
–40°C ≤ TA ≤ +85°C
G = 1
G = 10
G = 100
55
75
85
85
50
70
75
75
dB
dB
dB
dB
G = 1000
4.0 V ≤ VS ≤ 12 V
–40°C ≤ TA ≤ +85°C
G = 1
G = 10
G = 100
95
85
95
95
95
dB
dB
dB
dB
105
105
105
G = 1000
GAIN (G = 100 K/RGAIN
Gain Equation Accuracy
)
G = 1 to 100
G = 1 to 100
–40°C ≤ TA ≤ +85°C
G = 1000
0.2
0.4
0.5
0.75
1.0
%
0.8
%
%
0.75
50
Gain Range
Nonlinearity
G
1
1000
1
1000 V/V
G = 1, RL = 5 kΩ
G = 10, RL = 5 kΩ
G = 100, RL = 5 kΩ
0.005
0.015
0.025
30
%
%
%
Gain Temperature Coefficient
∆G/∆T
ppm/°C
OUTPUT
Output Voltage Swing High
VOH
RL = 2 kΩ
4.0
3.8
4.2
4.0
3.8
V
V
RL = 2 kΩ
–40°C ≤ TA ≤ +85°C
RL = 2 kΩ
Output Voltage Swing Low
Output Current Limit
VOL
–40°C ≤ TA ≤ +85°C
2.0
2.5
mV
mA
mA
Sink
Source
30
15
30
15
–2–
REV. B
AMP04
AMP04E
Min Typ Max
AMP04F
Min Typ Max Unit
Parameter
Symbol
Conditions
NOISE
Noise Voltage Density, RTI
eN
f = 1 kHz, G = 1
f = 1 kHz, G = 10
270
45
30
25
4
7
1.5
0.7
270
45
30
25
4
7
1.5
0.7
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
µV p-p
µV p-p
µV p-p
f = 100 Hz, G = 100
f = 100 Hz, G = 1000
f = 100 Hz, G = 100
0.1 Hz to 10 Hz, G = 1
0.1 Hz to 10 Hz, G = 10
0.1 Hz to 10 Hz, G = 100
Noise Current Density, RTI
Input Noise Voltage
iN
eN p-p
DYNAMIC RESPONSE
Small Signal Bandwidth
BW
ISY
G = 1, –3 dB
300
300
kHz
POWER SUPPLY
Supply Current
550 700
850
700
850
µA
µA
–40°C ≤ TA ≤ +85°C
Specifications subject to change without notice.
(V = ꢃ15 V, VCM = 0 V, TA = 25ꢂC unless otherwise noted)
ELECTRICAL CHARACTERISTICS
S
AMP04E
AMP04F
Parameter
Symbol
Conditions
Min Typ Max
Min
Typ Max Unit
OFFSET VOLTAGE
Input Offset Voltage
VIOS
80
1
400
600
3
3
6
600
900
6
6
9
µV
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +85°C
µV
Input Offset Voltage Drift
Output Offset Voltage
TCVIOS
VOOS
µV/°C
mV
mV
µV/°C
Output Offset Voltage Drift
TCVOOS
IB
30
50
INPUT CURRENT
Input Bias Current
17
30
50
40
60
nA
nA
pA/°C
nA
nA
pA/°C
–40°C ≤ TA ≤ +85°C
–40°C ≤ TA ≤ +85°C
Input Bias Current Drift
Input Offset Current
TCIB
IOS
65
2
65
28
5
15
10
20
Input Offset Current Drift
TCIOS
28
INPUT
Common-Mode Input Resistance
Differential Input Resistance
Input Voltage Range
4
4
4
4
GΩ
GΩ
V
VIN
–12
+12
–12
+12
Common-Mode Rejection
CMR
–12 V ≤ VCM ≤ +12 V
G = 1
60
80
90
90
80
55
75
80
80
dB
dB
dB
dB
G = 10
G = 100
G = 1000
–11 V ≤ VCM ≤ +11 V
–40°C ≤ TA ≤ +85°C
G = 1
G = 10
G = 100
100
105
105
Common-Mode Rejection
Power Supply Rejection
CMR
PSRR
55
75
85
85
50
70
75
75
dB
dB
dB
dB
G = 1000
2.5 V ≤ VS ≤ 18 V
–40°C ≤ TA ≤ +85°C
G = 1
G = 10
G = 100
75
90
95
95
70
80
85
85
dB
dB
dB
dB
G = 1000
REV. B
–3–
AMP04
AMP04E
Min Typ Max
AMP04F
Parameter
Symbol
Conditions
Min
Typ Max Unit
GAIN (G = 100 K/RGAIN
)
Gain Equation Accuracy
G = 1 to 100
G = 1000
0.2
0.4
0.5
0.75
%
%
0.75
G = 1 to 100
–40°C ≤ TA ≤ +85°C
0.8
1000
1.0
1000 V/V
%
Gain Range
Nonlinearity
G
1
1
G = 1, RL = 5 kΩ
G = 10, RL = 5 kΩ
G = 100, RL = 5 kΩ
0.005
0.015
0.025
30
0.005
0.015
0.025
50
%
%
%
Gain Temperature Coefficient
∆G/∆T
ppm/°C
OUTPUT
Output Voltage Swing High
VOH
RL = 2 kΩ
13
13.4
13
V
V
RL = 2 kΩ
–40°C ≤ TA ≤ +85°C
RL = 2 kΩ
12.5
12.5
Output Voltage Swing Low
Output Current Limit
VOL
–40°C ≤ TA ≤ +85°C
–14.5
–14.5
V
mA
mA
Sink
Source
30
15
30
15
NOISE
Noise Voltage Density, RTI
eN
f = 1 kHz, G = 1
f = 1 kHz, G = 10
270
45
30
25
4
5
1
270
45
30
25
4
5
1
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
µV p-p
µV p-p
µV p-p
f = 100 Hz, G = 100
f = 100 Hz, G = 1000
f = 100 Hz, G = 100
0.1 Hz to 10 Hz, G = 1
0.1 Hz to 10 Hz, G = 10
0.1 Hz to 10 Hz, G = 100
Noise Current Density, RTI
Input Noise Voltage
iN
N p-p
e
0.5
0.5
DYNAMIC RESPONSE
Small Signal Bandwidth
BW
ISY
G = 1, –3 dB
700
700
kHz
POWER SUPPLY
Supply Current
750 900
1100
900
µA
1100 µA
–40°C ≤ TA ≤ +85°C
Specifications subject to change without notice.
WAFER TEST LIMITS
(VS = 5 V, VCM = 2.5 V, TA = 25ꢂC unless otherwise noted)
Parameter
Symbol
Conditions
Limit
Unit
OFFSET VOLTAGE
Input Offset Voltage
Output Offset Voltage
VIOS
VOOS
300
3
µV max
mV max
INPUT CURRENT
Input Bias Current
Input Offset Current
IB
IOS
40
10
nA max
nA max
INPUT
Common-Mode Rejection
CMR
0 V ≤ VCM ≤ 3.0 V
G = 1
55
75
80
80
dB min
dB min
dB min
dB min
G = 10
G = 100
G = 1000
Common-Mode Rejection
CMR
VS = 15 V, –12 V ≤ VCM ≤ +12 V
G = 1
55
75
80
dB min
dB min
dB min
G = 10
G = 100
–4–
REV. B
AMP04
Parameter
Symbol
Conditions
Limit
Unit
G = 1000
4.0 V ≤ VS ≤ 12 V
G = 1
G = 10
G = 100
80
dB min
Power Supply Rejection
PSRR
85
95
95
95
dB min
dB min
dB min
dB min
G = 1000
GAIN (G = 100 K/RGAIN
Gain Equation Accuracy
)
G = 1 to 100
0.75
% max
OUTPUT
Output Voltage Swing High
Output Voltage Swing Low
VOH
VOL
RL = 2 kΩ
RL = 2 kΩ
4.0
2.5
V min
mV max
POWER SUPPLY
Supply Current
ISY
VS = 15
900
700
µA max
µA max
NOTE
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
ABSOLUTE MAXIMUM RATINGS1
DICE CHARACTERISTICS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Common-Mode Input Voltage2 . . . . . . . . . . . . . . . . . . . 18 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 36 V
Output Short-Circuit Duration to GND . . . . . . . . . . Indefinite
Storage Temperature Range
R
R
GAIN
1
GAIN
8
Z Package . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +175°C
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
AMP04A . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
AMP04E, F . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range
7 V+
6 V
–IN 2
OUT
+IN 3
Z Package . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +175°C
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
V– 4
3
Package Type
ꢄJA
ꢄJC
Unit
5 REF
8-Lead Cerdip (Z)
8-Lead Plastic DIP (P)
8-Lead SOIC (S)
148
103
158
16
43
43
°C/W
°C/W
°C/W
AMP04 Die Size 0.075 × 0.99 inch, 7,425 sq. mils.
Substrate (Die Backside) Is Connected to V+.
Transistor Count, 81.
NOTES
1Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2For supply voltages less than 18 V, the absolute maximum input voltage is
equal to the supply voltage.
3θJA is specified for the worst case conditions, i.e., θJA is specified for device in
socket for cerdip, P-DIP, and LCC packages; θJA is specified for device
soldered in circuit board for SOIC package.
ORDERING GUIDE
Temperature
Range
VOS @ 5 V
TA = 25ꢂC
Package
Description
Package
Option
Model
AMP04EP
AMP04ES
AMP04ES-REEL7
AMP04FP
AMP04FS
AMP04FS-REEL
AMP04FS-REEL7
AMP04GBC
XIND
XIND
XIND
XIND
XIND
XIND
XIND
25°C
150 µV
150 µV
150 µV
300 µV
300 µV
150 µV
150 µV
300 µV
Plastic DIP
SOIC
N-8
SO-8
SO-8
N-8
SO-8
SO-8
SO-8
SOIC
Plastic DIP
SOIC
SOIC
SOIC
REV. B
–5–
AMP04
APPLICATIONS
Input Common-Mode Voltage Below Ground
Common-Mode Rejection
Although not tested and guaranteed, the AMP04 inputs are
biased in a way that they can amplify signals linearly with common-
mode voltage as low as –0.25 volts below ground. This holds
true over the industrial temperature range from –40°C to +85°C.
The purpose of the instrumentation amplifier is to amplify the
difference between the two input signals while ignoring offset
and noise voltages common to both inputs. One way of judging
the device’s ability to reject this offset is the common-mode
gain, which is the ratio between a change in the common-mode
voltage and the resulting output voltage change. Instrumenta-
tion amplifiers are often judged by the common-mode rejection
ratio, which is equal to 20 × log10 of the ratio of the user-selected
differential signal gain to the common-mode gain, commonly
called the CMRR. The AMP04 offers excellent CMRR, guaran-
teed to be greater than 90 dB at gains of 100 or greater. Input
offsets attain very low temperature drift by proprietary laser-
trimmed thin-film resistors and high gain amplifiers.
Extended Positive Common-Mode Range
On the high side, other instrumentation amplifier configurations,
such as the three op amp instrumentation amplifier, can have
severe positive common-mode range limitations. Figure 3 shows
an example of a gain of 1001 amplifier, with an input common-
mode voltage of 10 volts. For this circuit to function, VOB must
swing to 15.01 volts in order for the output to go to 10.01 volts.
Clearly no op amp can handle this swing range (given a 15 V
supply) as the output will saturate long before it reaches the
supply rails. Again the AMP04’s topology does not have this
limitation. Figure 4 illustrates the AMP04 operating at the same
common-mode conditions as in Figure 3. None of the internal
nodes has a signal high enough to cause amplifier saturation. As
a result, the AMP04 can accommodate much wider common-
mode range than most instrumentation amplifiers.
Input Common-Mode Range Includes Ground
The AMP04 employs a patented topology (Figure 1) that uniquely
allows the common-mode input voltage to truly extend to zero
volts where other instrumentation amplifiers fail. To illustrate,
take for example the single supply, gain of 100 instrumentation
amplifier as in Figure 2. As the inputs approach zero volts, in
order for the output to go positive, amplifier A’s output (VOA
must be allowed to go below ground, to –0.094 volts. Clearly
this is not possible in a single supply environment. Consequently
this instrumentation amplifier configuration’s input common-mode
voltage cannot go below about 0.4 volts. In comparison, the
AMP04 has no such restriction. Its inputs will function with a
zero-volt common-mode voltage.
)
10.00V
A
R
R
100kꢀ 5V
V
OA
10.01V
200ꢀ
50ꢁA
V
R
OB
100kꢀ
15.01V
R
B
10.01V
100kꢀ
R
GAIN
Figure 3. Gain = 1001, Three Op Amp Instrumentation
Amplifier
IN(–)
V
INPUT BUFFERS
OUT
IN(+)
100kꢀ
0.1ꢁA
11kꢀ
+15V
10.00V
10.01V
100ꢀ
10.01V
100ꢁA
11kꢀ
100kꢀ
V
OUT
10V
–15V
100.1ꢁA
+15V
11kꢀ
REF
11.111V
–15V
11kꢀ
Figure 1. Functional Block Diagram
100kꢀ
0.01V
+
V
OB
V
V
B
OUT
IN
Figure 4. Gain = 1000, AMP04
0V
–
V
OA
A
100kꢀ
20kꢀ
20kꢀ
100kꢀ
0.01V
5.2ꢁA
–0.094V
0V
4.7ꢁA
4.7ꢁA
2127ꢀ
Figure 2. Gain = 100 Instrumentation Amplifier
–6–
REV. B
AMP04
Programming the Gain
The gain of the AMP04 is programmed by the user by selecting
a single external resistor—RGAIN
High accuracy circuitry can experience considerable error con-
tributions due to the coupling of stray voltages into sensitive
areas, including high impedance amplifier inputs which benefit
from such techniques as ground planes, guard rings, and shields.
Careful circuit layout, including good grounding and signal
routing practice to minimize stray coupling and ground loops is
recommended. Leakage currents can be minimized by using
high quality socket and circuit board materials, and by carefully
cleaning and coating complete board assemblies.
:
Gain = 100 kΩ/RGAIN
The output voltage is then defined as the differential input
voltage times the gain.
VOUT = (VIN+ – VIN–) × Gain
In single supply systems, offsetting the ground is often desired
for several reasons. Ground may be offset from zero to provide
a quieter signal reference point, or to offset “zero” to allow a
unipolar signal range to represent both positive and negative
values.
As mentioned above, the high speed transition noise found in
logic circuitry is the sworn enemy of the analog circuit designer.
Great care must be taken to maintain separation between them
to minimize coupling. A major path for these error voltages will
be found in the power supply lines. Low impedance, load related
variations and noise levels that are completely acceptable in the
high thresholds of the digital domain make the digital supply
unusable in nearly all high performance analog applications.
The user is encouraged to maintain separate power and ground
between the analog and digital systems wherever possible,
joining only at the supply itself if necessary, and to observe
careful grounding layout and bypass capacitor scheduling in
sensitive areas.
In noisy environments such as those having digital switching,
switching power supplies or externally generated noise, ground
may not be the ideal place to reference a signal in a high accu-
racy system.
Often, real world signals such as temperature or pressure may
generate voltages that are represented by changes in polarity. In
a single supply system the signal input cannot be allowed to go
below ground, and therefore the signal must be offset to accom-
modate this change in polarity. On the AMP04, a reference
input pin is provided to allow offsetting of the input range.
Input Shield Drivers
High impedance sources and long cable runs from remote trans-
ducers in noisy industrial environments commonly experience
significant amounts of noise coupled to the inputs. Both stray
capacitance errors and noise coupling from external sources can
be minimized by running the input signal through shielded
cable. The cable shield is often grounded at the analog input
common, however improved dynamic noise rejection and a
reduction in effective cable capacitance is achieved by driving
the shield with a buffer amplifier at a potential equal to the
voltage seen at the input. Driven shields are easily realized with
the AMP04. Examination of the simplified schematic shows that
the potentials at the gain set resistor pins of the AMP04 follow
the inputs precisely. As shown in Figure 5, shield drivers are
easily realized by buffering the potential at these pins by a dual,
single supply op amp such as the OP213. Alternatively, applica-
tions with single-ended sources or that use twisted-pair cable
could drive a single shield. To minimize error contributions due
to this additional circuitry, all components and wiring should
remain in proximity to the AMP04 and careful grounding and
bypassing techniques should be observed.
The gain equation is more accurately represented by including
this reference input.
VOUT = (VIN+ – VIN–) × Gain + VREF
Grounding
The most common problems encountered in high performance
analog instrumentation and data acquisition system designs are
found in the management of offset errors and ground noise.
Primarily, the designer must consider temperature differentials
and thermocouple effects due to dissimilar metals, IR volt-
age drops, and the effects of stray capacitance. The problem
is greatly compounded when high speed digital circuitry, such
as that accompanying data conversion components, is brought
into the proximity of the analog section. Considerable noise and
error contributions such as fast-moving logic signals that easily
propagate into sensitive analog lines, and the unavoidable noise
common to digital supply lines must all be dealt with if the accu-
racy of the carefully designed analog section is to be preserved.
Besides the temperature drift errors encountered in the ampli-
fier, thermal errors due to the supporting discrete components
should be evaluated. The use of high quality, low-TC compo-
nents where appropriate is encouraged. What is more important,
large thermal gradients can create not only unexpected changes
in component values, but also generate significant thermoelec-
tric voltages due to the interface between dissimilar metals such
as lead solder, copper wire, gold socket contacts, Kovar lead
frames, etc. Thermocouple voltages developed at these junctions
commonly exceed the TCVOS contribution of the AMP04.
Component layout that takes into account the power dissipation
at critical locations in the circuit and minimizes gradient effects
and differential common-mode voltages by taking advantage of
input symmetry will minimize many of these errors.
1/2 OP213
V
OUT
1/2 OP213
Figure 5. Cable Shield Drivers
REV. B
–7–
AMP04
Compensating for Input and Output Errors
Noise Filtering
To achieve optimal performance, the user needs to take into
account a number of error sources found in instrumentation
amplifiers. These consist primarily of input and output offset
voltages and leakage currents.
Unlike most previous instrumentation amplifiers, the output
stage’s inverting input (Pin 8) is accessible. By placing a capaci-
tor across the AMP04’s feedback path (Figure 6, Pins 6 and 8)
C
EXT
The input and output offset voltages are independent from one
another, and must be considered separately. The input offset
component will of course be directly multiplied by the gain of
the amplifier, in contrast to the output offset voltage that is
independent of gain. Therefore, the output error is the domi-
nant factor at low gains, and the input error grows to become
the greater problem as gain is increased. The overall equation
for offset voltage error referred to the output (RTO) is:
100kꢀ
R
GAIN
IN(–)
V
INPUT BUFFERS
OUT
IN(+)
11kꢀ
1
V
OS (RTO) = (VIOS × G) + VOOS
11kꢀ
100kꢀ
=
LP
2ꢅ (100kꢀ) C
EXT
where VIOS is the input offset voltage and VOOS the output offset
voltage, and G is the programmed amplifier gain.
REF
The change in these error voltages with temperature must also
be taken into account. The specification TCVOS, referred to the
output, is a combination of the input and output drift specifica-
tions. Again, the gain influences the input error but not the
output, and the equation is:
Figure 6. Noise Band Limiting
a single-pole low-pass filter is produced. The cutoff frequency
(fLP) follows the relationship:
1
TCVOS (RTO) = (TCVIOS × G) + TCVOOS
fLP
=
2π (100 kΩ) CEXT
In some applications the user may wish to define the error con-
tribution as referred to the input, and treat it as an input error.
The relationship is:
Filtering can be applied to reduce wide band noise. Figure 7a
shows a 10 Hz low-pass filter, gain of 1000 for the AMP04.
Figures 7b and 7c illustrate the effect of filtering on noise. The
photo in Figure 7b shows the output noise before filtering. By
adding a 0.15 µF capacitor, the noise is reduced by about a
factor of 4 as shown in Figure 7c.
TCVOS (RTI) = TCVIOS + (TCVOOS / G)
The bias and offset currents of the input transistors also have an
impact on the overall accuracy of the input signal. The input
leakage, or bias currents of both inputs will generate an addi-
tional offset voltage when flowing through the signal source
resistance. Changes in this error component due to variations
with signal voltage and temperature can be minimized if both
input source resistances are equal, reducing the error to a
common-mode voltage which can be rejected. The difference in
bias current between the inputs, the offset current, generates a
differential error voltage across the source resistance that should
be taken into account in the user’s design.
+15V
100kꢀ
0.15ꢁF
In applications utilizing floating sources such as thermocouples,
transformers, and some photo detectors, the user must take
care to provide some current path between the high imped-
ance inputs and analog ground. The input bias currents of
the AMP04, although extremely low, will charge the stray
capacitance found in nearby circuit traces, cables, etc., and
cause the input to drift erratically or to saturate unless given a
bleed path to the analog common. Again, the use of equal resis-
tance values will create a common input error voltage that is
rejected by the amplifier.
–15V
Figure 7a. 10 Hz Low-Pass Filter
5mV
10ms
100
90
Reference Input
The VREF input is used to set the system ground. For dual sup-
ply operation it can be connected to ground to give zero volts
out with zero volts differential input. In single supply systems it
could be connected either to the negative supply or to a pseudo-
ground between the supplies. In any case, the REF input must
be driven with low impedance.
10
0%
Figure 7b. Unfiltered AMP04 Output
–8–
REV. B
AMP04
Offset Nulling in Single Supply
1mV
2s
Nulling the offset in single supply systems is difficult because
the adjustment is made to try to attain zero volts. At zero volts
out, the output is in saturation (to the negative rail) and the
output voltage is indistinguishable from the normal offset error.
Consequently the offset nulling circuit in Figure 9 must be used
with caution.
100
90
10
First, the potentiometer should be adjusted to cause the output
to swing in the positive direction; then adjust it in the reverse
direction, causing the output to swing toward ground, until
the output just stops changing. At that point the output is at
the saturation limit.
0%
Figure 7c. 10 Hz Low-Pass Filtered Output
Power Supply Considerations
R
G
In dual supply applications (for example 15 V) if the input is
connected to a low resistance source less than 100 Ω, a large
current may flow in the input leads if the positive supply is
applied before the negative supply during power-up. A similar
condition may also result upon a loss of the negative supply. If
these conditions could be present in you system, it is recom-
mended that a series resistor up to 1 kΩ be added to the input
leads to limit the input current.
AMP04
1
2
3
4
8
7
6
5
5V
INPUT
OUTPUT
OP113
This condition can not occur in a single supply environment
as losing the negative supply effectively removes any current
return path.
5V
100ꢀ 50kꢀ
Figure 9. Offset Adjust for Single Supply Applications
Offset Nulling in Dual Supply
Alternative Nulling Method
Offset may be nulled by feeding a correcting voltage at the VREF
pin (Pin 5). However, it is important that the pin be driven with
a low impedance source. Any measurable resistance will degrade
the amplifier’s common-mode rejection performance as well as
its gain accuracy. An op amp may be used to buffer the offset
null circuit as in Figure 8.
An alternative null correction technique is to inject an offset
current into the summing node of the output amplifier as in
Figure 10. This method does not require an external op amp.
However, the drawback is that the amplifier will move off its
null as the input common-mode voltage changes. It is a less
desirable nulling circuit than the previous method.
R
G
V+
V–
100kꢀ
AMP04
1
2
3
4
8
7
6
5
R
GAIN
IN(–)
–
5V
V+
INPUT
+
V
OUT
INPUT BUFFERS
OUTPUT
IN(+)
REF
V–
+5V
+5V
50kꢀ
11kꢀ
–5V
*
11kꢀ
100kꢀ
100ꢀ
50kꢀ
ꢃ5mV
ADJ
RANGE
*OP90 FOR LOW POWER
OP113 FOR LOW DRIFT
–5V
–5V
REF
Figure 8. Offset Adjust for Dual Supply Applications
Figure 10. Current Injection Offsetting Is Not
Recommended
REV. B
–9–
AMP04
APPLICATION CIRCUITS
output. Note that a 0 volt output is also the negative output swing
limit of the AMP04 powered with a single supply. Therefore, be
sure to adjust R3 to first cause the output to swing positive and
then back off until the output just stops swinging negatively.
Low Power Precision Single Supply RTD Amplifier
Figure 11 shows a linearized RTD amplifier that is powered
from a single 5 volt supply. However, the circuit will work up to
36 volts without modification. The RTD is excited by a 100 µA
constant current that is regulated by amplifier A (OP295). The
0.202 volts reference voltage used to generate the constant current
is divided down from the 2.500 volt reference. The AMP04 ampli-
fies the bridge output to a 10 mV/°C output coefficient.
Next, set the LINEARITY ADJ potentiometer to the midrange.
Substitute an exact 247.04 Ω resistor (equivalent to 400°C
temperature) in place of the RTD. Adjust the FULL-SCALE
potentiometer for a 4.000 volts output.
Finally substitute a 175.84 Ω resistor (equivalent to 200°C
temperature), and adjust the LINEARITY ADJ potentiometer
for a 2.000 volts at the output. Repeat the full-scale and the
half-scale adjustments as needed.
R9
50ꢀ
5V
C3
R8
R10
100ꢀ
R3
0.1ꢁF
383ꢀ
BALANCE
FULL-SCALE
ADJ
When properly calibrated, the circuit achieves better than
0.5°C accuracy within a temperature measurement range
from 0°C to 400°C.
500ꢀ
R1
26.7kꢀ
R2
7
26.7kꢀ
3
2
C1
0.47ꢁF
1
8
AMP04
4
V
OUT
6
5
RTD
100ꢀ
Precision 4-20 mA Loop Transmitter with Noninteractive Trim
Figure 12 shows a full bridge strain gage transducer amplifier
circuit that is powered off the 4-20 mA current loop. The AMP04
amplifies the bridge signal differentially and is converted to a
current by the output amplifier. The total quiescent current
drawn by the circuit, which includes the bridge, the amplifiers,
and the resistor biasing, is only a fraction of the 4 mA null
0
4.00V
1
(0ꢂC TO 400ꢂC)
R4
100ꢀ
A
1/2
OP295
5V
8
6
R7
3
2
121kꢀ
1/2
OP295
7
B
5
0.202V
50kꢀ
4
R5
1.02kꢀ
R6
11.5kꢀ
LINEARITY
ADJ.
(@1/2 FS)
current that flows through the current-sense resistor RSENSE
.
2.5V
6
R
SENSE
The voltage across RSENSE feeds back to the OP90’s input,
whose common-mode is fixed at the current summing reference
voltage, thus regulating the output current.
OUT
1kꢀ
2
REF43 IN
5V
C2
0.1ꢁF
GND
4
With no bridge signal, the 4 mA null is simply set up by the
50 kΩ NULL potentiometer plus the 976 kΩ resistors that
inject an offset that forces an 80 mV drop across RSENSE. At a
50 mV full-scale bridge voltage, the AMP04 amplifies the
voltage-to-current converter for a full-scale of 20 mA at the
output. Since the OP90’s input operates at a constant 0 volt
common-mode voltage, the null and the span adjustments do
not interact with one another. Calibration is simple and easy
with the NULL adjusted first, followed by SPAN adjust. The
entire circuit can be remotely placed, and powered from the
4-20 mA 2-wire loop.
NOTES: ALL RESISTORS ꢃ0.5%, ꢃ25 PPM/ꢂC
ALL POTENTIOMETERS ꢃ25 PPM/ꢂC
Figure 11. Precision Single Supply RTD Thermometer
Amplifier
The RTD is linearized by feeding a portion of the signal back to
the reference circuit, increasing the reference voltage as the
temperature increases. When calibrated properly, the RTD’s
nonlinearity error will be canceled.
To calibrate, either immerse the RTD into a zero-degree ice
bath or substitute an exact 100 Ω resistor in place of the RTD.
Then adjust bridge BALANCE potentiometer R3 for a 0 volt
U3
REF02
OUT
5.00V
4mA NULL
2
6
N
3500ꢀ STRAIN
2.49kꢀ
GAGE BRIDGE
GND
4
1N4002
50kꢀ
0.22ꢁF
7
50mV
FS
3
2
976kꢀ
0.1ꢁF
1
5kꢀ
8
97.6kꢀ
10-TURN
U1
3
7
2kꢀ
5%
AMP04
4
6
6
U2
B
T1P29A
5
OP90
20mA
SPAN
2
HP
5082-2810
4
220pF
+V
S
100kꢀ
12V TO 36V
13.3kꢀ
15.8kꢀ
5%
R
LOAD
100ꢀ
R
SENSE
20ꢀ
4-20mA
UNLESS OTHERWISE SPECIFIED, ALL RESISTORS ꢃ1%
OR BETTER POTENTIOMETER < 50 PPM/ꢂC
I
+ I
SPAN
NULL
Figure 12. Precision 4-20 mA Loop Transmitter Features Noninteractive Trims
–10–
REV. B
AMP04
4-20 mA Loop Receiver
Single Supply Programmable Gain Instrumentation Amplifier
Combining with the single supply ADG221 quad analog switch,
the AMP04 makes a useful programmable gain amplifier that
can handle input and output signals at zero volts. Figure 15
shows the implementation. A logic low input to any of the gain
control ports will cause the gain to change by shorting a gain-
set resistor across AMP04’s Pins 1 and 8. Trimming is required
at higher gains to improve accuracy because the switch ON-
resistance becomes a more significant part of the gain-set
resistance. The gain of 500 setting has two switches connected
in parallel to reduce the switch resistance.
At the receiving end of a 4-20 mA loop, the AMP04 makes a
convenient differential receiver to convert the current back to
a usable voltage (Figure 13). The 4-20 mA signal current passes
through a 100 Ω sense resistor. The voltage drop is differentially
amplified by the AMP04. The 4 mA offset is removed by the
offset correction circuit.
+15V
1N4002
4–20mA
100kꢀ
0.15ꢁF
7
4–20mA
TRANSMITTER
1kꢀ
1kꢀ
3
2
1
8
6
100ꢀ
5V TO 30V
V
AMP04
4
OUT
4–20mA
1%
ADG221
13
5
4
11
0–1.6V FS
5
WIRE
–0.400V
10ꢁF
0.1ꢁF
10
9
RESISTANCE
2
3
200ꢀ
200ꢀ
–15V
6
7
8
OP177
POWER
SUPPLY
6
GAIN OF 500
GAIN OF 100
15
16
14
3
10kꢀ
715ꢀ
GAIN
CONTROL
27kꢀ
2
1
–15V
10.9kꢀ
AD589
GAIN OF 10
WR
12
100kꢀ
Figure 13. 4-to-20 mA Line Receiver
Low Power, Pulsed Load-Cell Amplifier
0.22ꢁF
R
R
G
G
1
8
7
6
5
Figure 14 shows a 350 Ω load cell that is pulsed with a low duty
cycle to conserve power. The OP295’s rail-to-rail output capa-
bility allows a maximum voltage of 10 volts to be applied to the
bridge. The bridge voltage is selectively pulsed on when a mea-
surement is made. A negative-going pulse lasting 200 ms should
be applied to the MEASURE input. The long pulsewidth is
necessary to allow ample settling time for the long time constant
of the low-pass filter around the AMP04. A much faster settling
time can be achieved by omitting the filter capacitor.
5V TO
30V
2
3
4
V+
INPUT
V
OUT
REF
0.1ꢁF
V–
AMP04
Figure 15. Single Supply Programmable Gain Instrumen-
tation Amplifier
The switch ON resistance is lower if the supply voltage is 12 volts
or higher. Additionally, the overall amplifier’s temperature coeffi-
cient also improves with higher supply voltage.
12V
IN
1kꢀ 10kꢀ
OUT
REF01
GND
330ꢀ
1/2
OP295
MEASURE
50kꢀ
1N4148
2N3904
12V
0.22ꢁF
7
1
3
2
8
6
V
AMP04
OUT
350ꢀ
5
4
Figure 14. Pulsed Load Cell Bridge Amplifier
REV. B
–11–
AMP04
120
100
120
100
80
60
40
20
0
T
V
V
= 25ꢂC
BASED ON 300 UNITS
3 RUNS
A
S
T
V
V
= 25ꢂC
BASED ON 300 UNITS
3 RUNS
A
S
=
15V
= 0V
= 5V
CM
= 2.5V
CM
80
60
40
20
0
–0.5 –0.4 –0.3 –0.2 –0.1
0
0.1 0.2
0.3
0.4 0.5
–200 –160 –120 –80 –40
0
40
80
120 160 200
INPUT OFFSET VOLTAGE – mV
INPUT OFFSET VOLTAGE – ꢁV
Figure 19. Input Offset (VIOS) Distribution @ 15 V
Figure 16. Input Offset (VIOS) Distribution @ 5 V
120
120
300 UNITS
300 UNITS
V
=
15V
= 0V
100
S
CM
V
V
= 5V
S
CM
100
V
= 2.5V
80
60
40
20
80
60
40
20
0
0
0
0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50
TCV ꢁV/
0
0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50
TCV – ꢁV/
–
ꢂC
IOS
ꢂC
IOS
Figure 20. Input Offset Drift (TCVIOS) Distribution @ 15 V
Figure 17. Input Offset Drift (TCVIOS) Distribution @ 5 V
120
120
T
= 25ꢂC
T
V
V
= 25ꢂC
BASED ON 300 UNITS
3 RUNS
BASED ON 300 UNITS
3 RUNS
A
S
A
S
V
=
15V
= 0V
= 5V
100
100
V
= 2.5V
CM
CM
80
60
40
20
80
60
40
20
0
0
–5
–4
–3
–2
–1
0
1
2
3
4
5
–2.0 –1.6 –1.2 –0.8 –0.4
0
0.4
0.8
1.2
1.6 2.0
OUTPUT OFFSET – mV
OUTPUT OFFSET – mV
Figure 21. Output Offset (VOOS) Distribution @ 15 V
Figure 18. Output Offset (VOOS) Distribution @ 5 V
–12–
REV. B
AMP04
120
100
80
60
40
20
0
120
100
300 UNITS
300 UNITS
V
V
=
15V
= 0V
V
V
= 5V
S
CM
S
CM
= 0V
80
60
40
20
0
0
2
4
6
8
10
12
14
16
18
20
2
4
6
8
10
12
14
16
18
20
22 24
TCV
– ꢁV/ꢂC
TCV
– ꢁV/ꢂC
OOS
OOS
Figure 22. Output Offset Drift (TCVOOS) Distribution
@ 5 V
Figure 25. Output Offset Drift (TCVOOS) Distribution
15 V
@
15.0
5.0
R
= 100kꢀ
V
= 5V
L
S
V
= 5V
14.5
14.0
S
4.8
4.6
4.4
4.2
4.0
3.8
R
= 10kꢀ
L
13.5
13.0
R
= 2kꢀ
L
R
= 100kꢀ
L
12.5
–14.6
–14.7
–14.8
–14.9
–15.0
–15.1
R
= 2kꢀ
L
R
= 2kꢀ
R
= 10kꢀ
L
L
R
= 10kꢀ
L
R
= 100kꢀ
L
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
TEMPERATURE – ꢂC
TEMPERATURE – ꢂC
Figure 23. Output Voltage Swing vs. Temperature
@ 5 V
Figure 26. Output Voltage Swing vs. Temperature
@ +15 V
8
40
V
V
= 5V, V
= 2.5V
V
V
= 5V, V
= 2.5V
S
S
CM
S
S
CM
35
30
25
20
15
10
5
=
15V, V
= 0V
=
15V, V
= 0V
CM
CM
6
4
2
0
V
= 5V
S
V
=
15V
S
V
=
15V
S
V
= 5V
S
0
–50
–25
0
25
50
75
100
–50
–25
0
25
50
75
100
TEMPERATURE –
ꢂC
TEMPERATURE –
ꢂC
Figure 24. Input Bias Current vs. Temperature
Figure 27. Input Offset Current vs. Temperature
REV. B
–13–
AMP04
120
100
80
50
T
= 25ꢂC
A
T
V
= 25ꢂC
A
S
G = 100
G = 10
G = 1
G = 1
=
15V
40
30
60
20
V
=
15V
S
40
10
20
0
0
V
= 5V
S
–10
–20
–20
10
100
1k
FREQUENCY – Hz
10k
100k
100
1k
10k
100k
1M
FREQUENCY – Hz
Figure 28. Closed-Loop Voltage Gain vs. Frequency
Figure 31. Closed-Loop Output Impedance vs. Frequency
120
120
T
= 25ꢂC
A
T
V
V
= 25
ꢂ
C
V
=
S
15V
A
S
=
15V
110
100
90
V
= 2V p-p
CM
100
80
= 2V p-p
CM
G = 100
60
80
70
60
40
20
G = 1
G = 10
0
50
–20
1
10
100
1k
1
10
100
1k
10k
100k
VOLTAGE GAIN – G
FREQUENCY – Hz
Figure 29. Common-Mode Rejection vs. Frequency
Figure 32. Common-Mode Rejection vs. Voltage Gain
140
140
T
V
ꢆV
= 25ꢂC
T
V
ꢆV
= 25ꢂC
A
A
=
15V
1V
120
100
80
=
15V
1V
S
120
100
80
S
=
=
S
S
G = 100
G = 100
60
60
G = 1
G = 1
40
20
40
20
G = 10
G = 10
0
10
0
10
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 30. Positive Power Supply Rejection vs. Frequency
Figure 33. Negative Power Supply Rejection vs. Frequency
–14–
REV. B
AMP04
1k
100
10
1k
T
V
= 25ꢂC
T
V
= 25ꢂC
A
A
=
15V
=
15V
S
S
= 100Hz
= 1kHz
100
10
1
1
1
10
100
1k
1
10
100
1k
VOLTAGE GAIN – G
VOLTAGE GAIN – G
Figure 34. Voltage Noise Density vs. Gain
Figure 37. Voltage Noise Density vs. Gain, f = 1 kHz
140
120
100
80
T
V
= 25ꢂC
A
20mV
1s
=
15V
S
G = 100
100
90
60
40
10
0%
20
0
1
10
100
1k
10k
V
= ꢃ15V, GAIN = 1000, 0.1 TO 10 Hz BANDPASS
S
FREQUENCY – Hz
Figure 38. Input Noise Voltage
Figure 35. Voltage Noise Density vs. Frequency
1200
1000
16
T
V
= 25ꢂC
A
=
15V
S
14
12
V
=
15V
S
800
600
400
200
10
8
V
= 5V
S
6
4
2
0
10
0
–50
100
1k
10k
100k
–25
0
25
50
C
75
100
LOAD RESISTANCE – ꢀ
TEMPERATURE –
ꢂ
Figure 39. Maximum Output Voltage vs. Load Resistance
Figure 36. Supply Current vs. Temperature
REV. B
–15–
AMP04
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead Plastic DIP (N-8)
0.430 (10.92)
0.348 (8.84)
8
5
0.280 (7.11)
0.240 (6.10)
1
4
0.325 (8.25)
0.300 (7.62)
PIN 1
0.100 (2.54)
BSC
0.060 (1.52)
0.015 (0.38)
0.210
(5.33)
MAX
0.195 (4.95)
0.115 (2.93)
0.130
(3.30)
MIN
0.160 (4.06)
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
0.022 (0.558) 0.070 (1.77) SEATING
0.014 (0.356) 0.045 (1.15)
PLANE
8-Lead Cerdip (Q-8)
0.055 (1.4)
MAX
0.005 (0.13)
MIN
8
5
0.310 (7.87)
0.220 (5.59)
PIN 1
1
4
0.100 (2.54) BSC
0.405 (10.29) MAX
0.320 (8.13)
0.290 (7.37)
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150
(3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
15°
0°
0.023 (0.58) 0.070 (1.78)
0.014 (0.36) 0.030 (0.76)
8-Lead Narrow-Body SO (SO-8)
0.1968 (5.00)
0.1890 (4.80)
8
5
0.2440 (6.20)
4
0.2284 (5.80)
0.1574 (4.00)
0.1497 (3.80)
1
PIN 1
0.0196 (0.50)
0.0099 (0.25)
0.0500 (1.27)
BSC
ꢇ 45ꢂ
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
8ꢂ
0ꢂ
0.0500 (1.27)
0.0160 (0.41)
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
–16–
REV. B
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