AD8643ARZ [ROCHESTER]
QUAD OP-AMP, 1500 uV OFFSET-MAX, 3.5 MHz BAND WIDTH, PDSO14, ROHS COMPLIANT, MS-012AB, SOIC-14;
| 型号： | AD8643ARZ |
| 厂家： | 
Rochester Electronics |
| 描述： | QUAD OP-AMP, 1500 uV OFFSET-MAX, 3.5 MHz BAND WIDTH, PDSO14, ROHS COMPLIANT, MS-012AB, SOIC-14 放大器 光电二极管 |
| 文件： | 总17页 (文件大小：1157K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Power, Rail-to-Rail Output, Precision
JFET Amplifiers
Data Sheet
AD8641/AD8642/AD8643
FEATURES
PIN CONFIGURATIONS
Low supply current: 250 μA max
Very low input bias current: 1 pA max
Low offset voltage: 750 μV max
Single-supply operation: 5 V to 26 V
Dual-supply operation: 2.5 V to 13 V
Rail-to-rail output
OUT
VEE
+IN
1
2
3
5
VCC
–IN
AD8641
TOP VIEW
(Not to Scale)
4
Figure 1. 5-Lead SC70 (KS-5)
Unity-gain stable
No phase reversal
SC70 package
NC
–IN
1
2
3
4
8
7
6
5
NC
AD8641
VCC
OUT
NC
+IN
TOP VIEW
(Not to Scale)
VEE
NC = NO CONNECT
APPLICATIONS
Figure 2. 8-Lead SOIC (R-8)
Line-/battery-powered instruments
Photodiode amplifiers
Precision current sensing
Medical instrumentation
Industrial controls
Precision filters
OUT A
–IN A
+IN A
V–
1
2
3
4
8
7
6
5
V+
AD8642
OUT B
–IN B
+IN B
TOP VIEW
(Not to Scale)
Figure 3. 8-Lead SOIC (R-8)
Portable audio
OUT A
–IN A
+IN A
V–
1
2
3
4
8
7
6
5
V+
ATE
AD8642
OUT B
–IN B
+IN B
TOP VIEW
(Not to Scale)
GENERAL DESCRIPTION
The AD8641/AD8642/AD8643 are low power, precision JFET
input amplifiers featuring extremely low input bias current and
rail-to-rail output. The ability to swing nearly rail-to-rail at the
input and rail-to-rail at the output enables designers to buffer
CMOS DACs, ASICs, and other wide output swing devices in
single-supply systems. The outputs remain stable with
capacitive loads of more than 500 pF.
Figure 4. 8-Lead MSOP (RM-8)
OUT A
–IN A
+IN A
V+
1
2
3
4
5
6
7
14 OUT D
13 –IN D
12 +IN D
11 V–
AD8643
TOP VIEW
(Not to Scale)
+IN B
–IN B
OUT B
10 +IN C
9
8
–IN C
OUT C
The AD8641/AD8642/AD8643 are suitable for applications
utilizing multichannel boards that require low power to manage
heat. Other applications include photodiodes, ATE reference
level drivers, battery management, and industrial controls.
Figure 5. 14-Lead SOIC (R-14)
The AD8641/AD8642/AD8643 are fully specified over the
extended industrial temperature range of –40°C to +125°C. The
AD8641 is available in 5-lead SC70 and 8-lead SOIC lead-free
packages. The AD8642 is available in 8-lead MSOP and 8-lead
SOIC lead-free packages. The AD8643 is available in 14-lead
SOIC and 16-lead, 3 mm × 3 mm, LFCSP lead-free packages.
12 –IN D
–IN A
+IN A
V+
1
2
3
4
PIN 1
INDICATOR
11 +IN D
10 V–
AD8643
TOP VIEW
+IN B
9 +IN C
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD SHOULD BE CONNECTED TO V+.
Figure 6. 16-Lead LFCSP (CP-16) (Not Drawn to Scale)
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2004–2011 Analog Devices, Inc. All rights reserved.
AD8641/AD8642/AD8643
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................5
Thermal Resistance.......................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions....................................................................... 13
Ordering Guide .......................................................................... 15
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
REVISION HISTORY
9/11—Rev. D to Rev. E
3/05—Rev. 0 to Rev. A
Changes to Thermal Resistance Section........................................ 5
Added AD8642 ...................................................................Universal
Changes to General Description .....................................................1
Added Figure 3 and Figure 4............................................................1
Changes to Specifications.................................................................3
Changes to Absolute Maximum Ratings........................................5
Changes to Figure 22.........................................................................8
Changes to Figure 23.........................................................................9
Changes to Figure 41...................................................................... 12
Updated Outline Dimensions....................................................... 13
Changes to Ordering Guide.......................................................... 14
7/11—Rev. C to Rev. D
Changes to Figure 6.......................................................................... 1
11/10—Rev. B to Rev. C
Changes to Figure 6.......................................................................... 1
Added Thermal Resistance Section and Table 4 .......................... 5
Updated Outline Dimensions....................................................... 13
Changes to Ordering Guide .......................................................... 15
4/05—Rev. A to Rev. B
10/04—Initial Version: Revision 0
Added AD8643 ...................................................................Universal
Added 14-Lead SOIC.........................................................Universal
Added 16-Lead LFCSP.......................................................Universal
Updated Outline Dimensions....................................................... 13
Changes to Ordering Guide .......................................................... 14
Rev. E | Page 2 of 16
Data Sheet
AD8641/AD8642/AD8643
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = 5.0 V, VCM = 2.5 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
50
750
1
1.5
1.6
1
μV
AD8643 LFCSP only
–40°C < TA < +85°C
+85°C < TA < +125°C, VCM = 1.5 V
mV
mV
mV
pA
Input Bias Current
IB
0.25
–40°C < TA < +125°C
–40°C < TA < +125°C
180
0.5
60
3
pA
pA
pA
V
dB
V/mV
μV/°C
Input Offset Current
IOS
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
0
74
80
CMRR
AVO
∆VOS/∆T
VCM = 0 V to 2.5 V
RL = 10 kΩ, VO = 0.5 to 4.5 V
–40°C < TA < +125°C
93
140
2.5
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOL
IOUT
4.95
4.94
V
V
V
V
IL = 1 mA, –40°C to +125°C
IL = 1 mA, –40°C to +125°C
Output Voltage Low
0.05
0.05
0.01
6
Output Current
mA
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
VS = 5 V to 26 V
90
107
195
dB
μA
μA
250
270
–40°C < TA < +125°C
DYNAMIC PERFORMANCE
Slew Rate
SR
2
V/μs
Gain Bandwidth Product
GBP
AD8641, AD8642
AD8643
3
2.5
50
MHz
MHz
Degrees
Phase Margin
Øm
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
eN p-p
eN
iN
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
4.0
28.5
0.5
μV p-p
nV/√Hz
fA/√Hz
Rev. E | Page 3 of 16
AD8641/AD8642/AD8643
Data Sheet
VS= 13 V, VCM = 0 V, TA =25°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
70
750
1
1.5
1
μV
AD8643 LFCSP only
–40° < TA < +125°C
mV
mV
pA
Input Bias Current
IB
0.25
–40°C < TA < +125°C
–40°C < TA < +125°C
260
0.5
65
pA
pA
pA
Input Offset Current
IOS
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
–13
90
215
+10
V
dB
V/mV
μV/°C
CMRR
AVO
∆VOS/∆T
VCM = −13 V to +10 V
RL = 10 kΩ, VO = –11 V to +11 V
–40°C < TA < +125°C
107
290
2.5
OUTPUT CHARACTERISTICS
Output Voltage High
VOH
VOL
IOUT
+12.95
+12.94
V
V
V
V
IL = 1 mA, –40°C to +125°C
IL = 1 mA, –40°C to +125°C
Output Voltage Low
–12.95
–12.94
Output Current
12
mA
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current/Amplifier
PSRR
ISY
VS = 2.5 V to 13 V
–40°C < TA < +125°C
90
107
200
dB
μA
μA
290
330
DYNAMIC PERFORMANCE
Slew Rate
SR
3
V/μs
Gain Bandwidth Product
Phase Margin
GBP
Øm
3.5
60
MHz
Degrees
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
eN p-p
eN
iN
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
4.2
27.5
0.5
μV p-p
nV/√Hz
fA/√Hz
Rev. E | Page 4 of 16
Data Sheet
AD8641/AD8642/AD8643
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Absolute maximum ratings apply at 25°C, unless otherwise noted.
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages. This
was measured using a standard 4-layer board. For the LFCSP
package, solder the exposed pad to a copper plane, which
should be connected to V+.
Table 3.
Parameter
Rating
Supply Voltage
Input Voltage
27.3 V
VS− to VS+
Supply Voltage
Indefinite
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
KS-5, R-8, RM-8, R-14, CP-16 Packages
Operating Temperature Range
Junction Temperature Range
KS-5, R-8, RM-8, R-14, CP-16 Packages
Lead Temperature (Soldering, 60 sec)
Table 4.
Package Type
θJA
θJC
149
43
45
36
Unit
°C/W
°C/W
°C/W
°C/W
°C/W
−65°C to +150°C
−40°C to +125°C
5-Lead SC70 (KS)
8-Lead SOIC (R)
8-Lead MSOP (RM)
14-Lead SOIC (R)
16-Lead LFCSP (CP)
430
121
142
110
81
−65°C to +150°C
300°C
16
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
Rev. E | Page 5 of 16
AD8641/AD8642/AD8643
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
20
18
16
14
12
10
8
80
V
= 5V
= 1.5V
V
= ±13V
SY
SY
V
CM
70
60
50
40
30
20
6
4
10
0
2
0
T
V
(μV/°C)
OS
V
(mV)
C
OS
Figure 7. Input Offset Voltage
Figure 10. Offset Voltage Drift
16
14
12
10
8
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= ±13V
SY
V
= ±13V
SY
= 25°C
T
A
6
4
2
0
–0.5
–15 –13 –11 –9 –7 –5 –3 –1
1
3
5
7
9
11 13 15
OFFSET VOLTAGE (μV/°C)
V
(V)
CM
Figure 11. Input Bias Current vs. VCM
Figure 8. Offset Voltage Drift
0.5
0.4
70
60
50
40
30
20
10
0
V
= ±2.5V
SY
V
= ±13V
SY
= 25°C
T
A
0.3
0.2
0.1
0
–
0.1
0.2
–
–0.3
–0.4
–0.5
–15.0 –12.5 –10.0 –7.5 –5.0 –2.5
0
2.5
5.0
7.5 10.0 12.5 15.0
V (V)
CM
V
(mV)
OS
Figure 12. Input Bias Current vs. VCM
Figure 9. Input Offset Voltage
Rev. E | Page 6 of 16
Data Sheet
AD8641/AD8642/AD8643
1000
500
400
V
= 5V
V
=
±13V
SY
SY
300
100
10
1
200
100
0
–100
–200
–300
–400
–500
0.1
0
25
50
75
100
125
150
0
0.5
1.0
1.5
(V)
2.0
2.5
TEMPERATURE (°C)
V
CM
Figure 16. Input Offset Voltage vs. VCM
Figure 13. Input Bias Current vs. Temperature
10M
1M
1.0
0.8
V
= +5V OR ±5V
SY
0.6
0.4
0.2
V
= ±13V
SY
0
–0.2
–0.4
–0.6
–0.8
–1.0
100k
V
= ±2.5V
SY
10k
0.1
1
10
100
–5
–4
–3
–2
–1
0
1
2
3
4
5
V
(V)
LOAD RESISTANCE (kΩ)
CM
Figure 14. Input Bias Current vs. VCM
Figure 17. Open-Loop Gain vs. Load Resistance
1000
900
800
700
600
500
400
300
200
100
0
1000
100
10
V
= ±13V
SY
A
B
C
D
E
A. V = ±13V, V = ±11V, R = 10kΩ
SY
O
L
B. V = ±13V, V = ±11V, R = 2kΩ
SY
O
L
C. V = +5V, V = +0.5V/+4.5V, R = 10kΩ
SY
O
L
D. V = +5V, V = +0.5V/+4.5V, R = 2kΩ
SY
O
L
E. V = +5V, V = +0.5V/+4.5V, R = 600Ω
SY
O
L
–100
1
–15 –13 –11 –9 –7 –5 –3 –1 0
1
3
5
7
9
11 13 15
–50 –30 –10
10
30
50
70
90
110 130 150
V
(V)
TEMPERATURE (°C)
CM
Figure 15. Input Offset Voltage vs. VCM
Figure 18. Open-Loop Gain vs. Temperature
Rev. E | Page 7 of 16
AD8641/AD8642/AD8643
Data Sheet
10000
1000
100
10
600
V
=
±13V
V
= ±13V
SY
SY
500
400
V
– V
OH
SY
300
200
100
0
100kΩ
–
V
– V
SY OL
–100
–200
–300
–400
–500
–600
10kΩ 1kΩ
1
0.001
0.01
0.1
1
10
100
–15
–10
–5
0
5
10
15
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
Figure 22. Output Saturation Voltage vs. Load Current
Figure 19. Input Error Voltage vs. Output Voltage for Resistive Loads
10000
1000
100
10
250
V
= 5V
V
= ±5V
SY
SY
200
150
POS RAIL
V
– V
OH
SY
R
R
= 1kΩ
= 2kΩ
100
L
50
L
V
OL
0
R = 10kΩ
L
R
= 100kΩ
L
–50
–100
–150
–200
–250
–300
–350
R = 1kΩ
L
R
= 100kΩ
L
R
= 10kΩ
L
NEG RAIL
R
= 2kΩ
L
1
0.001
0.01
0.1
1
10
100
0
50
100
150
200
250
300
350
LOAD CURRENT (mA)
OUTPUT VOLTAGE FROM SUPPLY RAIL (mV)
Figure 20. Input Error Voltage vs. Output Voltage
Within 300 mV of Supply Rails
Figure 23. Output Saturation Voltage vs. Load Current
800
700
600
500
400
300
200
100
0
70
60
315
V
R
C
=
= 2k
= 40pF
±
13V
Ω
SY
270
225
180
135
90
L
L
50
40
GAIN
30
20
PHASE
+25°C
10
45
+125°C
0
0
–55°C
–10
–20
–30
–45
–90
–135
4
8
12
16
(V)
20
24
28
10k
100k
1M
FREQUENCY (Hz)
10M
V
SY
Figure 21. Quiescent Current vs. Supply Voltage at Different Temperatures
Figure 24. Open-Loop Gain and Phase Margin vs. Frequency
Rev. E | Page 8 of 16
Data Sheet
AD8641/AD8642/AD8643
70
60
50
40
30
20
10
0
140
120
100
80
315
270
225
180
135
90
V
SY
= ±13V
V
R
C
= 5V
SY
= 2kΩ
L
L
= 40pF
GAIN
60
40
PHASE
20
45
0
0
–10
–20
–45
–90
–135
–20
–40
–60
–30
10k
100k
1M
FREQUENCY (Hz)
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 25. Open-Loop Gain and Phase Margin vs. Frequency
Figure 28. CMRR vs. Frequency
140
120
100
80
70
60
V
SY
= 5V
V
R
C
=
= 2k
±
13V
Ω
SY
L
L
= 40pF
G = +100
G = +10
G = +1
50
40
60
30
40
20
20
10
0
0
–20
–40
–60
–10
–20
–30
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 26. Closed-Loop Gain vs. Frequency
Figure 29. CMRR vs. Frequency
70
60
140
120
100
80
V
= ±13V
SY
V
R
C
= 5V
SY
= 2kΩ
L
L
= 40pF
50
+PSRR
40
G = +100
G = +10
G = +1
30
60
–PSRR
20
40
10
20
0
0
–10
–20
–30
–20
–40
–60
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 27. Closed-Loop Gain vs. Frequency
Figure 30. PSRR vs. Frequency
Rev. E | Page 9 of 16
AD8641/AD8642/AD8643
Data Sheet
140
1.0
0.8
T
V
= ±13V
V
= 5V
SY
SY
120
100
80
0.6
1
+PSRR
V
IN
0.4
60
0.2
40
0
–PSRR
20
–0.2
–0.4
0
2
–20
–40
–60
–0.6
V
OUT
–0.8
–1.0
1k
10k
100k
FREQUENCY (Hz)
1M
10M
–CH1 –140.0V –3CH2–120.0V–1
μ
0M400 1s
2
A 3CH1 41.00V5
T
0.00000s
V
(V)
CM
Figure 34. No Phase Reversal
Figure 31. PSRR vs. Frequency
15
10
5
1000
100
10
V
= ±13V
V
= ±13V
SY
S
GAIN = +5
G = +100
TS + (1%)
TS + (0.1%)
0
G = +10
1
–5
–10
–15
G = +1
TS – (0.1%)
0.1
TS – (1%)
0.01
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
1k
10k
100k
1M
10M
100M
SETTLING TIME (μs)
FREQUENCY (Hz)
Figure 32. Output Impedance vs. Frequency
Figure 35. Output Swing and Error vs. Settling Time
1000
100
10
70
60
50
40
30
20
10
0
V
= 5V
SY
V
R
V
A
=
±
13V
Ω
S
= 10k
L
G = +100
= 100mV p-p
= +1
IN
V
G = +10
OS–
1
G = +1
OS+
0.1
0.01
1
10
100
1000
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
CAPACITANCE (pF)
Figure 33. Output Impedance vs. Frequency
Figure 36. Small Signal Overshoot vs. Load Capacitance
Rev. E | Page 10 of 16
Data Sheet
AD8641/AD8642/AD8643
70
1k
100
10
V
=
±13V
SY
V
R
V
A
=
±
2.5V
Ω
S
= 10k
L
60
50
40
30
20
10
0
= 100mV p-p
= +1
IN
V
OS–
OS+
1
1
10
100
1000
10
100
1k
10k
CAPACITANCE (pF)
FREQUENCY (Hz)
Figure 37. Small Signal Overshoot vs. Load Capacitance
Figure 40. Voltage Noise Density
1k
100
10
1.0
0.8
0.6
0.4
0.2
V
=
5V
V
= ±13V
SY
S
G = +1M
CH1 p-p = 4.26V
1
–0.2
–0.4
–0.6
–0.8
–1.0
1
10
100
1k
10k
–CH1 –14.00V –3
–2
–1
0M1.00s1
(V)
2
A C3H1
4–20.0V5
V
FREQUENCY (Hz)
CM
Figure 41. Voltage Noise Density
Figure 38. 0.1 Hz to 10 Hz Noise
0.004
0.001
1.0
0.8
0.6
0.4
0.2
V
= ±13V
V
= ±2.5V
SY
S
8V p-p INPUT
LOAD = 100kΩ
GAIN = +1
G = +1M
CH1 p-p = 4.06V
1V p-p INPUT
2V p-p INPUT
0.0001
1
4V p-p INPUT
–0.2
–0.4
–0.6
–0.8
–1.0
0.00001
0.000001
1
100
1k
FREQUENCY (Hz)
10k 20k
–CH1 –14.00V –3
–2
–1
0M1.00s1
(V)
2
A C3H1
4–20.0V5
V
Figure 39. 0.1 Hz to 10 Hz Noise
Figure 42. Total Harmonic Distortion + Noise vs. Frequency
Rev. E | Page 11 of 16
AD8641/AD8642/AD8643
Data Sheet
–40
20kΩ
–50
2kΩ
–
+
–
+
–60
–70
2kΩ
2kΩ
V
IN
–80
–90
V
= 18V p-p
IN
–100
–110
–120
–130
–140
–150
–160
V
= 4.5V p-p
IN
V
= 9V p-p
100
IN
20
1k
10k
100k
FREQUENCY (Hz)
Figure 43. Channel Separation
Rev. E | Page 12 of 16
Data Sheet
AD8641/AD8642/AD8643
OUTLINE DIMENSIONS
2.20
2.00
1.80
2.40
2.10
1.80
5
1
4
3
1.35
1.25
1.15
2
0.65 BSC
1.10
1.00
0.90
0.70
0.40
0.10
0.80
0.46
0.36
0.26
0.22
0.08
SEATING
PLANE
0.10 MAX
0.30
0.15
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-203-AA
Figure 44. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-5)
Dimensions shown in millimeters
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 45. 8-Lead Standard Small Outline Package [SOIC_N]
(R-8)
Dimensions shown in millimeters and (inches)
Rev. E | Page 13 of 16
AD8641/AD8642/AD8643
Data Sheet
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.80
0.55
0.40
0.15
0.05
0.23
0.09
6°
0°
0.40
0.25
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 46. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
8.75 (0.3445)
8.55 (0.3366)
8
7
14
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
1.27 (0.0500)
0.50 (0.0197)
0.25 (0.0098)
45°
BSC
1.75 (0.0689)
1.35 (0.0531)
0.25 (0.0098)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012-AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 47. 14-Lead Standard Small Outline Package [SOIC_N]
(R-14)
Dimensions shown in millimeters and (inches)
0.50
0.40
0.60 MAX
0.30
3.00
BSC SQ
PIN 1
INDICATOR
BOTTOM VIEW
*
1.65
1.50 SQ
1.35
13
12
16
1
0.45
PIN 1
INDICATOR
2.75
BSC SQ
TOP
VIEW
EXPOSED
PAD
4
9
8
0.50
BSC
5
0.25 MIN
1.50 REF
0.80 MAX
12° MAX
0.65 TYP
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.90
0.85
0.80
0.05 MAX
0.02 NOM
SECTION OF THIS DATA SHEET.
SEATING
PLANE
0.30
0.23
0.18
0.20 REF
*
COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2
EXCEPT FOR EXPOSED PAD DIMENSION.
Figure 48. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
3 mm × 3 mm Body, Very Thin Quad (CP-16-3)
Dimensions shown in millimeters
Rev. E | Page 14 of 16
Data Sheet
AD8641/AD8642/AD8643
ORDERING GUIDE
Model1
AD8641AKSZ-R2
AD8641AKSZ-REEL7
AD8641AKSZ-REEL
AD8641ARZ
AD8641ARZ-REEL7
AD8641ARZ-REEL
AD8642ARMZ
AD8642ARMZ-REEL
AD8642ARZ
AD8642ARZ-REEL7
AD8642ARZ-REEL
AD8643ARZ
AD8643ARZ-REEL7
AD8643ARZ-REEL
AD8643ACPZ-R2
AD8643ACPZ-REEL7
AD8643ACPZ-REEL
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
Package Description
5-Lead SC70
5-Lead SC70
Package Option
Branding
A07
A07
KS-5
KS-5
KS-5
R-8
R-8
R-8
5-Lead SC70
A07
8-lead SOIC_N
8-lead SOIC_N
8-lead SOIC_N
8-lead MSOP
RM-8
RM-8
R-8
R-8
R-8
A0A
A0A
8-lead MSOP
8-lead SOIC_N
8-lead SOIC_N
8-lead SOIC_N
14-lead SOIC_N
14-lead SOIC_N
14-lead SOIC_N
16-Lead LFCSP_VQ
16-Lead LFCSP_VQ
16-Lead LFCSP_VQ
R-14
R-14
R-14
CP-16-3
CP-16-3
CP-16-3
AUA
AUA
AUA
1 Z = RoHS Compliant Part.
Rev. E | Page 15 of 16
AD8641/AD8642/AD8643
NOTES
Data Sheet
©2004–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05072-0-9/11(E)
Rev. E | Page 16 of 16
相关型号：
AD8643TRZ-EP
QUAD OP-AMP, 1800 uV OFFSET-MAX, 3.5 MHz BAND WIDTH, PDSO14, ROHS COMPLIANT, MS-012AB, SOIC-14
ROCHESTER
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