AD811AR-16 [ROCHESTER]
1 CHANNEL, VIDEO AMPLIFIER, PDSO16, MS-013AA, SOIC-16;型号: | AD811AR-16 |
厂家: | Rochester Electronics |
描述: | 1 CHANNEL, VIDEO AMPLIFIER, PDSO16, MS-013AA, SOIC-16 放大器 光电二极管 |
文件: | 总21页 (文件大小:1700K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
High Performance Video Op Amp
AD811
FEATURES
CONNECTION DIAGRAMS
High speed
NC
1
2
3
4
8
7
6
5
NC
–IN
140 MHz bandwidth (3 dB, G = +1)
120 MHz bandwidth (3 dB, G = +2)
35 MHz bandwidth (0.1 dB, G = +2)
2500 V/µs slew rate
+V
S
OUTPUT
NC
+IN
–V
S
AD811
NC = NO CONNECT
25 ns settling time to 0.1% (for a 2 V step)
65 ns settling time to 0.01% (for a 10 V step)
Excellent video performance (RL =150 Ω)
0.01% differential gain, 0.01° differential phase
Figure 1. 8-Lead Plastic (N-8), CERDIP (Q-8), SOIC (R-8)
1
2
3
4
16 NC
15 NC
NC
NC
Hz
Voltage noise of 1.9 nV/√
14
–IN
NC
+IN
+V
S
Low distortion: THD = −74 dB @ 10 MHz
Excellent dc precision: 3 mV max input offset voltage
Flexible operation
Specified for 5 V and 15 V operation
2.3 V output swing into a 75 Ω load (VS = 5 V)
13 NC
12
5
6
7
8
OUTPUT
NC
11 NC
–V
S
10
NC
AD811
9
NC
NC
NC = NO CONNECT
APPLICATIONS
Video crosspoint switchers, multimedia broadcast systems
HDTV compatible systems
Video line drivers, distribution amplifiers
ADC/DAC buffers
DC restoration circuits
Medical
Figure 2. 16-Lead SOIC (R-16)
3
2 1 20 19
NC
NC
–IN
NC
4
5
6
7
8
18
17
NC
NC
AD811
16 +V
15
S
NC
OUTPUT
+IN
14
Ultrasound
PET
9
12 13
10 11
Gamma
Counter applications
NC = NO CONNECT
Figure 3. 20-Terminal LCC (E-20A)
GENERAL DESCRIPTION
NC
1
2
3
4
5
6
7
8
20
19
18
NC
NC
NC
+V
A wideband current feedback operational amplifier, the AD811
is optimized for broadcast-quality video systems. The −3 dB
bandwidth of 120 MHz at a gain of +2 and the differential gain
and phase of 0.01% and 0.01° (RL = 150 Ω) make the AD811
an excellent choice for all video systems. The AD811 is designed
to meet a stringent 0.1 dB gain flatness specification to a band-
width of 35 MHz (G = +2) in addition to low differential gain
and phase errors. This performance is achieved whether driving
one or two back-terminated 75 Ω cables, with a low power
supply current of 16.5 mA. Furthermore, the AD811 is specified
over a power supply range of 4.5 V to 18 V.
NC
NC
–IN
NC
+IN
17
16
S
NC
15 OUTPUT
14
13
12
11
NC
NC
NC
NC
NC
–V
S
NC
NC
9
AD811
10
NC = NO CONNECT
(Continued on page 3)
Figure 4. 20-Lead SOIC (R-20)
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
AD811
TABLE OF CONTENTS
Specifications..................................................................................... 4
Absolute Maximum Ratings............................................................ 6
Maximum Power Dissipation ..................................................... 6
Metalization Photograph............................................................. 6
Typical Performance Characteristics ............................................. 7
Applications..................................................................................... 12
General Design Considerations................................................ 12
Achieving the Flattest Gain Response at High Frequency.... 12
Operation as a Video Line Driver ............................................ 14
An 80 MHz Voltage-Controlled Amplifier Circuit................ 15
A Video Keyer Circuit................................................................ 16
Outline Dimensions....................................................................... 18
Ordering Guide .......................................................................... 20
REVISION HISTORY
7/04—Data Sheet Changed from Rev. D to Rev. E
Updated Format............................................................. Universal
Change to Maximum Power Dissipation Section .................... 7
Changes to Ordering Guide ......................................................20
Updated Outline Dimensions...................................................20
Rev. E | Page 2 of 20
AD811
GENERAL DESCRIPTION (continued)
12
9
The AD811 is also excellent for pulsed applications where tran-
sient response is critical. It can achieve a maximum slew rate of
greater than 2500 V/µs with a settling time of less than 25 ns to
0.1% on a 2 V step and 65 ns to 0.01% on a 10 V step.
G = +2
R
R
= 150Ω
= R
L
G
FB
V
= ±15V
S
6
The AD811 is ideal as an ADC or DAC buffer in data acquisi-
tion systems due to its low distortion up to 10 MHz and its wide
unity gain bandwidth. Because the AD811 is a current feedback
amplifier, this bandwidth can be maintained over a wide range
of gains. The AD811 also offers low voltage and current noise of
V
= ±5V
S
3
0
–3
–6
Hz
Hz
1.9 nV/√ and 20 pA/√ , respectively, and excellent dc accu-
racy for wide dynamic range applications.
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
1
10
100
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
R
= 649Ω
= 3.58MHz
F
FREQUENCY (MHz)
F
C
100 IRE
MODULATED RAMP
Figure 6. Frequency Response
R
= 150Ω
L
PHASE
GAIN
6
5
7
8
9
10
11
12
13
14
15
SUPPLY VOLTAGE (±V)
Figure 5. Differential Gain and Phase
Rev. E | Page 3 of 20
AD811
SPECIFICATIONS
@ TA = +25°C, VS = 15 V dc, RLOAD = 150 Ω, unless otherwise noted.
Table 1.
AD811J/A1
Min Typ
AD811S2
Typ
Parameter
Conditions
VS
Max Min
Max Unit
DYNAMIC PERFORMANCE
Small Signal Bandwidth (No Peaking)
−3 dB
G = +1
G = +2
RFB = 562 Ω
RFB = 649 Ω
RFB = 562 Ω
RFB = 511 Ω
15 ꢀ
140
120
80
140
120
80
MHz
MHz
MHz
MHz
15 ꢀ
15 ꢀ
15 ꢀ
G = +2
G = +10
0.1 dB Flat
G = +2
100
100
RFB = 562 Ω
RFB = 649 Ω
ꢀOUT = 20 ꢀ p-p
ꢀOUT = 4 ꢀ p-p
ꢀOUT = 20 ꢀ p-p
10 ꢀ Step, Aꢀ = − 1
10 ꢀ Step, Aꢀ = − 1
2 ꢀ Step, Aꢀ = − 1
RFB = 649, Aꢀ = +2
f = 3.58 MHz
f = 3.58 MHz
ꢀOUT = 2 ꢀ p-p, Aꢀ = +2
@ fC = 10 MHz
15
15
15
15
15
15
15
15
15
15
15
15
15
15
25
35
40
400
2500
50
65
25
3.5
0.01
0.01
−74
36
25
35
40
400
2500
50
65
25
3.5
0.01
0.01
−74
36
MHz
MHz
MHz
ꢀ/µs
ꢀ/µs
ns
ns
ns
ns
%
Degree
dBc
dBm
dBm
mꢀ
Full Power Bandwidth3
Slew Rate
Settling Time to 0.1%
Settling Time to 0.01%
Settling Time to 0.1%
Rise Time, Fall Time
Differential Gain
Differential Phase
THD @ fC = 10 MHz
Third-Order Intercept4
43
43
INPUT OFFSET ꢀOLTAGE
5 ꢀ, 15 ꢀ
0.5
3
5
0.5
3
5
TMIN to TMAX
mꢀ
Offset ꢀoltage Drift
INPUT BIAS CURRENT
−Input
5
2
2
5
2
2
µꢀ/°C
5 ꢀ, 15 ꢀ
5 ꢀ, 1 5 ꢀ
5
5
µA
µA
µA
µA
TMIN to TMAX
15
10
20
30
10
25
+Input
TMIN to TMAX
TMIN to TMAX
ꢀOUT = 10 ꢀ
RL = ∞
RL = 200 Ω
ꢀOUT = 2.5 ꢀ
RL = 150 Ω
TRANSRESISTANCE
15 ꢀ
15 ꢀ
0.75 1.5
0.5 0.75
0.75
0.5
1.5
0.75
MΩ
MΩ
5 ꢀ
0.25 0.4
0.125 0.4
MΩ
1 The AD811JR is specified with 5 ꢀ power supplies only, with operation up to 12 ꢀ.
2 See the Analog Devices military data sheet for 883B tested specifications.
3 FPBW = slew rate/(2 π ꢀPEAK).
4 Output power level, tested at a closed-loop gain of two.
Rev. E | Page 4 of 20
AD811
AD811J/A1
Typ
AD811S2
Typ Max Unit
Parameter
Conditions
Vs
Min
Max Min
COMMON-MODE REJECTION
ꢀOS (vs. Common Mode)
TMIN to TMAX
ꢀCM = 2.5 ꢀ
ꢀCM = 10 ꢀ
TMIN to TMAX
ꢀS = 4.5 ꢀ to 18 ꢀ
TMIN to TMAX
TMIN to TMAX
TMIN to TMAX
f = 1 kHz
5 ꢀ
15 ꢀ 60
56
60
66
1
50
56
60
66
1
dB
dB
µA/ꢀ
TMIN to TMAX
Input Current (vs. Common Mode)
POWER SUPPLY REJECTION
ꢀOS
+Input Current
−Input Current
3
3
60
70
60
70
dB
µA/ꢀ
µA/ꢀ
0.3
0.4
1.9
2
2
0.3
0.4
1.9
2
2
INPUT ꢀOLTAGE NOISE
Hz
nꢀ/√
pA/√
INPUT CURRENT NOISE
f = 1 kHz
20
20
Hz
OUTPUT CHARACTERISTICS
ꢀoltage Swing, Useful Operating Range3
5 ꢀ
15 ꢀ
2.9
12
2.9
12
ꢀ
ꢀ
Output Current
Short-Circuit Current
Output Resistance
TJ = 25°C
100
150
9
100
150
9
mA
mA
Ω
(Open Loop @ 5 MHz)
INPUT CHARACTERISTIC
+Input Resistance
−Input Resistance
Input Capacitance
Common-Mode ꢀoltage Range
1.5
14
7.5
3
1.5
14
7.5
3
MΩ
Ω
pF
ꢀ
+Input
5 ꢀ
15 ꢀ
13
13
ꢀ
POWER SUPPLY
Operating Range
Quiescent Current
4.5
18
4.5
18
ꢀ
mA
mA
5 ꢀ
15 ꢀ
14.5 16.0
16.5 18.0
40
14.5 16.0
16.5 18.0
40
TRANSISTOR COUNT
Number of Transistors
1 The AD811JR is specified with 5 ꢀ power supplies only, with operation up to 12 ꢀ.
2 See the Analog Devices military data sheet for 883B tested specifications.
3 Useful operating range is defined as the output voltage at which linearity begins to degrade.
Rev. E | Page 5 of 20
AD811
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
MAXIMUM POWER DISSIPATION
Rating
The maximum power that can be safely dissipated by the
AD811 is limited by the associated rise in junction temper-
ature. For the plastic packages, the maximum safe junction
temperature is 145°C. For the CERDIP and LCC packages, the
maximum junction temperature is 175°C. If these maximums
are exceeded momentarily, proper circuit operation is restored
as soon as the die temperature is reduced. Leaving the device in
the “overheated” condition for an extended period can result in
device burnout. To ensure proper operation, it is important to
observe the derating curves in Figure 22 and Figure 25.
Supply ꢀoltage
18 ꢀ
12 ꢀ
AD811JR Grade Only
Internal Power Dissipation
8-Lead PDIP Package
8-Lead CERDIP Package
8-Lead SOIC Package
16-Lead SOIC Package
20-Lead SOIC Package
20-Lead LCC Package
Output Short-Circuit Duration
Common-Mode Input ꢀoltage
Differential Input ꢀoltage
Storage Temperature Range (Q, E)
Storage Temperature Range (N, R)
Operating Temperature Range
AD811J
Observe Derating Curves
θJA = 90°C/ W
θJA = 110°C/W
θJA = 155°C/W
θJA = 85°C/W
θJA = 80°C/W
θJA = 70°C/W
Observe Derating Curves
ꢀS
While the AD811 is internally short-circuit protected, this may
not be sufficient to guarantee that the maximum junction
temperature is not exceeded under all conditions. An important
example is when the amplifier is driving a reverse-terminated
75 Ω cable and the cable’s far end is shorted to a power supply.
With power supplies of 12 V (or less) at an ambient tempera-
ture of +25°C or less, and the cable shorted to a supply rail, the
amplifier is not destroyed, even if this condition persists for an
extended period.
6 ꢀ
−65°C to +150°C
−65°C to +125°C
0°C to +70°C
−40°C to +85°C
−55°C to +125°C
300°C
AD811A
AD811S
Lead Temperature Range
(Soldering 60 sec)
METALIZATION PHOTOGRAPH
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Contact the factory for the latest dimensions.
V
V+
7
OUT
6
0.0618
(1.57)
4
2
3
AD811
–INPUT
V–
+INPUT
0.098 (2.49)
Figure 7. Metalization Photograph
Dimensions Shown in Inches and (Millimeters)
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 ꢀ readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features proprie-
tary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic
discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
Rev. E | Page 6 of 20
AD811
TYPICAL PERFORMANCE CHARACTERISTICS
20
20
15
10
5
T
= 25°C
T
= 25°C
A
A
15
10
5
R
= 150Ω
L
NO LOAD
0
0
0
5
10
SUPPLY VOLTAGE (±V)
15
20
0
5
10
SUPPLY VOLTAGE (±V)
15
20
Figure 8. Input Common-Mode Voltage Range vs. Supply Voltage
Figure 11. Output Voltage Swing vs. Supply Voltage
35
21
18
15
12
9
30
V
= ±15V
25
20
15
10
5
S
V
= ±15V
S
V
= ±5V
S
V
= ±5V
S
6
0
3
10
100
1k
10k
–60 –40 –20
0
20
40
60
80
100 120 140
LOAD RESISTANCE (Ω)
JUNCTION TEMPERATURE (°C)
Figure 9. Output Voltage Swing vs. Resistive Load
Figure 12. Quiescent Supply Current vs. Junction Temperature
10
5
10
8
6
NONINVERTING INPUT
±5 TO ±15V
0
4
V
= ±5V
S
–5
V
= ±5V
S
2
INVERTING INPUT
–10
–15
–20
–25
–30
0
V
S
= ±15V
V
= ±15V
S
–2
–4
–6
–8
–10
–60 –40 –20
0
20
40
60
80
100 120 140
–60 –40 –20
0
20
40
60
80
100 120 140
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
Figure 10. Input Bias Current vs. Junction Temperature
Figure 13. Input Offset Voltage vs. Junction Temperature
Rev. E | Page 7 of 20
AD811
250
2.0
1.5
1.0
0.5
0
V
= ±15V
S
R
= 200Ω
L
V
= ±10V
OUT
200
150
100
50
V
= ±15V
S
V
= ±5V
S
V
= ±5V
S
R
= 150Ω
L
V
= ±2.5V
OUT
–60 –40 –20
0
20
40
60
80
100 120 140
–60 –40 –20
0
20
40
60
80
100 120 140
JUNCTION TEMPERATURE (°C)
JUNCTION TEMPERATURE (°C)
Figure 14. Short-Circuit Current vs. Junction Temperature
Figure 17. Transresistance vs. Junction Temperature
10
100
10
1
100
10
1
NONINVERTING CURRENT V = ±5V TO ±15V
S
1
V
= ±15V
S
INVERTING CURRENT V = ±5V TO ±15V
S
V
= ±5V
S
0.1
0.01
VOLTAGE NOISE V = ±15V
S
GAIN = –2
R
= 649Ω
FB
VOLTAGE NOISE V = ±5V
S
10k
100k
1M
FREQUENCY (Hz)
10M
100M
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 15. Closed-Loop Output Resistance vs. Frequency
Figure 18. Input Noise vs. Frequency
10
8
100
60
40
20
0
200
160
120
80
10
8
RISE TIME
BANDWIDTH
V
V
R
= ±15V
= 1V p-p
= 150Ω
V
S
= ±15V
= 1V p-p
= 150Ω
S
6
6
V
O
O
R
L
GAIN = +2
L
GAIN = +2
OVERSHOOT
4
4
PEAKING
2
40
2
0
0.4
–20
1.6
0
0.4
0
1.6
0.6
0.8
1.0
1.2
1.4
0.6
0.8
1.0
1.2
1.4
VALUE OF FEEDBACK RESISTOR [R ] (k
Ω)
VALUE OF FEEDBACK RESISTOR [R ] (k
Ω)
FB
FB
Figure 16. Rise Time and Overshoot vs. Value of Feedback Resistor, RFB
Figure 19. −3 dB Bandwidth and Peaking vs. Value of RFB
Rev. E | Page 8 of 20
AD811
25
20
110
100
90
649
Ω
V
= ±15V
S
649
Ω
V
V
OUT
IN
150
Ω
150
Ω
GAIN = +10
80
15 OUTPUT LEVEL
FOR 3% THD
70
V
= ±15V
S
10
60
V
= ±5V
S
50
5
V
= ±5V
S
40
30
0
1k
10k
100k
FREQUENCY (Hz)
1M
10M
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 23. Large Signal Frequency Response
Figure 20. Common-Mode Rejection Ratio vs. Frequency
–50
–70
80
70
60
50
40
30
20
10
5
±5V SUPPLIES
R
= 100Ω
= 2V p-p
L
R
A
= 649
= +2
Ω
F
V
V
OUT
GAIN = +2
V
= ±5V
S
SECOND HARMONIC
V
= ±15V
S
–90
CURVES ARE FOR WORST
CASE CONDITION WHERE
ONE SUPPLY IS VARIED
WHILE THE OTHER IS
HELD CONSTANT.
THIRD HARMONIC
±15V SUPPLIES
–110
–130
SECOND
HARMONIC
THIRD HARMONIC
1k
10k
100k
1M
10M
1k
10k
100k
FREQUENCY (Hz)
1M
10M
FREQUENCY (Hz)
Figure 21. Power Supply Rejection Ration vs. Frequency
Figure 24. Harmonic Distortion vs. Frequency
2.5
2.0
1.5
1.0
0.5
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
T
MAX = –145°C
T
MAX = –175°C
J
J
16-LEAD SOIC
20-LEAD LCC
20-LEAD SOIC
8-LEAD PDIP
8-LEAD CERDIP
8-LEAD SOIC
–50 –40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90
–60 –40 –20
0
20
40
60
80
100 120 140
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
Figure 22. Maximum Power Dissipation vs. Temperature for Plastic Packages
Figure 25. Maximum Power Dissipation vs.
Temperature for Hermetic Packages
Rev. E | Page 9 of 20
AD811
9
6
G = +1
R
FB
R
R
= 150Ω
= ∞
L
G
+V
S
3
V
TO
OUT
0.1µF
V
R
= ±15V
S
TEKTRONIX
P6201 FET
PROBE
R
= 750Ω
G
FB
–
0
2
3
7
6
AD811
V
IN
–3
–6
–9
–12
R
L
5
+
HP8130
PULSE
GENERATOR
50Ω
V
R
= ±5V
= 619Ω
S
FB
–V
0.1µF
S
1
10
100
FREQUENCY (MHz)
Figure 26. Noninverting Amplifier Connection
Figure 29. Closed-Loop Gain vs. Frequency, Gain = +1
26
23
20
17
14
11
8
G = +1
1V
10ns
R
= 150Ω
L
100
90
V
IN
V
R
= ±15V
S
= 511Ω
FB
V
R
= ±5V
= 442Ω
S
FB
10
V
OUT
0%
1V
1
10
100
FREQUENCY (MHz)
Figure 27. Small Signal Pulse Response, Gain = +1
Figure 30. Closed-Loop Gain vs. Frequency, Gain = +10
100mV
10ns
1V
20ns
100
90
100
V
V
IN
90
IN
10
10
V
V
OUT
OUT
0%
0%
1V
10V
Figure 28. Small Signal Pulse Response, Gain = +10
Figure 31. Large Signal Pulse Response, Gain = +10
Rev. E | Page 10 of 20
AD811
6
3
R
FB
G = –1
= 150Ω
R
L
+V
S
V
= ±15V
S
R
= 590Ω
0.1µF
FB
V
TO
OUT
0
TEKTRONIX
P6201 FET
PROBE
R
V
G
IN
7
2
3
–
–3
–6
–9
–12
HP8130
PULSE
GENERATOR
6
AD811
V
R
= ±5V
S
R
L
+
= 562Ω
4
FB
0.1µF
1
10
100
–V
S
FREQUENCY (MHz)
Figure 32. Inverting Amplifier Connection
Figure 35. Closed-Loop Gain vs. Frequency, Gain = −1
26
23
20
17
14
11
8
1V
10ns
G = –1
R
= 150Ω
L
100
90
V
IN
V
R
= ±15V
S
= 511Ω
FB
V
R
= ±5V
= 442Ω
S
FB
10
V
OUT
0%
1V
1
10
FREQUENCY (MHz)
100
Figure 33. Small Signal Pulse Response, Gain = −1
Figure 36. Closed-Loop Gain vs. Frequency, Gain = −10
100mV
10ns
1V
20ns
100
90
100
V
IN
90
V
IN
10
V
OUT
10
V
OUT
0%
0%
1V
10V
Figure 34. Small Signal Pulse Response, Gain = −10
Figure 37. Large Signal Pulse Response, Gain = −10
Rev. E | Page 11 of 20
AD811
APPLICATIONS
GENERAL DESIGN CONSIDERATIONS
ACHIEVING THE FLATTEST GAIN RESPONSE AT
HIGH FREQUENCY
The AD811 is a current feedback amplifier optimized for use in
high performance video and data acquisition applications.
Because it uses a current feedback architecture, its closed-loop
−3 dB bandwidth is dependent on the magnitude of the feed-
back resistor. The desired closed-loop gain and bandwidth are
obtained by varying the feedback resistor (RFB) to tune the
bandwidth and by varying the gain resistor (RG) to obtain the
correct gain. Table 3 contains recommended resistor values for a
variety of useful closed-loop gains and supply voltages.
Achieving and maintaining gain flatness of better than 0.1 dB at
frequencies above 10 MHz requires careful consideration of
several issues.
Choice of Feedback and Gain Resistors
Because of the previously mentioned relationship between the
3 dB bandwidth and the feedback resistor, the fine scale gain
flatness varies, to some extent, with feedback resistor tolerance.
Therefore, it is recommended that resistors with a 1% tolerance
be used if it is desired to maintain flatness over a wide range of
production lots. In addition, resistors of different construction
have different associated parasitic capacitance and inductance.
Metal film resistors were used for the bulk of the character-
ization for this data sheet. It is possible that values other than
those indicated are optimal for other resistor types.
Table 3. −3 dB Bandwidth vs. Closed-Loop Gain and
Resistance Values
VS = 15 V
Closed-Loop Gain
RFB
RG
−3 dB BW (MHz)
+1
+2
+10
−1
750 Ω
649 Ω 649 Ω
140
120
511 Ω 56.2 Ω 100
590 Ω 590 Ω 115
511 Ω 51.1 Ω 95
Printed Circuit Board Layout Considerations
As is expected for a wideband amplifier, PC board parasitics can
affect the overall closed-loop performance. Of concern are stray
capacitances at the output and the inverting input nodes. If a
ground plane is used on the same side of the board as the signal
traces, a space (3/16" is plenty) should be left around the signal
lines to minimize coupling. Additionally, signal lines connecting
the feedback and gain resistors should be short enough so that
their associated inductance does not cause high frequency gain
errors. Line lengths less than 1/4" are recommended.
−10
VS = 5 V
Closed-Loop Gain
RFB
RG
−3 dB BW (MHz)
+1
+2
+10
−1
619 Ω
562 Ω 562 Ω
80
80
442 Ω 48.7 Ω 65
562 Ω 562 Ω 75
442 Ω 44.2 Ω 65
−10
VS = 10 V
Quality of Coaxial Cable
Closed-Loop Gain
RFB
RG
−3 dB BW (MHz)
+1
+2
+10
−1
−10
649 Ω
590 Ω 590 Ω
499 Ω 49.9 Ω 80
590 Ω 590 Ω
105
105
Optimum flatness when driving a coax cable is possible only
when the driven cable is terminated at each end with a resistor
matching its characteristic impedance. If the coax is ideal, then
the resulting flatness is not affected by the length of the cable.
While outstanding results can be achieved using inexpensive
cables, note that some variation in flatness due to varying cable
lengths may occur.
105
499 Ω 49.9 Ω 80
Figure 18 and Figure 19 illustrate the relationship between the
feedback resistor and the frequency and time domain response
characteristics for a closed-loop gain of +2. (The response at
other gains is similar.)
Power Supply Bypassing
Adequate power supply bypassing can be critical when optimiz-
ing the performance of a high frequency circuit. Inductance in
the power supply leads can form resonant circuits that produce
peaking in the amplifier’s response. In addition, if large current
transients must be delivered to the load, then bypass capacitors
(typically greater than 1 µF) are required to provide the best
settling time and lowest distortion. Although the recommended
0.1 µF power supply bypass capacitors are sufficient in many
applications, more elaborate bypassing (such as using two
paralleled capacitors) may be required in some cases.
The 3 dB bandwidth is somewhat dependent on the power
supply voltage. As the supply voltage is decreased, for example,
the magnitude of the internal junction capacitances is increased,
causing a reduction in closed-loop bandwidth. To compensate
for this, smaller values of feedback resistor are used at lower
supply voltages.
Rev. E | Page 12 of 20
AD811
100
90
80
70
60
50
40
30
20
10
0
Driving Capacitive Loads
GAIN = +2
V
= ±15V
S
The feedback and gain resistor values in Table 3 result in very
flat closed-loop responses in applications where the load capaci-
tances are below 10 pF. Capacitances greater than this result in
increased peaking and overshoot, although not necessarily in a
sustained oscillation.
R
VALUE SPECIFIED
S
IS FOR FLATTEST
FREQUENCY RESPONSE
There are at least two very effective ways to compensate for this
effect. One way is to increase the magnitude of the feedback
resistor, which lowers the 3 dB frequency. The other method is
to include a small resistor in series with the output of the ampli-
fier to isolate it from the load capacitance. The results of these
two techniques are illustrated in Figure 39. Using a 1.5 kΩ
feedback resistor, the output ripple is less than 0.5 dB when
driving 100 pF. The main disadvantage of this method is that it
sacrifices a little bit of gain flatness for increased capacitive load
drive capability. With the second method, using a series resistor,
the loss of flatness does not occur.
10
100
1000
LOAD CAPACITANCE (pF)
Figure 40. Recommended Value of Series Resistor vs.
the Amount of Capacitive Load
Figure 40 shows recommended resistor values for different load
capacitances. Refer again to Figure 39 for an example of the
results of this method. Note that it may be necessary to adjust
the gain setting resistor, RG, to correct for the attenuation which
results due to the divider formed by the series resistor, RS, and
the load resistance.
R
FB
+V
S
0.1µF
R
G
7
2
3
Applications that require driving a large load capacitance at a
high slew rate are often limited by the output current available
from the driving amplifier. For example, an amplifier limited to
25 mA output current cannot drive a 500 pF load at a slew rate
greater than 50 V/µs. However, because of the AD811’s 100 mA
output current, a slew rate of 200 V/µs is achievable when driv-
ing the same 500 pF capacitor, as shown in Figure 41.
–
+
R
(OPTIONAL)
S
V
6
OUT
AD811
V
IN
C
R
L
L
4
R
T
0.1µF
–V
S
2V
100ns
Figure 38. Recommended Connection for Driving a Large Capacitive Load
100
90
V
12
IN
9
R
R
= 1.5kΩ
= 0
FB
S
6
3
10
V
OUT
R
R
= 649Ω
FB
= 30Ω
0%
S
V
C
R
= ±15V
= 100pF
= 10kΩ
S
5V
L
L
0
GAIN = +2
–3
–6
Figure 41. Output Waveform of an AD811 Driving a 500 pF Load.
Gain = +2, RFB = 649 Ω, RS = 15 Ω, RS = 10 kΩ
1
10
FREQUENCY (MHz)
100
Figure 39. Performance Comparison of Two Methods
for Driving a Capacitive Load
Rev. E | Page 13 of 20
AD811
OPERATION AS A VIDEO LINE DRIVER
1V
10ns
The AD811 has been designed to offer outstanding perform-
ance at closed-loop gains of +1 or greater, while driving
multiple reverse-terminated video loads. The lowest differential
gain and phase errors are obtained when using 15 V power
supplies. With 12 V supplies, there is an insignificant increase
in these errors and a slight improvement in gain flatness.
Due to power dissipation considerations, 12 V supplies are
recommended for optimum video performance. Excellent
performance can be achieved at much lower supplies as well.
100
90
V
IN
10
V
OUT
0%
1V
The closed-loop gain versus the frequency at different supply
voltages is shown in Figure 43. Figure 44 is an oscilloscope
photograph of an AD811 line driver’s pulse response with 15 V
supplies. The differential gain and phase error versus the supply
are plotted in Figure 45 and Figure 46, respectively.
Figure 44. Small Signal Pulse Response, Gain = +2, VS = 15 V
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
R
= 649Ω
= 3.58MHz
F
F
C
Another important consideration when driving multiple cables
is the high frequency isolation between the outputs of the
cables. Due to its low output impedance, the AD811 achieves
better than 40 dB of output-to-output isolation at 5 MHz
driving back-terminated 75 Ω cables.
100 IRE
MODULATED RAMP
75Ω CABLE
649Ω
649Ω
V
No. 1
a. DRIVING A SINGLE, BACK-
OUT
75Ω
TERMINATED, 75Ω COAX CABLE
b. DRIVING TWO PARALLEL, BACK-
TERMINATED, COAX CABLES
+V
S
75Ω
b
0.1µF
a
7
2
3
–
+
5
6
7
8
9
10
11
12
13
14
15
75Ω CABLE
75Ω
V
No. 2
6
OUT
AD811
SUPPLY VOLTAGE (V)
75Ω CABLE
75Ω
V
75Ω
IN
Figure 45. Differential Gain Error vs. Supply Voltage for
the Video Line Driver of Figure 42
4
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
R
= 649Ω
= 3.58MHz
0.1µF
F
F
C
100 IRE
MODULATED RAMP
–V
S
b
Figure 42. A Video Line Driver Operating at a Gain of +2
12
9
a. DRIVING A SINGLE, BACK-
TERMINATED, 75Ω COAX CABLE
b. DRIVING TWO PARALLEL, BACK-
TERMINATED, COAX CABLES
G = +2
= 150Ω
a
R
R
L
= R
G
FB
V
R
= ±15V
S
= 649Ω
FB
6
V
R
= ±5V
= 562Ω
S
3
FB
5
6
7
8
9
10
11
12
13
14
15
SUPPLY VOLTAGE (V)
0
Figure 46. Differential Phase Error vs. Supply Voltage for
the Video Line Driver of Figure 42
–3
–6
1
10
FREQUENCY (MHz)
100
Figure 43. Closed-Loop Gain vs. Frequency, Gain = +2
Rev. E | Page 14 of 20
AD811
AN 80 MHZ VOLTAGE-CONTROLLED AMPLIFIER
CIRCUIT
The gain can be increased to 20 dB (×10) by raising R8 and R9
to 1.27 kΩ, with a corresponding decrease in −3 dB bandwidth
to approximately 25 MHz. The maximum output voltage under
these conditions is increased to 9 V using 12 V supplies.
The voltage-controlled amplifier (VCA) circuit of Figure 48
shows the AD811 being used with the AD834, a 500 MHz,
4-quadrant multiplier. The AD834 multiplies the signal
input by the dc control voltage, VG. The AD834 outputs are in
the form of differential currents from a pair of open collectors,
ensuring that the full bandwidth of the multiplier (which
exceeds 500 MHz) is available for certain applications. Here, the
AD811 op amp provides a buffered, single-ended, ground-
referenced output. Using feedback resistors R8 and R9 of 511 Ω,
the overall gain ranges from −70 dB for VG = 0 dB to +12 dB
(a numerical gain of +4) when VG = 1 V. The overall transfer
function of the VCA is VOUT = 4 (X1 − X2)(Y1 − Y2), which
reduces to VOUT = 4 VG VIN using the labeling conventions
shown in Figure 47. The circuit’s −3 dB bandwidth of 80 MHz is
maintained essentially constant—that is, independent of gain.
The response can be maintained flat to within 0.1 dB from dc
to 40 MHz at full gain with the addition of an optional capacitor
of about 0.3 pF across the feedback resistor R8. The circuit
produces a full-scale output of 4 V for a 1 V input and can
drive a reverse-terminated load of 50 Ω or 75 Ω to 2 V.
The gain-control input voltage, VG, may be a positive or negative
ground-referenced voltage, or fully differential, depending on
the choice of connections at Pins 7 and 8. A positive value of VG
results in an overall noninverting response. Reversing the sign
of VG simply causes the sign of the overall response to invert. In
fact, although this circuit has been classified as a voltage-
controlled amplifier, it is also quite useful as a general-purpose,
four-quadrant multiplier, with good load driving capabilities
and fully symmetrical responses from the X and Y inputs.
The AD811 and AD834 can both be operated from power
supply voltages of 5 V. While it is not necessary to power them
from the same supplies, the common-mode voltage at W1 and
W2 must be biased within the common-mode range of the
AD811’s input stage. To achieve the lowest differential gain and
phase errors, it is recommended that the AD811 be operated
from power supply voltages of 10 V or greater. This VCA
circuit operates from a 12 V dual power supply.
FB
+12V
C1
0.1µF
R1 100Ω
R2 100Ω
R8*
+
–
V
G
8
7
6
5
R4
182Ω
R6
294Ω
X2
X1 +V
W1
S
7
2
3
–
+
U1
AD834
U3
V
6
OUT
AD811
4
–V
3
Y1 Y2
S
W2
4
R5
182Ω
R7
294Ω
R
L
1
2
V
IN
R9*
R3
249Ω
C2
0.1µF
FB
–12V
*R8 = R9 = 511Ω FOR ×4 GAIN
R8 = R9 = 1.27kΩ FOR ×10 GAIN
Figure 47. An 80 MHz Voltage-Controlled Amplifier
Rev. E | Page 15 of 20
AD811
A VIDEO KEYER CIRCUIT
1 V. Thus, when VG = 0, the response to video input VB is already
at its full-scale value of unity, whereas when VG = 1 V, the differ-
ential input X1−X2 is 0. This generates the second term.
By using two AD834 multipliers, an AD811, and a 1 V dc source,
a special form of a two-input VCA circuit called a video keyer
can be assembled. Keying is the term used in reference to blend-
ing two or more video sources under the control of a third
signal or signals to create such special effects as dissolves and
overlays. The circuit shown in Figure 48 is a two-input keyer,
with video inputs VA and VB, and a control input VG. The
transfer function (with VOUT at the load) is given by
The bias currents required at the output of the multipliers are
provided by R8 and R9. A dc level-shifting network comprising
R10/R12 and R11/R13 ensures that the input nodes of the
AD811 are positioned at a voltage within its common-mode
range. At high frequencies, C1 and C2 bypass R10 and R11,
respectively. R14 is included to lower the HF loop gain and is
needed because the voltage-to-current conversion in the
AD834s, via the Y2 inputs, results in an effective value of the
feedback resistance of 250 Ω; this is only about half the value
required for optimum flatness in the AD811’s response. (Note
that this resistance is unaffected by G: when G = +1, all the
feedback is via U1, while when G = 0 it is all via U2). R14
reduces the fractional amount of output current from the
multipliers into the current-summing inverting input of the
AD811 by sharing it with R8. This resistor can be used to adjust
the bandwidth and damping factor to best suit the application.
V
OUT = GVA + (1−G)VB
where G is a dimensionless variable (actually, just the gain of the
A signal path) that ranges from 0 when VG = 0 to 1 when VG =
1 V. Thus, VOUT varies continuously between VA and VB as G
varies from 0 to 1.
Circuit operation is straightforward. Consider first the signal
path through U1, which handles video input VA. Its gain is
clearly 0 when VG = 0, and the scaling chosen ensures that it has
a unity value when VG = 1 V; this takes care of the first term of
the transfer function. On the other hand, the VG input to U2 is
taken to the inverting input X2 while X1 is biased at an accurate
C1
+5V
R7
R14
SEE TEXT
0.1µF
SETUP FOR DRIVING
REVERSE-TERMINATED LOAD
45.3Ω
R10
2.49kΩ
V
Z
OUT
R5
O
TO PIN 6
AD811
113Ω
V
R6
226Ω
G
Z
O
200Ω
200Ω
(0 TO +1V dc)
TO Y2
8
7
6
5
X2
X1 +V
W1
S
+5V
R1
INSET
R8
29.4Ω
R12
6.98kΩ
U1
AD834
U4
1.87kΩ
AD589
+5V
R2
174Ω
–V
3
Y1 Y2
S
W2
4
1
2
FB
V
(±1V FS)
A
C3
0.1µF
–5V
–5V
+5V
LOAD
GND
R3
100Ω
7
2
3
–
+
R9
29.4Ω
R13
6.98kΩ
U3
8
7
6
5
V
6
OUT
R4
1.02kΩ
AD811
X2
X1 +V
W1
S
4
C4
0.1µF
C2
0.1µF
U1
AD834
LOAD
GND
FB
–V
3
Y1 Y2
S
W2
4
1
2
R11
2.49kΩ
V
(±1V FS)
–5V
B
–5V
Figure 48. A Practical Video Keyer Circuit
Rev. E | Page 16 of 20
AD811
at 100 MHz is limited primarily by board layout. For VG = 1 V,
To generate the 1 V dc needed for the 1−G term, an AD589
reference supplies 1.225 V 25 mV to a voltage divider consist-
ing of resistors R2 through R4. Potentiometer R3 should be
adjusted to provide exactly 1 V at the X1 input.
the −3 dB bandwidth is 15 MHz when using a 137 Ω resistor for
R14 and 70 MHz with R14 = 49.9 Ω. For more information on
the design and operation of the VCA and video keyer circuits,
refer to the application note “Video VCAs and Keyers: Using the
AD834 and AD811” by Brunner, Clarke, and Gilbert, available
on the Analog Devices, Inc. website at www.analog.com.
In this case, an arrangement is shown using dual supplies of
5 V for both the AD834 and the AD811. Also, the overall gain
is arranged to be unity at the load when it is driven from a
reverse-terminated 75 Ω line. This means that the dual VCA has
to operate at a maximum gain of +2, rather than +4 as in the
VCA circuit of Figure 47. However, this cannot be achieved by
lowering the feedback resistor because below a critical value
(not much less than 500 Ω) the AD811’s peaking may be
unacceptable. This is because the dominant pole in the open-
loop ac response of a current feedback amplifier is controlled by
this feedback resistor. It would be possible to operate at a gain of
×4 and then attenuate the signal at the output. Instead, the
signals have been attenuated by 6 dB at the input to the AD811;
this is the function of R8 through R11.
10
R14 = 49.9Ω
0
GAIN
–10
–20
–30
–40
–50
–60
–70
–80
–90
R14 = 137Ω
ADJACENT CHANNEL
FEEDTHROUGH
Figure 49 is a plot of the ac response of the feedback keyer when
driving a reverse-terminated 50 Ω cable. Output noise and
adjacent channel feedthrough, with either channel fully off and
the other fully on, is about −50 dB to 10 MHz. The feedthrough
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 49. A Plot of the AC Response of the Video Keyer
Rev. E | Page 17 of 20
AD811
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
8
1
5
4
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
0.100 (2.54)
BSC
× 45°
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
0.015
(0.38)
MIN
0.180
(4.57)
MAX
8°
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
0.40 (0.0157)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
Figure 52. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body (R-8)
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Dimensions shown in millimeters and (inches)
Figure 50. 8-Lead Plastic Dual In-Line Package [PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
0.200 (5.08)
0.055 (1.40)
MAX
0.005 (0.13)
MIN
0.075 (1.91)
REF
REF
0.100 (2.54)
0.064 (1.63)
0.100 (2.54) REF
0.095 (2.41)
0.015 (0.38)
MIN
8
5
0.075 (1.90)
3
19
18
0.310 (7.87)
0.220 (5.59)
20
4
8
PIN 1
0.028 (0.71)
0.022 (0.56)
1
0.358 (9.09)
0.342 (8.69)
SQ
0.358
1
4
0.011 (0.28)
(9.09)
MAX
SQ
BOTTOM
VIEW
0.007 (0.18)
R TYP
0.050 (1.27)
BSC
0.100 (2.54) BSC
0.405 (10.29) MAX
14
0.320 (8.13)
0.290 (7.37)
0.075 (1.91)
13
9
REF
45° TYP
0.060 (1.52)
0.015 (0.38)
0.088 (2.24)
0.054 (1.37)
0.055 (1.40)
0.045 (1.14)
0.150 (3.81)
BSC
0.200 (5.08)
MAX
0.150 (3.81)
0.200 (5.08)
0.125 (3.18)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
MIN
0.015 (0.38)
0.008 (0.20)
0.023 (0.58)
0.014 (0.36)
SEATING
PLANE
15°
0°
0.070 (1.78)
0.030 (0.76)
Figure 53. 20-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-20A)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Dimensions shown in inches and (millimeters)
Figure 51. 8-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-8)
Dimensions shown in inches and (millimeters)
Rev. E | Page 18 of 20
AD811
10.50 (0.4134)
10.10 (0.3976)
13.00 (0.5118)
12.60 (0.4961)
20
1
11
10
16
1
9
8
7.60 (0.2992)
7.40 (0.2913)
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
10.65 (0.4193)
10.00 (0.3937)
2.65 (0.1043)
2.35 (0.0925)
0.75 (0.0295)
0.25 (0.0098)
× 45°
1.27 (0.0500)
BSC
0.75 (0.0295)
0.25 (0.0098)
2.65 (0.1043)
2.35 (0.0925)
0.30 (0.0118)
0.10 (0.0039)
× 45°
0.30 (0.0118)
0.10 (0.0039)
8°
0°
1.27
(0.0500)
BSC
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
1.27 (0.0500)
0.40 (0.0157)
8°
0°
COPLANARITY
0.10
0.33 (0.0130)
0.20 (0.0079)
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013AC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-013AA
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 54. 16-Lead Standard Small Outline Package [SOIC]
Wide Body (R-16)
Figure 55. 20-LeadStandard Small Outline Package [SOIC]
Wide Body (R-20)
Dimensions shown in millimeters and (inches)
Dimensions shown in millimeters and (inches)
Rev. E | Page 19 of 20
AD811
ORDERING GUIDE
Model
AD811AN
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−40°C to +85°C
−55°C to +125°C
Package Description
Package Option
N-8
8-Lead Plastic Dual In-Line Package (PDIP)
8-Lead Plastic Dual In-Line Package (PDIP)
16-LeadStandard Small Outline Package (SOIC)
16-LeadStandard Small Outline Package (SOIC)
16-LeadStandard Small Outline Package (SOIC)
20-LeadStandard Small Outline Package (SOIC)
20-LeadStandard Small Outline Package (SOIC)
8-LeadStandard Small Outline Package (SOIC)
8-LeadStandard Small Outline Package (SOIC)
8-LeadStandard Small Outline Package (SOIC)
8-LeadStandard Small Outline Package (SOIC)
8-Lead Ceramic Dual In-Line Package (CERDIP)
8-Lead Ceramic Dual In-Line Package (CERDIP)
20-Terminal Ceramic Leadless Chip Carrier (LCC)
20-Terminal Ceramic Leadless Chip Carrier (LCC)
AD811ANZ1
N-8
AD811AR-16
R-16
R-16
R-16
R-20
R-20
R-8
R-8
R-8
R-8
Q-8
AD811AR-16-REEL
AD811AR-16-REEL7
AD811AR-20
AD811AR-20-REEL
AD811JR
AD811JR-REEL
AD811JR-REEL7
AD811JRZ1
AD811SQ/883B
5962-9313101MPA
AD811SE/883B
5962-9313101M2A
AD811ACHIPS
AD811SCHIPS
Q-8
E-20A
E-20A
DIE
DIE
1 Z = Pb-free part.
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and regis-
tered trademarks are the property of their respective owners.
C00866–0–7/04(E)
Rev. E | Page 20 of 20
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