100313FMQB [ROCHESTER]

Inverter/Buffer, 100K Series, 4-Func, 1-Input, ECL, CQFP24, CERPACK-24;


型号：	100313FMQB
厂家：	Rochester Electronics
描述：	Inverter/Buffer, 100K Series, 4-Func, 1-Input, ECL, CQFP24, CERPACK-24
文件：	总8页 (文件大小：269K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

August 1998

100313

Low Power Quad Driver

General Description

Features

n 50% power reduction of the 100113

n 2000V ESD protection

The 100313 is a monolithic quad driver with two OR and two

NOR outputs and common enable. The common input is

buffered to minimize input loading. If the D inputs are not

used the Enable can be used to drive sixteen 50Ω lines. All

inputs have 50 kΩ pull-down resistors and all outputs are

buffered.

n Pin/function compatible with 100113 and 100112

n Voltage compensated operating range −4.2V to −5.7V

n Standard Microcircuit Drawing

(SMD) 5962-9673201

Logic Symbol

Pin Names

D_a–D_d

Description

Data Inputs

Enable Input

_na–O_nd

Data Outputs

Complementary Data Outputs

DS100297-3

Connection Diagrams

24-Pin DIP

24-Pin Flatpak

DS100297-2

DS100297-1

DS100297

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PrintDate=1998/08/31 PrintTime=07:05:03 45028 ds100297 Rev. No. 1 cmserv Proof

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Recommended Operating

Conditions

Case Temperature (T_C)

Military

−55˚C to +125˚C

−5.7V to −4.2V

Storage Temperature (T_STG

)

−65˚C to +150˚C

Supply Voltage (V_EE

)

Maximum Junction Temperature (T_J)

Ceramic

Note 1: Absolute maximum ratings are those values beyond which the de-

vice may be damaged or have its useful life impaired. Functional operation

under these conditions is not implied.

+175˚C

−7.0V to +0.5V

V_EEto +0.5V

−50 mA

V_EEPin Potential to Ground Pin

Input Voltage (DC)

Note 2: ESD testing conforms to MIL-STD-883, Method 3015.

Output Current (DC Output HIGH)

ESD (Note 2)

≥2000V

Military Version

DC Electrical Characteristics

V_EE−4.2V to −5.7V, V_CCV_CCAGND, T_C−55˚C to +125˚C

Symbol

Parameter

Min

Max Units

T_C

Conditions

Notes

V_OH

Output HIGH Voltage

−1025 −870

−1085 −870

−1830 −1620

−1830 −1555

−1035

0˚C to +125˚C

−55˚C

V_INV_{IH (Max)}Loading with

(Notes 3, 4,

V_OL

V_OHC

V_OLC

V_IH

V_IL

Output LOW Voltage

Output HIGH Voltage

Output LOW Voltage

Input HIGH Voltage

Input LOW Voltage

Input LOW Current

0˚C to +125˚C

−55˚C

or V_IL(Min)

50Ω to −2.0V

0˚C to +125˚C

−55˚C

−1085

V_INV_{IH (Min)}

Loading with

(Notes 3, 4,

−1610

0˚C to +125˚C

−55˚C

or V_{IL (Max)}

50Ω to −2.0V

−1555

−1165 −870

−55˚C to +125˚C

Guaranteed HIGH Signal

for All Inputs

(Notes 3, 4,

5, 6)

−1830 −1475

0.50

µA

−55˚C to +125˚C

Guaranteed LOW Signal

for All Inputs

(Notes 3, 4,

5, 6)

V_EE−4.2V

I_IL

(Notes 3, 4,

V_INV_{IL (Min)}

I_IH

Input HIGH Current

Data

350

240

500

340

µA

0˚C to +125˚C

−55˚C

V_EE−5.7V

Enable

(Notes 3, 4,

Data

Enable

V_INV_{IH (Max)}

I_EE

Power Supply Current

−65

−20

−55˚C to +125˚C

Inputs Open

(Notes 3, 4,

Note 3: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately

without allowing for the junction temperature to stabilize due to heat dissipation after power-up. This provides “cold start” specs which can be considered a worst case

condition at cold temperatures.

Note 4: Screen tested 100% on each device at −55˚C, +25˚C, and +125˚C, Subgroups 1, 2, 3, 7, and 8.

Note 5: Sample tested (Method 5005, Table I) on each manufactured lot at −55˚C, +25˚C, and +125˚C, Subgroups A1, 2, 3, 7, and 8.

Note 6: Guaranteed by applying specified input condition and testing V /V

OH OL

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PrintDate=1998/08/31 PrintTime=07:05:03 45028 ds100297 Rev. No. 1 cmserv Proof

Military Version

AC Electrical Characteristics

V_EE−4.2V to −5.7V, V_CCV_CCAGND

Symbol

Parameter

T_C−55˚C

T_C+25˚C

T_C+125˚C

Units

Conditions

Notes

Min

Max

Min

Max

Min

Max

t_PLH

t_PHL

t_PLH

t_PHL

t_TLH

t_THL

Propagation Delay

Data to Output

0.30

2.00

0.30

1.80

0.30

2.30

(Notes 7,

8, 10, 11)

Propagation Delay

Enable to Output

Transition Time

0.50

0.30

2.40

2.00

0.60

0.30

2.30

1.90

0.60

0.30

2.70

2.00

Figures 1, 2

(Note 10)

20% to 80%, 80% to

20%

Note 7: F100K 300 Series cold temperature testing is performed by temperature soaking (to guarantee junction temperature equals −55˚C), then testing immediately

after power-up. This provides “cold start” specs which can be considered a worst case condition at cold temperatures.

Note 8: Screen tested 100% on each device at +25˚C, Subgroup A9.

Note 9: Sample tested (Method 5005, Table I) on each manufactured lot at +25˚C, Subgroup A9, and at +125˚C and −55˚C temperatures, Subgroups A10 and A11.

Note 10: Not tested at +25˚C, +125˚C, and −55˚C temperature (design characterization data).

Note 11: The propagation delay specified is for single output switching. Delays may vary up to 150 ps with multiple outputs switching.

Test Circuitry

DS100297-5

Notes:

V , V

+2V, V

−2.5V.

CCA

L1 and L2 equal length 50Ω impedance lines.

50Ω terminator internal to scope.

Decoupling 0.1 µF from GND to V and V

CC EE

All unused outputs are loaded with 50Ω to GND.

Fixture and stray capacitance ≤ 3 pF.

Pin numbers shown are for flatpak; for DIP see logic symbol.

FIGURE 1. AC Test Circuit

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PrintDate=1998/08/31 PrintTime=07:05:04 45028 ds100297 Rev. No. 1 cmserv Proof

Switching Waveforms

Book

Extract

End

DS100297-6

FIGURE 2. Propagation Delay and Transition Times

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PrintDate=1998/08/31 PrintTime=07:05:04 45028 ds100297 Rev. No. 1 cmserv Proof

Physical Dimensions inches (millimeters) unless otherwise noted

24-Pin Ceramic Dual-In-Line Package (D)

NS Package Number J24E

24-Pin Quad Cerpak (F)

NS Package Number W24B

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PrintDate=1998/08/31 PrintTime=07:05:04 45028 ds100297 Rev. No. 1 cmserv Proof

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-

VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI-

CONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or sys-

tems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, and whose fail-

ure to perform when properly used in accordance

with instructions for use provided in the labeling, can

be reasonably expected to result in a significant injury

to the user.

2. A critical component in any component of a life support

device or system whose failure to perform can be rea-

sonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

National Semiconductor

Corporation

Americas

Tel: 1-800-272-9959

Fax: 1-800-737-7018

Email: support@nsc.com

National Semiconductor

Europe

National Semiconductor

Asia Pacific Customer

Response Group

Tel: 65-2544466

Fax: 65-2504466

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Tel: 81-3-5620-6175

Fax: 81-3-5620-6179

Fax: +49 (0) 1 80-530 85 86

Email: europe.support@nsc.com

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Email: sea.support@nsc.com

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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

PrintDate=1998/08/31 PrintTime=07:05:04 45028 ds100297 Rev. No. 1 cmserv Proof

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