GRM31CR71A475KA01 [RICHTEK]
2.25MHz 1A Synchronous Step-Down Converter; 的2.25MHz 1A同步降压转换器型号: | GRM31CR71A475KA01 |
厂家: | RICHTEK TECHNOLOGY CORPORATION |
描述: | 2.25MHz 1A Synchronous Step-Down Converter |
文件: | 总12页 (文件大小:283K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
RT8057A
2.25MHz 1A Synchronous Step-Down Converter
General Description
Features
z 2.7V to 5.5V Wide Input Operation Range
z 2.25MHz Fixed-Frequency PWM Operation
z Up to 1A Output Current
The RT8057A is a high efficiency Pulse-Width-Modulated
(PWM) step-downDC/DC converter, capable of delivering
1Aoutput current over a wide input voltage range from 2.7V
to 5.5V. The RT8057A is ideally suited for portable
electronic devices that are powered from 1-cell Li-ion
battery or from other power sources such as cellular
phones, PDAs, hand-held devices, game console and
related accessories.
z Up to 90% Efficiency
z 0.6V Reference Allows Low Output Voltage
z Internal Soft-Start
z No Schottky Diode Required
z Internal Compensation to Reduce External
Components
The internal synchronous rectifier with low RDS(ON)
dramatically reduces conduction loss at PWM mode.
No external Schottky diode is required in practical
applications. The RT8057Aenters LowDropout Mode when
normal Pulse -Width Mode cannot provide regulated output
voltage by continuously turning on the upper P-MOSFET.
The RT8057Aenters shut-down mode and consumes less
than 1μA when the EN pin is pulled low. The switching
ripple is easily smoothed-out by small package filtering
elements due to a fixed operating frequency of 2.25MHz.
z Low Dropout Operation : 100% Duty Cycle
z RoHS Compliant and Halogen Free
Applications
z Portable Instruments
z Game Console and Accessories
z Microprocessors and DSP Core Supplies
z Cellular Phones
z Wireless and DSL Modems
z PC Cards
The RT8057A is available in a small WDFN-6SL 2x2
package.
Pin Configurations
(TOP VIEW)
Ordering Information
(2)
RT8057A
1
2
3
6
5
4
LX
NC
FB
GND
VIN
EN
Pin 1 Orientation
(2) : Quadrant 2, Follow EIA-481-D
(For WDFN-6SL 2x2 Only)
7
WDFN-6SL 2x2
Package Type
QW : WDFN-6SL 2x2 (W-Type)
J5 : TSOT-23-5
LX
FB
5
4
Lead Plating System
G : Green (Halogen Free and Pb Free)
2
3
Note :
EN
VIN GND
Richtek products are :
TSOT-23-5
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Marking Information
` Suitable for use in SnPb or Pb-free soldering processes.
For marking information, contact our sales representative
directly or through a Richtek distributor located in your
area.
DS8057A-00 March 2011
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1
RT8057A
Typical Application Circuit
L1
2.2µH
RT8057A
V
2.3V
OUT
10µF
OUT
V
IN
LX
VIN
C
C
IN
4.7µF
R1
680k
C1
10pF
EN
FB
R2
240k
GND
Function Pin Description
Pin No.
Pin Name
Pin Function
WDFN-6SL 2x2 TSOT-23-5
1
2
5
LX
Switch Node. Connect to the external inductor.
No Internal Connection. Connect to GND.
--
NC
Feedback Pin. Connect to the external resistor divider. The FB
reference voltage is 0.6V typically.
3
4
FB
4
5
3
1
EN
Chip Enable (Active High).
VIN
Power Input. Connect to the input capacitor.
6,
Power GND. The Exposed Pad must be soldered to a large PCB and
connected to GND for maximum power dissipation.
2
GND
7 (Exposed Pad)
Function Block Diagram
EN
VIN
R
S1
OSC &
Shutdown
Control
Current
Limit
Detector
Slope
Compensation
Current
Sense
Error
Control
Logic
Driver
Amplifier
FB
LX
PWM
Comparator
R
C
R
S2
COMP
UVLO &
Power Good
Detector
GND
V
REF
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DS8057A-00 March 2011
RT8057A
Absolute Maximum Ratings (Note 1)
z Supply Input Voltage, VIN ------------------------------------------------------------------------------------------------ 6.5V
z PowerDissipation, PD @ TA = 25°C
WDFN-6SL 2x2 ------------------------------------------------------------------------------------------------------------ 0.833W
TSOT-23-5 ------------------------------------------------------------------------------------------------------------------- 0.625W
z Package Thermal Resistance (Note 2)
WDFN-6SL 2x2, θJA ------------------------------------------------------------------------------------------------------- 120°C/W
WDFN-6SL 2x2, θJC ------------------------------------------------------------------------------------------------------ 8.2°C/W
TSOT-23-5, θJA ------------------------------------------------------------------------------------------------------------- 160°C/W
z Lead Temperature (Soldering, 10 sec.)------------------------------------------------------------------------------- 260°C
z Junction Temperature ----------------------------------------------------------------------------------------------------- 150°C
z Storage Temperature Range -------------------------------------------------------------------------------------------- −65°C to 150°C
z ESD Susceptibility (Note 3)
HBM -------------------------------------------------------------------------------------------------------------------------- 2kV
MM---------------------------------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions (Note 4)
z Supply Input Voltage, VIN ------------------------------------------------------------------------------------------------ 2.7V to 5.5V
z Junction Temperature Range-------------------------------------------------------------------------------------------- −40°C to 125°C
z Ambient Temperature Range-------------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 3.6V, TA = 25°C unless otherwise specified)
Parameter
Output Current
Symbol
Test Conditions
= 2.7V to 5.5V
IN
Min
--
Typ
--
Max Unit
I
V
I
1
--
A
OUT
Quiescent Current
IQ
= 0mA
--
81
μA
OUT
−2
−2.5
2
--
2
Reference Voltage
VREF
%
Note 5
Rising
--
2.5
2.4
--
V
2.2
0.2
0.1
2.25
--
V
V
IN
Under Voltage Lockout Threshold V
UVLO
Hysteresis
--
Shutdown Current
ISHDN
--
1
μA
MHz
V
Switching Frequency
--
--
Logic-High
V
V
1
V
IN
IH
IL
EN Threshold
Voltage
Logic-Low
--
--
0.4
--
V
Thermal Shutdown Temperature
T
SD
--
150
250
200
°C
High Side
Switch On
R
R
I
= 0.2A
= 0.2A
--
--
mΩ
mΩ
DS(ON)_H SW
Resistance
Low Side
I
--
--
DS(ON)_L SW
Peak Current Limit
ILIM
1.1
--
1.5
--
2
1
A
%/V
%
Output Voltage Line Regulation
Output Voltage Load Regulation
Start-Up Time
V
= 2.7V to 5.5V
IN
0mA < I
< 0.6A
--
--
1
OUT
t
ss
Guaranteed by Design
200
300
400
μs
DS8057A-00 March 2011
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RT8057A
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational
sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may
remain possibility to affect device reliability.
Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of JEDEC
51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Note 5. The reference voltage accuracy is 2.5% at recommended ambient temperature range, guaranteed by design.
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DS8057A-00 March 2011
RT8057A
Typical Operating Characteristics
Output Voltage vs. Input Voltage
Efficiency vs. Output Current
2.38
2.36
2.34
2.32
2.30
2.28
2.26
2.24
2.22
100
VIN = 5V
90
80
70
60
50
40
30
20
10
0
VIN = 3.3V
VOUT = 2.3V, IOUT = 0A
VOUT = 2.3V
0.0
0.2
0.4
0.6
0.8
1.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Input Voltage (V)
Output Current (A)
Frequency vs. Input Voltage
Frequency vs. Temperature
2.40
2.30
2.25
2.20
2.15
2.10
2.05
2.00
1.95
1.90
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
VIN = 3.3V
VIN = 5V
VIN = 5V, VOUT = 2.3V,
IOUT = 0.2A
VOUT = 2.3V, IOUT = 0.2A
50 75 100 125
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-50
-25
0
25
Input Voltage (V)
Temperature (°C)
Output Current Limit vs. Input Voltage
Output Current Limit vs. Temperature
1.6
1.5
1.4
1.3
1.2
1.1
1.0
1.6
1.5
1.4
1.3
1.2
1.1
1.0
VOUT = 2.3V
VIN = 5V, VOUT = 2.3V
-50
-25
0
25
50
75
100
125
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Temperature (°C)
Input Voltage (V)
DS8057A-00 March 2011
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5
RT8057A
Reference Voltage vs. Temperature
Output Voltage vs. Temperature
2.35
2.34
2.33
2.32
2.31
2.30
2.29
2.28
2.27
2.26
2.25
0.608
0.606
0.604
0.602
0.600
0.598
0.596
0.594
0.592
VIN = 5V, VOUT = 2.3V,
IOUT = 0A
VIN = 5V, VOUT = 2.3V
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
Output Ripple
Output Ripple
VLX
VLX
(5V/Div)
(5V/Div)
VOUT
(5mV/Div)
VOUT
(5mV/Div)
VIN = 3.3V, VOUT = 2.3V,
IOUT = 1A
VIN = 5V, VOUT = 2.3V, IOUT = 1A
Time (250ns/Div)
Time (250ns/Div)
Load Transient Response
Load Transient Response
VOUT
VOUT
(100mV/Div)
(100mV/Div)
IOUT
IOUT
(500mA/Div)
(500mA/Div)
VIN = 5V, VOUT = 2.3V,
IOUT = 0A to 1A
VIN = 5V, VOUT = 2.3V,
IOUT = 0.4A to 1A
Time (100μs/Div)
Time (100μs/Div)
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DS8057A-00 March 2011
RT8057A
Power On from EN
Power Off from EN
VIN = 5V, VOUT = 2.3V,
IOUT = 1A
VEN
VEN
(2V/Div)
(2V/Div)
VOUT
VOUT
(2V/Div)
(2V/Div)
IOUT
(500mA/Div)
IOUT
(500mA/Div)
VIN = 5V, VOUT = 2.3V,
IOUT = 1A
Time (100μs/Div)
Time (100μs/Div)
UVLO vs. Temperature
EN Threshold vs. Temperature
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
0.80
0.78
0.76
0.74
0.72
0.70
0.68
0.66
0.64
0.62
0.60
Rising
Rising
Falling
Falling
VIN = 5V, VOUT = 2.3V
50 75 100 125
VOUT = 2.3V
75 100 125
-50
-25
0
25
-50
-25
0
25
50
Temperature (°C)
Temperature (°C)
Output Voltage vs. Output Current
2.34
2.33
2.32
2.31
2.30
2.29
2.28
2.27
2.26
VIN = 5V, VOUT = 2.3V
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Output Current (A)
DS8057A-00 March 2011
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7
RT8057A
Application Information
Low Supply Operation
The basic RT8057Aapplication circuit is shown in Typical
Application Circuit. External component selection is
determined by the maximum load current and begins with
the selection of the inductor value and operating frequency
The RT8057A is designed to operate down to an input
supply voltage of 2.7V. One important consideration at
low input supply voltages is that the RDS(ON) of the P-
Channel and N-Channel power switches increases. The
user should calculate the power dissipation when the
RT8057A is used at 100% duty cycle with low input
voltages to ensure that thermal limits are not exceeded.
followed by CIN and COUT
.
Output Voltage Setting
The output voltage is set by an external resistive divider
according to the following equation :
R1
Under Voltage Protection (UVP)
VOUT = VREF x (1+
)
R2
The output voltage can be continuously monitored for under
voltage protection. When the output voltage is less than
33% of its set voltage threshold after OCP occurs, the
under voltage protection circuit will be triggered to auto
re-softstart.
where VREF equals to 0.6V typical. The resistive divider
allows the FB pin to sense a fraction of the output voltage
as shown in Figure 1.
V
OUT
Input Voltage Over Voltage protection (VIN OVP)
R1
FB
RT8057A
When the input voltage (VIN) is higher than 6V, VIN OVP
will be triggered and the IC stops switching. Once the
input voltage drops below 6V, the IC will return to normal
operation.
R2
GND
Figure 1. Setting the Output Voltage
Soft-Start
Output Over Voltage Protection (VOUT OVP)
When the output voltage exceeds more than 5% of the
nominal reference voltage, the feedback loop forces the
internal switches off within 50μs. Therefore, the output
over voltage protection is automatically triggered by the
loop.
The RT8057A contains an internal soft-start clamp that
gradually raises the clamp on the FB pin.
100% Duty Cycle Operation
When the input supply voltage decreases toward the output
voltage, the duty cycle increases toward the maximum
on-time. Further reduction of the supply voltage forces
the main switch to remain on for more than one cycle,
eventually reaching 100% duty cycle.
Short Circuit Protection
When the output is shorted to ground, the inductor current
decays very slowly during a single switching cycle. A
current runaway detector is used to monitor inductor
current.As current increases beyond the control of current
loop, switching cycles will be skipped to prevent current
runaway from occurring.
The output voltage will then be determined by the input
voltage minus the voltage drop across the internal
P-MOSFET and the inductor.
Table 1. Inductors
Component
Supplier
Series
Inductance (μH)
2.2μH
DCR (mΩ)
Current Rating (mA)
Dimensions (mm)
NR4018
T2R2M
TAIYO YUDEN
60
2700
4 X 4 X 1.8
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DS8057A-00 March 2011
RT8057A
CIN and COUT Selection
current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR, but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density, but it is important to only use
types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR, but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics, but can have a
high voltage coefficient and audible piezoelectric effects.
The input capacitance, CIN, is needed to filter the
trapezoidal current at the source of the top MOSFET. To
prevent large ripple voltage, a low ESR input capacitor
sized for the maximum RMS current should be used. RMS
current is given by :
VOUT
V
IN
IRMS = IOUT(MAX)
−1
V
VOUT
IN
This formula has a maximum at VIN = 2VOUT, where IRMS
=
IOUT/2. This simple worst case condition is commonly used
for design because even significant deviations do not result
in much difference. Choose a capacitor rated at a higher
temperature than required.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
Several capacitors may also be paralleled to meet size or
height requirements in the design.
Using Ceramic Input and Output Capacitors
The selection of COUT is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients, as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple, ΔVOUT, is
determined by :
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, VIN. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at VIN large enough to damage the
part.
⎡
⎤
⎥
⎦
1
ΔVOUT ≤ ΔIL ESR +
⎢
8fCOUT
⎣
The output ripple is highest at maximum input voltage since
ΔIL increases with input voltage. Multiple capacitors placed
in parallel may be needed to meet the ESR and RMS
Table 2. Capacitors for CIN and COUT
Part No. Capacitance (μF)
Component Supplier
MuRata
Case Size
1206
GRM31CR71A475KA01
GRM31CR71A106KA01
4.7μF
10μF
MuRata
1206
Thermal Considerations
The maximum power dissipation can be calculated by
the following formula :
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature.
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
DS8057A-00 March 2011
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RT8057A
For recommended operating condition specifications of
the RT8057A, the maximum junction temperature is 125°C
and TA is the ambient temperature. The junction to ambient
thermal resistance, θJA, is layout dependent. For WDFN-
6SL 2x2 package, the thermal resistance, θJA, is 120°C/
Won a standard JEDEC 51-7 four-layer thermal test board.
For TSOT-23-5 package, the thermal resistance, θJA, is
160°C/W on a standard JEDEC 51-7 four-layer thermal
test board. The maximum power dissipation at TA = 25°C
can be calculated by the following formula :
Layout Considerations
Follow the PCB layout guidelines for optimal performance
of the RT8057A.
` Connect the terminal of the input capacitor(s), CIN, as
close as possible to the VINpin. This capacitor provides
the AC current into the internal power MOSFETs.
` LX node experiences high frequency voltage swing and
should be kept within a small area. Keep all sensitive
small-signal nodes away from the LX node to prevent
stray capacitive noise pick up.
PD(MAX) = (125°C − 25°C) / (120°C/W) = 0.833W for
` Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. Connect the copper areas to any DC net
(VIN, VOUT, GND, or any other DC rail in the system).
WDFN-6SL 2x2 package
PD(MAX) = (125°C − 25°C) / (160°C/W) = 0.625W for
TSOT-23-5 package
he maximum power dissipation depends on the operating
ambient temperature for fixed TJ(MAX) and thermal
resistance, θJA. For the RT8057Apackages, the derating
curve in Figure 1 allows the designer to see the effect of
rising ambient temperature on the maximum power
dissipation.
` Connect the FB pin directly to the feedback resistors.
The resistive voltage divider must be connected between
VOUT andGND.
LX should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace.
C
OUT
V
0.9
OUT
Four-Layer PCB
0.8
0.7
L1
1
2
3
6
5
4
LX
GND
VIN
EN
C
IN
NC
FB
0.6
C1
R1
7
WDFN-6SL 2x2
V
OUT
0.5
Input capacitor must
be placed as close to
TSOT-23-5
0.4
R2
the IC as possible.
0.3
0.2
0.1
0.0
(a) For WDFN-6SL 2x2 Package
LX should be connected to
inductor by wide and short trace.
Keep sensitive components
Input capacitor must
be placed as close to
0
25
50
75
100
125
the IC as possible.
away from this trace.
Ambient Temperature (°C)
L1
V
OUT
5
4
VIN
GND
EN
1
2
3
LX
Figure 2.Derating Curve for the RT8057APackage
C
IN
C
OUT
R1
FB
R2
GND
(a) For TSOT-23-5 Package
Figure 3. PCB Layout Guide
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DS8057A-00 March 2011
RT8057A
Outline Dimension
D
D2
L
E
E2
SEE DETAIL A
1
b
2
1
2
1
e
DETAILA
Pin #1 ID and Tie Bar Mark Options
A
A3
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
A3
b
0.700
0.000
0.175
0.200
1.900
1.550
1.900
0.950
0.800
0.050
0.250
0.350
2.100
1.650
2.100
1.050
0.028
0.000
0.007
0.008
0.075
0.061
0.075
0.037
0.031
0.002
0.010
0.014
0.083
0.065
0.083
0.041
D
D2
E
E2
e
0.650
0.026
L
0.200
0.300
0.008
0.012
W-Type 6SL DFN 2x2 Package
DS8057A-00 March 2011
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11
RT8057A
H
D
L
B
C
A
b
A1
e
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min
Max
Min
Max
A
A1
B
0.700
0.000
1.397
0.300
2.591
2.692
0.838
0.080
0.300
1.000
0.100
1.803
0.559
3.000
3.099
1.041
0.254
0.610
0.028
0.000
0.055
0.012
0.102
0.106
0.033
0.003
0.012
0.039
0.004
0.071
0.022
0.118
0.122
0.041
0.010
0.024
b
C
D
e
H
L
TSOT-23-5 Surface Mount Package
Richtek Technology Corporation
Headquarter
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,
specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed
by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
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DS8057A-00 March 2011
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