ZSSC3027AC6B [RENESAS]

Low-Power, High-Resolution 16-Bit Sensor Signal Conditioner;
ZSSC3027AC6B
型号: ZSSC3027AC6B
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

Low-Power, High-Resolution 16-Bit Sensor Signal Conditioner

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中文:  中文翻译
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ZSSC3027  
Low-Power, High-Resolution  
Datasheet  
16-Bit Sensor Signal Conditioner  
Brief Description  
Benefits  
Integrated 18-bit calibration math DSP  
The ZSSC3027 is a sensor signal conditioner (SSC)  
integrated circuit for high-accuracy amplification and  
analog-to-digital conversion of a differential input  
signal. Designed for high-resolution altimeter module  
applications, the ZSSC3027 can perform offset,  
span, and 1st and 2nd order temperature compen-  
sation of the measured signal. Developed for correc-  
tion of resistive bridge sensors, it can also provide a  
corrected temperature output measured with an  
internal sensor.  
Fully corrected signal at digital output  
One-pass calibration minimizes calibration costs  
No external trimming, filter, or buffering com-  
ponents required  
Highly integrated CMOS design  
Excellent for low-voltage and low-power battery  
applications  
Optimized for operation in calibrated resistive  
sensor modules  
The measured and corrected bridge values are  
provided at the digital output pins, which can be  
configured as I2C™* (3.4MHz) or SPI (20MHz).  
Digital compensation of signal offset, sensitivity,  
temperature, and non-linearity is accomplished via  
an 18-bit internal digital signal processor (DSP) run-  
ning a correction algorithm. Calibration coefficients  
are stored on-chip in a highly reliable, non-volatile,  
multiple-time programmable (MTP) memory. Pro-  
gramming the ZSSC3027 is simple via the serial  
interface. The IC-internal charge pump provides the  
MTP programming voltage. The interface is used for  
the PC-controlled calibration procedure, which pro-  
grams the set of calibration coefficients in memory.  
Physical Characteristics  
Supply voltage range: 1.7 to 3.6V  
Operating mode current consumption:  
930µA (typical)  
Sleep State current: 20nA (typical)  
Temperature resolution: <0.003K/LSB  
Operation temperatures: –40°C to +85°C  
Small die size  
Delivery options: die for wafer bonding  
Available Support  
The ZSSC3027 provides accelerated signal process-  
ing in order to support high-speed control, safety,  
and real-time sensing applications. It complements  
IDT’s ZSSC30x6 products.  
ZSSC3026 Evaluation Kit can be used to  
evaluate ZSSC3027 capabilities  
Support Documentation  
ZSSC3027 Application Example  
Features  
Flexible, programmable analog front-end design;  
up to 16-bit scalable, charge-balancing two-  
segment analog-to-digital converter (ADC)  
Fully programmable gain amplifier accepting  
sensors from 14 to 72 (linear factor)  
Internal auto-compensated temperature sensor  
Digital compensation of individual sensor offset;  
1st and 2nd order digital compensation of sensor  
gain as well as of 1st and 2nd order temperature  
gain and offset drift  
Layout optimized for stacked-die bonding for  
high-density chip-on-board assembly  
* I2C™ is a trademark of NXP.  
** FSO = Full Scale Output.  
Typical sensor elements can achieve accuracy of  
better than ±0.10% FSO** @ -40 to 85°C  
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April 20, 2016  
ZSSC3027  
Low-Power, High-Resolution  
Datasheet  
16-Bit Sensor Signal Conditioner  
ZSSC3027  
VDDB  
Vreg int  
Block Diagram  
VDD  
VTP  
Temperature  
Reference  
Sensor  
Voltage  
Regulator  
AGND / CM  
Generator  
Bias Current  
Generator  
VSS  
VTN  
Power Ctr.  
ZSSC3027  
18-bit DSP Core  
(Calculations,  
Communication)  
A
EOC  
INP  
INN  
D
Sensor  
Bridge  
Pre-  
Amplifier  
16 Bit  
VSSB  
SCLK/SCL  
SS  
MOSI/SDA  
MISO  
SPI  
MTP  
System  
Control  
Unit  
Clock  
Generator  
I²CTM  
ROM  
Power-ON  
Reset  
Ring  
Oscillator  
Applications  
SEL  
Barometric altitude measurement for  
portable navigation or emergency call  
systems  
Altitude measurement for car navigation  
Inside hard disk pressure measurement  
Weather forecast  
Fan control  
Industrial, pneumatic, and liquid pressure  
High-resolution temperature measurements  
Ordering Information (See section 6 in the data sheet for additional options for delivery)  
Sales Code Description Delivery Package  
ZSSC3027AC1B Die—temperature range: –40°C to +85 °C  
ZSSC3027AC6B Die—temperature range: –40°C to +85 °C  
ZSSC3027AC7B Die—temperature range: –40°C to +85°C  
Wafer (304µm) unsawn, tested  
Wafer (725µm) unsawn, tested  
Wafer (200µm) unsawn, tested  
ZSSC3026-KIT  
Evaluation Kit for ZSSC3026, including boards, cable, software, and 1 ZSSC3026 PQFN24 sample  
(equivalent to ZSSC3027—kit is recommended for evaluation of the capabilities of the ZSSC3027)  
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April 20, 2016  
Table of Contents  
Table of Figures....................................................................................................................................................4  
List of Tables ........................................................................................................................................................5  
1
IC Characteristics ..........................................................................................................................................6  
1.1. Absolute Maximum Ratings....................................................................................................................6  
1.2. Operating Conditions..............................................................................................................................6  
1.3. Electrical Parameters .............................................................................................................................7  
1.4. Power Supply Rejection Ratio (RSRR) vs. Frequency...........................................................................9  
Circuit Description .......................................................................................................................................10  
2.1. Brief Description ...................................................................................................................................10  
2.2. Signal Flow and Block Diagram............................................................................................................10  
2.3. Analog Front End..................................................................................................................................12  
2.3.1. Amplifier .........................................................................................................................................12  
2.3.2. Analog-to-Digital Converter............................................................................................................13  
2.3.3. Temperature Measurement ...........................................................................................................17  
2.3.4. Bridge Supply.................................................................................................................................17  
2.4. Digital Section.......................................................................................................................................17  
2.4.1. Digital Signal Processor (DSP) Core .............................................................................................17  
2.4.2. MTP Memory..................................................................................................................................17  
2.4.3. Clock Generator.............................................................................................................................18  
2.4.4. Power Supervision .........................................................................................................................18  
2.4.5. Interface .........................................................................................................................................18  
Functional Description.................................................................................................................................19  
3.1. Power Up..............................................................................................................................................19  
3.2. Measurements......................................................................................................................................19  
3.3. Operational Modes ...............................................................................................................................19  
3.4. Command Interpretation.......................................................................................................................21  
3.4.1. SPI/I2C™ Commands ....................................................................................................................21  
3.5. Communication Interface......................................................................................................................24  
3.5.1. Common Functionality ...................................................................................................................24  
3.5.2. SPI .................................................................................................................................................25  
3.5.3. I2C™...............................................................................................................................................28  
3.6. Memory.................................................................................................................................................29  
3.6.1. Programming Memory ...................................................................................................................30  
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3
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April 20, 2016  
3.6.2. Memory Status Commands ...........................................................................................................30  
3.6.3. Memory Contents...........................................................................................................................31  
3.7. Calibration Sequence ...........................................................................................................................37  
3.7.1. Calibration Step 1 – Assigning Unique Identification.....................................................................37  
3.7.2. Calibration Step 2 – Data Collection..............................................................................................37  
3.7.3. Calibration Step 3 – Coefficient Calculations.................................................................................38  
3.8. The Calibration Math ............................................................................................................................39  
3.8.1. Bridge Signal Compensation .........................................................................................................39  
3.8.2. Temperature Signal Compensation ...............................................................................................42  
Die Pad Assignments..................................................................................................................................43  
Quality and Reliability..................................................................................................................................44  
Ordering Sales Codes.................................................................................................................................44  
Related Documents.....................................................................................................................................45  
Glossary ......................................................................................................................................................45  
Document Revision History.........................................................................................................................46  
4
5
6
7
8
9
Table of Figures  
Figure 2.1 ZSSC3027 Functional Block Diagram...........................................................................................11  
Figure 2.2 ADC Offset.....................................................................................................................................16  
Figure 3.1 Operational Flow Chart: Power Up................................................................................................20  
Figure 3.2 Operational Flow Chart: Command Mode and Normal Mode .......................................................21  
Figure 3.3 SPI Configuration CPHA=0 ...........................................................................................................25  
Figure 3.4 SPI Configuration CPHA=1 ...........................................................................................................26  
Figure 3.5 SPI Command Request.................................................................................................................26  
Figure 3.6 SPI Read Status ............................................................................................................................27  
Figure 3.7 SPI Read Data...............................................................................................................................27  
Figure 3.8 I2C™ Command Request ..............................................................................................................28  
Figure 3.9 I2C™ Read Status..........................................................................................................................28  
Figure 3.10 I2C™ Read Data ............................................................................................................................29  
Figure 3.11 Memory Program Operation ..........................................................................................................30  
Figure 4.1 ZSSC3027 Pad Assignments ........................................................................................................43  
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List of Tables  
Table 1.1  
Table 1.2  
Table 1.3  
Table 1.4  
Table 2.1  
Table 2.2  
Table 2.3  
Table 2.4  
Table 2.5  
Table 2.6  
Table 2.7  
Maximum Ratings ............................................................................................................................6  
Operating Conditions .......................................................................................................................6  
Requirements for VDD Power-on Reset..........................................................................................7  
Electrical Parameters.......................................................................................................................7  
Amplifier Gain: Stage 1..................................................................................................................12  
Amplifier Gain: Stage 2..................................................................................................................12  
Gain Polarity ..................................................................................................................................13  
MSB/LSB Segmentation Settings for Bridge Measurement..........................................................14  
MSB/LSB Segmentation Settings for Temperature Measurement................................................14  
ADC Conversion Times for a Single A2D Conversion...................................................................14  
Typical Conversion Times vs. Noise Performance for 16-Bit Results with Full Sensor Signal  
Conditioning for AZBM, BM, AZTM, and TM.................................................................................15  
Table 2.8  
Table 3.1  
Table 3.2  
Table 3.3  
Table 3.4  
Table 3.5  
Table 3.6  
Table 3.7  
Table 3.8  
Table 4.1  
ADC Offset Settings for the Measurement Configuration Register BM_config.............................16  
SPI/I2C™ Commands ....................................................................................................................22  
Get_Raw Commands ....................................................................................................................23  
General Status Byte.......................................................................................................................24  
Status Byte for Read Operations...................................................................................................24  
Status Byte for Write Operations ...................................................................................................24  
Mode Status...................................................................................................................................25  
Memory Status Word.....................................................................................................................30  
MTP Memory Content Assignments..............................................................................................31  
Pad Assignments...........................................................................................................................43  
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1
IC Characteristics  
1.1. Absolute Maximum Ratings  
Note: The absolute maximum ratings are stress ratings only. The ZSSC3027 might not function or be operable  
above the recommended operating conditions. Stresses exceeding the absolute maximum ratings might also  
damage the device. In addition, extended exposure to stresses above the recommended operating conditions  
might affect device reliability. IDT does not recommend designing to the “Absolute Maximum Ratings.”  
Table 1.1 Maximum Ratings  
PARAMETER  
SYMBOL  
Vss  
Min  
0
TYP  
MAX  
0
UNITS  
Voltage Reference  
V
V
Analog Supply Voltage  
VDD  
-0.4  
3.63  
Voltage at all Analog and Digital IO Pins  
VA_IO, VD_IO  
IIN  
VHBM1  
TSTOR  
-0.5  
-100  
4000  
-50  
VDD+0.5  
100  
-
V
mA  
V
Input Current into any Pin Except SDA, CLK 1) and Supply Pins 2)  
Electrostatic Discharge Tolerance – Human Body Model (HBM1) 3)  
Storage Temperature  
125  
°C  
1)  
2)  
3)  
Latch-up current limit for SCLK/SCL and MOSI/SDA: ±70mA.  
Latch-up resistance; reference for pin is 0V.  
HBM1: C = 100pF charged to VHBM1 with resistor R = 1.5kin series based on MIL 883, Method 3015.7. ESD protection  
referring to the Human Body Model is tested with devices in ceramic dual in-line packages (CDIP) during product qualification.  
1.2. Operating Conditions  
The reference for all voltages is Vss.  
Table 1.2 Operating Conditions  
PARAMETER  
Supply Voltage  
SYMBOL  
VDD  
MIN  
TYP  
MAX  
3.6  
UNIT  
V
1.7  
-
VDD Rise Time  
tVDD  
200  
1.8  
μs  
Bridge Current  
IVDDB  
mA  
16.5  
85  
Operation Temperature Range—Standard  
TAMB  
CL  
-40  
-
°C  
nF  
External capacitance between VDDB and VSS  
0.01  
50  
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A dynamic power-on-reset circuit is implemented in order to achieve minimum current consumption in idle mode.  
The VDD low level and the subsequent rise time and VDD rising slope must meet the requirements in Table 1.1 to  
guarantee an overall IC reset; lower VDD low levels allow slower rising of the subsequent on-ramp of VDD. Other  
combinations might also be possible. For example, the reset trigger can be influenced by increasing the power-  
down time and lowering the VDD rising slope requirement.  
Table 1.3 Requirements for VDD Power-on Reset  
PARAMETER  
Power Down Time (duration of VDD Low Level)  
VDD Low Level  
SYMBOL  
tSPIKE  
MIN  
3
TYP  
MAX  
UNIT  
µs  
-
-
-
-
0.2  
-
VDDlow  
SRVDD  
0
V
VDD Rising Slope  
10  
V/ms  
1.3. Electrical Parameters  
All parameter values are valid only under the specified operating conditions. All voltages are referenced to Vss.  
Table 1.4 Electrical Parameters  
Note: See important table notes at the end of the table.  
Parameter  
Symbol  
Conditions/Comments  
Min  
Typ  
Max  
Unit  
Supply  
Bridge Supply Voltage,  
ADC Reference Voltage  
VDDB  
Internally generated  
1.60  
1.67  
1.74  
V
Active State, average  
Sleep State, idle current  
VDD = 1.8V  
930  
20  
1500  
250  
µA  
nA  
dB  
Current Consumption  
IVDD  
Power Supply Rejection  
17  
32  
20·log10(VDD/VDDB  
)
PSRVDD  
VDD,prog  
IVDD,prog  
VDD = 2V  
dB  
V
(see section 1.4)  
Memory Program Voltage  
Mean Program Current  
Required voltage level at VDD pin  
2.9  
3.6  
20  
Mean current consumption during  
multiple-time memory (MTP)  
programming cycle at VDD  
6
mA  
mA  
MTP program at VDD pin,  
dynamic switch-on current draw  
Peak Program Current  
Iprog,max  
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Parameter  
Symbol  
Conditions/Comments  
Min  
Typ  
Max  
Unit  
Analog-to-Digital Converter (ADC, A2D)  
Resolution  
rADC  
fADC  
10  
16  
Bit  
ADC Clock Frequency  
Internal ADC clock  
0.92  
1
1.08  
MHz  
VDDB  
Reference Voltage n  
Reference Voltage p  
Vrefn  
Vrefp  
See section 2.3.2.  
See section 2.3.2.  
0.03  
*
VDDB  
0.97  
*
Offset  
A2D_Offset  
INLADC  
8-step programmable offset  
Tested / verified within design  
Tested / verified within design  
1/16  
-4  
8/16  
+4  
Integral Nonlinearity (INL)  
Differential Nonlinearity  
-
-
LSB  
LSB  
DNLADC  
-1  
+1  
Conversion Rate, 16-Bit  
Single  
Conversions per second for single  
16-bit A2D conversion  
fS,raw  
6
-
355  
Hz  
Amplifier  
Gain  
Gamp  
Gerr  
32 steps  
13.2  
-2.5  
72  
Gain Error  
Referenced to nominal gain  
-
2.5  
%
Sensor Signal Conditioning Performance  
IC Accuracy Error 1)  
ErrA,IC  
Accuracy error for ideally linear  
sensor (temperature and  
measurand)  
0.01  
175  
%FSO  
Hz  
Conversion per second for fully  
corrected 16-bit measurement  
Conversion Rate, 16-Bit SSC fS, SSC  
3
Input  
Input Voltage Range  
Bridge Resistance  
Power-Up  
VINP, VINN  
Input voltage range at INP and INN  
0.65  
1
1.05  
50  
V
Full power supply disturbance  
rejection (PSRR) capabilities  
Reduced PSRR, but full  
functionality  
10  
kΩ  
RBR  
100  
999  
Ω
V
DD ramp up to interface  
tSTA1  
tSTA2  
tWUP1  
tWUP2  
1
ms  
ms  
ms  
ms  
communication (see section 3.1)  
Start-up Time  
Wake-up Time  
VDD ramp up to analog operation  
2.5  
0.5  
2
Sleep to Active State interface  
communication  
Sleep to Active State analog  
operation  
Oscillator  
Internal Oscillator Frequency  
fCLK  
3.7  
4
4.3  
MHz  
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April 20, 2016  
Parameter  
Symbol  
Conditions/Comments  
Min  
Typ  
Max  
Unit  
Internal Temperature Sensor  
For both temperature ranges:  
-40°C to +85°C  
Temperature Resolution  
0.003  
K/LSB  
Interface and Memory  
Maximum capacitance at MISO  
line: 40pF @ VDD=1.8V  
SPI Clock Frequency  
I²C™ Clock Frequency  
Program Time  
fC,SPI  
20  
3.4  
600  
MHz  
MHz  
µs  
fC,I2C  
MTP programming time per 16-bit  
register  
tprog  
500  
10  
Data Retention 2)  
tRET_MTP  
1000h @ 125°C  
a
1)  
2)  
Percentage referred to maximum full-scale output (FSO); e.g. for 16-bit measurements: ErrA,IC [%FSO] = 100 · MAX{ | ADCmeas – ADCideal | } / 216  
.
With maximum ambient temperature of 125°C.  
1.4. Power Supply Rejection Ratio (RSRR) vs. Frequency  
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April 20, 2016  
 
 
 
2 Circuit Description  
2.1. Brief Description  
The ZSSC3027 provides a highly accurate amplification of bridge sensor signals. The compensation of sensor  
offset, sensitivity, temperature drift, and non-linearity is accomplished via an 18-bit DSP core running a correction  
algorithm with calibration coefficients stored in a multiple-time programmable (MTP) memory (see section 2.4.2  
regarding limitations). The ZSSC3027 can be configured for a wide range of resistive bridge sensor types. A  
digital interface (SPI or I2C™*) enables communication. The ZSSC3027 supports two operational modes: Normal  
Mode and Command Mode. Normal Mode is the standard operating mode. Typically in Normal Mode, the  
ZSSC3027 wakes up from a Sleep State (low power), runs a measurement in Active State, and automatically  
returns to the Sleep State. (See section 3.3 for details on operational modes.)  
2.2. Signal Flow and Block Diagram  
See Figure 2.1 for the ZSSC3027 block diagram. The sensor bridge supply VDDB and the power supply for analog  
circuitry are provided by a voltage regulator, which is optimized for power supply disturbance rejection (PSRR).  
See section 1.4 for a graph of PSRR versus frequency. To improve noise suppression, the digital blocks are  
powered by a separate voltage regulator. A power supervision circuit monitors all supply voltages and generates  
appropriate reset signals for initializing the digital blocks.  
The state machine controls the analog circuitry to perform the three measurement types: bridge, temperature, and  
offset measurement. The multiplexer selects the signal input to the amplifier, which can be the external signals  
from the input pins INP and INN, the internal temperature reference sensor signals, or an input short for  
measuring offset. A full measurement request will trigger an automatic sequence of all measurement types and all  
input signals. The Temperature Reference Sensor block is based on a resistive sensing element.  
* I2C™ is a trademark of NXP.  
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April 20, 2016  
 
 
 
 
Figure 2.1 ZSSC3027 Functional Block Diagram  
VDDB  
Vreg int  
VDD  
VSS  
VTP  
Temperature  
Reference  
Sensor  
Voltage  
Regulator  
AGND / CM  
Generator  
Bias Current  
Generator  
VTN  
Power Ctr.  
ZSSC3027  
18-bit DSP Core  
(Calculations,  
Communication)  
A
EOC  
INP  
INN  
D
16 Bit  
Sensor  
Bridge  
Pre-  
Amplifier  
VSSB  
SCLK/SCL  
SS  
MOSI/SDA  
MISO  
SPI  
MTP  
System  
Control  
Unit  
Clock  
Generator  
I²CTM  
ROM  
Power-ON  
Reset  
Ring  
Oscillator  
SEL  
The amplifier consists of two stages with programmable gain values. The 1/f noise and inherent offset are  
suppressed by auto-zero and chopper stabilizer techniques. This auto-zero sequence is performed before each  
bridge sensor and temperature measurement to compensate for the inherent offset of the amplifier.  
The ZSSC3027 employs a 2-stage analog-to-digital converter (ADC) based on switched-capacitor technique with  
inherit low-pass behavior and noise suppression. The programmable resolution from 10 to 16 bits provides  
flexibility for adapting the conversion characteristics. To improve power supply noise suppression, the ADC uses  
the bridge supply VDDB as its reference voltage.  
The remaining IC-internal offset and the sensor element offset, i.e., the overall system offset for the amplifier and  
ADC, can be canceled by an offset and auto-zero measurement, respectively.  
The DSP accomplishes the auto-zero, span, and 1st and 2nd order temperature compensation of the measured  
bridge signal. The correction coefficients are stored in the MTP memory.  
The ZSSC3027 supports SPI and I2C™ interface communication for controlling the ZSSC3027, configuration, and  
measurement result output.  
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April 20, 2016  
 
2.3. Analog Front End  
2.3.1. Amplifier  
The amplifier has a differential architecture and consists of two stages. The amplification of each stage and the  
sensor bridge gain polarity are programmable via settings in the Measurement Configuration Register BM_config  
(address 10HEX; see section 3.6.3) in the MTP memory (see section 2.4.2). The first five bits of BM_config are the  
programmable gain settings Gain_stage1 and Gain_stage2. The options for the programmable gain settings are  
listed in Table 2.1 and Table 2.2.  
Table 2.1 Amplifier Gain: Stage 1  
Gain_stage1  
BM_config Bit G1  
BM_config Bit G0  
Stage 1 Gain Setting  
0
0
0
1
12  
20  
1
1
0
1
30  
40  
Table 2.2 Amplifier Gain: Stage 2  
Gain_stage2  
BM_config Bit G4  
BM_config Bit G3  
BM_config Bit G2  
Stage 2 Gain Setting  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1.1  
1.2  
1.3  
1.4  
1.5  
1.6  
1.7  
1.8  
If needed, the polarity of the sensor bridge gain can be reversed by setting the Gain_polarity bit, which is bit 5 in  
the BM_config register (see section 3.6.3). Changing the gain polarity is achieved by inverting the chopper clock.  
Table 2.3 gives the settings for the Gain_polarity bit. This feature enables applying a sensor to the ZSSC3027  
with swapped input signals at INN and INP; e.g., to avoid crossing wires for the final sensor module’s assembly.  
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Table 2.3 Gain Polarity  
Gain_polarity (BM_config Bit 5)  
Gain  
Setting Description  
0
1
+1  
-1  
No polarity change.  
Gain polarity is inverted.  
The inherent amplifier offset is suppressed by means of auto-zero and chopper techniques. The optimal gain (and  
offset) setup for a specific sensor element can be determined by these steps:  
1) Collect sensor elements’ characteristic, statistical data (over temperature, ambient sensor parameter, and  
over production tolerances):  
a. Minimum differential output voltage:  
b. Maximum differential output voltage:  
Vmin  
Vmax  
Note: The best possible setup can only be determined if the absolute value of Vmax is bigger than the  
absolute value of Vmin. If this is not the case, the gain polarity should be reversed.  
2) If Vmin and Vmax have different signs (normally: Vmax is positive and Vmin is negative), then the required  
ADC offset shift can be selected using this ratio: RatioOffset = |Vmin| / (Vmax – Vmin).  
In this case, the respective offset setup (A2D_offset) is the nearest integer of multiples of 1/16 in the  
range of 1/16 to 8/16 (see Table 2.8): A2D_offset = Round_to_x16th{RatioOffset}.  
3) Determine which of the two following cases is valid.  
a. If RatioOffset – A2D_offset 0 then calculate  
Theoretical optimum gain: Gainopt =(1 – A2D_offset) Vref / Vmax  
*
b. If RatioOffset – A2D_offset > 0 then calculate  
Theoretical optimum gain: Gainopt = A2D_offset Vref / |Vmin  
|
*
with:  
Vref = Vrefp – Vrefn = 0.94·VDDB,min 1.5V  
Finally, select the setup gain (Gainsetup) as the nearest gain to Gainopt, where Gainsetup Gainopt.  
2.3.2. Analog-to-Digital Converter  
A second-order charge-balancing analog-to-digital converter (ADC) is used to convert the amplifier signal. To  
allow optimizing the trade-off between conversion time and resolution, the conversion is split into a MSB coarse  
conversion and an LSB fine conversion. The final ADC resolution is determined by MSB + LSB. For the bridge  
measurement, the MSB-LSB segmentation is programmable via the Msb and Lsb settings in the BM_config  
register (10HEX; see section 3.6.3) stored in the MTP memory (see section 2.4.2). For the temperature  
measurement, the MSB-LSB segmentation is programmable via the Temp_ADC settings in the BM_config  
register.  
The conversion time is proportional to 2MSB +2LSB. During the MSB coarse conversion, the ADC input signal is  
sampled and integrated 2MSB times, resulting in inherit low-pass behavior and noise suppression. The longer the  
MSB coarse conversion is, the better the noise suppression is. Possible settings are listed below in Table 2.4 and  
Table 2.5.  
13  
April 20, 2016  
 
 
Table 2.4 MSB/LSB Segmentation Settings for Bridge Measurement  
Msb Setup Bits [7:6]  
in BM_config  
Number of MSB Coarse  
Conversion Bits  
Lsb Setup Bits [9:8]  
Number of LSB Fine  
Conversion Bits  
in BM_config  
00BIN  
01BIN  
10BIN  
11BIN  
10  
12  
14  
16  
00BIN  
01BIN  
10BIN  
11BIN  
0
2
4
6
Table 2.5 MSB/LSB Segmentation Settings for Temperature Measurement  
Temp_ADC Setup Bits  
[14:13] in BM_config  
Number of MSB Coarse  
Conversion Bits  
Number of LSB Fine  
Conversion Bits  
01BIN  
10BIN  
11BIN  
16  
10  
12  
0
6
4
Setup according to IDT configuration in reserved memory  
(recommended setup for best performance and speed trade-off)  
00BIN  
Table 2.6 gives the ADC conversion times for the MSB/LSB settings (yellow indicates 16-bit setups). Useful MSB/  
LSB setups are with LSB = 0 (MSB-only conversions) or combinations that result in MSB + LSB 16. Resolutions  
beyond 16-bit mainly digitize the collected front-end noise and typically do not improve the system performance.  
Table 2.6 ADC Conversion Times for a Single A2D Conversion  
MSB  
LSB  
Bridge or Temperature Measurement  
Conversion Time in µs (typical)  
[Bits]  
[Bits]  
10  
12  
14  
16  
10  
12  
14  
10  
12  
10  
0
0
0
0
2
2
2
4
4
6
1170  
4625  
18450  
73745  
1180  
4635  
18460  
1200  
4660  
1300  
14  
April 20, 2016  
 
 
 
Table 2.7 shows the trade-off between noise performance and typical conversion time for 16-bit results for a sig-  
nal that has been fully conditioned using 4 single measurements: the auto-zero bridge measurement (AZBM), the  
bridge measurement (BM), auto-zero temperature measurement (AZTM), and temperature measurement (TM).  
Table 2.7 Typical Conversion Times vs. Noise Performance for 16-Bit Results with Full Sensor Signal  
Conditioning for AZBM, BM, AZTM, and TM  
Note: The pink shading indicates IDT’s recommended ADC segmentation for temperature sensor measurement.  
ADC Segmentation:  
Temperature Sensor  
[MSB/LSB]  
Typical Measurement  
Duration, MEASURE, (ACHEX  
[ms]  
Typical 3-Sigma Noise for  
SSC-Corrected Output 1)  
[counts]  
ADC Segmentation: Bridge  
)
Sensor [MSB/LSB]  
10 / 6  
10 / 6  
10 / 6  
10 / 6  
12 / 4  
12 / 4  
12 / 4  
12 / 4  
16 / 0  
16 / 0  
16 / 0  
16 / 0  
10 / 6  
12 / 4  
14 / 2  
16 / 0  
10 / 6  
12 / 4  
14 / 2  
16 / 0  
10 / 6  
12 / 4  
14 / 2  
16 / 0  
5.8  
9.6  
7.4  
6.8  
6.6  
9.5  
7.3  
6.7  
6.3  
8.1  
6.6  
5.3  
5.2  
13.2  
43.0  
165  
13.2  
20.5  
50.5  
170.3  
162.6  
170.3  
200.3  
319.5  
1)  
Reference noise values were obtained with this setup: 17ksensor bridge, 25°C, Gain=54, ADC shift=-1/16 through 15/16 (see below), VDD=1.8V.  
The ADC offset is programmable in 8 steps so that the ADC input voltage range can be adapted to the voltage  
range at the input pins INP and INN. Possible ADC input voltages and references voltages Vrefn and Vrefp are  
shown in Figure 2.2, where VAGND VDDB/2. The ADC offset is controlled by the A2D_Offset setting bits [12:10] in  
the Measurement Configuration Register BM_config (10HEX; see section 3.6.3) in the MTP memory (see section  
2.4.2). The ADC offset settings are listed in Table 2.8. See section 1.4 for typical values for Vrefn and Vrefp  
.
15  
April 20, 2016  
 
 
Figure 2.2 ADC Offset  
ADCout  
1
VINP, A2D_Offset = 1/16  
VINN, A2D_Offset = 1/16  
8/16  
VINP, A2D_Offset = 8/16  
VINN, A2D_Offset = 8/16  
1/16  
VIN, VIP  
0
Vrefn  
VAGND  
Vrefp  
Table 2.8 ADC Offset Settings for the Measurement Configuration Register BM_config  
Z2  
Z1  
Z0  
ADC Differential Input Range/Vref  
Where Vref = Vrefp - Vrefn  
A2D_Offset  
(BM_config bit 12)  
(BM_config bit 11)  
(BM_config bit 10)  
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
-1/16 to 15/16  
-2/16 to 14/16  
-3/16 to 13/16  
-4/16 to 12/16  
-5/16 to 11/16  
-6/16 to 10/16  
-7/16 to 9/16  
-8/16 to 8/16  
1/16  
2/16  
3/16  
4/16  
5/16  
6/16  
7/16  
8/16  
16  
April 20, 2016  
 
 
2.3.3. Temperature Measurement  
The ZSSC3027 provides an internal temperature sensor measurement to allow compensation for temperature  
effects. See section 1.3 for the temperature sensor resolution. The temperature sensor uses bipolar transistors.  
Any transistor circuitry mismatch is suppressed by the dynamic element matching technique. The temperature  
output signal is a differential voltage that is adapted by the amplifier for the ADC input.  
For temperature measurements, the ADC offset and amplifier gain setting are defined by IDT. The ADC MSB/LSB  
segmentation is programmable by the user for optimizing noise immunity or conversion time (see section 2.3.2).  
2.3.4. Bridge Supply  
The ZSSC3027 provides dedicated bridge supply pins VDDB and VSSB. The ADC reference voltages for the  
sensor bridge measurement are derived from these internal voltages so that bridge supply disturbances are  
suppressed. The current drive ability of VDDB is limited (see IVDDB in section 1.2).  
2.4. Digital Section  
2.4.1.  
Digital Signal Processor (DSP) Core  
The DSP Core block performs the algorithm for correcting the sensor signal. The resulting coefficients are stored  
in the MTP memory. When the measurement results are available, the "end of conversion" signal is set at the  
EOC pin. The internal EOC information is valid only if both the measurement and calculation have been  
completed.  
2.4.2.  
MTP Memory  
The ZSSC3027’s memory is designed with an OTP (one-time programmable) structure. The memory is organized  
in 4 one-time programmable pages. When data in the currently valid memory page needs to be updated, normally  
a new page must be selected by increasing the page counter and the whole memory content must be written in its  
updated version. The user has access to a 24 x 16 bit storage area for values such as calibration coefficients.  
Dedicated calibration values are stored in an area not accessible to the user. The required programming voltage  
is generated internally in the ZSSC3027 whereas increased ZSSC3027 power supply requirements must be  
fulfilled during programming (see Memory Programming Voltage in section 1.3). There is no over-write or erase  
function for the MTP memory. See section 3.4.1 for further details.  
The physical memory function is such that each single bit that has not yet been set to 1 (i.e., remains 0) can still  
be changed to 1, so it is possible to (partially) re-program an MTP register as shown in the following example:  
Assume MTP address 11HEX was written with 8421HEX which is 1000 0100 0010 0001BIN.  
Changing the register contents to A6A7HEX (i.e., 1010 0110 1010 0111binary) can be achieved by either  
writing A6A7HEX (any already written bit will be ignored automatically) or just writing the difference  
compared to 8421HEX, which is 2286HEX  
The content of a re-written register can generally be determined by  
contentRegister = contentold (BITWISE_OR) contentnew  
.
.
If contentRegister equals contentnew, a re-write is possible; e.g., this is not the case for contentold = FFFFHEX and  
contentnew FFFFHEX. Depending on the former and the newly intended MTP addresses and register contents, a  
re-programming could be possible.  
17  
April 20, 2016  
 
 
 
 
 
2.4.3.  
Clock Generator  
The clock generator, implemented as a ring oscillator, provides a 4MHz clock signal. The frequency is trimmed  
during production test.  
2.4.4.  
Power Supervision  
The power supervision block as a part of the voltage regulator combined with the digital section monitors all  
power supplies to ensure a defined reset of all digital blocks during power-up or power supply interruptions.  
2.4.5.  
Interface  
The ZSSC3027 can communicate with the user’s PC via an SPI or I2C™ interface . The interface type is select-  
able via the voltage level on the SEL pin:  
SEL = 0 -> SPI Mode  
SEL = 1 -> I2C™ Mode  
If the SEL pin is not connected, I²C™ communication will be selected (IC-internal pull-up at SEL pin). The SPI-  
specific pins (SS, MISO) do not need to be connected for I²C™ operation.  
To also provide interface accessibility in Sleep State (all features inactive except for the digital interface logic), the  
interface circuitry is directly supplied by VDD.  
† Functional I2C™ interface properties correspond to the NXP I²C™ bus specification Rev. 0.3 (June 2009).  
18  
April 20, 2016  
 
 
 
 
3
Functional Description  
3.1.  
Power Up  
Specifications for this section are given in sections 1.2 and 1.3. On power-up, the ZSSC3027 communication  
interface is able to receive the first command after a time tSTA1 from when the VDD supply is within operating  
specifications. The ZSSC3027 can begin the first measurement after a time of tSTA2 from when the VDD supply is  
operational. The wake up time from Sleep State to Active State (see section 3.3) after receiving the activating  
command is defined as tWUP1 and tWUP2 (see section 1.3). In Command Mode, subsequent commands can be sent  
after tWUP1. The first measurement starts after tWUP2 if a measurement request was sent.  
3.2.  
Measurements  
Available measurement procedures are  
AZBM: auto-zero bridge measurement  
BM: bridge measurement  
AZTM: auto-zero temperature measurement  
TM: temperature measurement  
AZBM: The configuration for bridge measurements is loaded. The Multiplexer block connects the amplifier input  
to the AGND analog ground reference. An analog-to-digital conversion is performed so that the inherent system  
offset for the bridge configuration is converted by the ADC to a 16-bit digital word.  
BM: The configuration for bridge measurements is loaded. The Multiplexer connects the amplifier input to the  
bridge pins INP and INN. An analog-to-digital conversion is performed. The result is a 16-bit digital word.  
AZTM: The configuration for temperature measurements is loaded. The Multiplexer connects the amplifier input to  
AGND. An analog-to-digital conversion is performed so that the inherent system offset for the temperature  
configuration is converted by the ADC to a 16-bit digital word.  
TM: The configuration for temperature measurements is loaded. The Multiplexer connects the Amplifier input to  
the internal temperature sensor. An analog-to-digital conversion is performed. The result is a 16-bit digital word.  
The typical application’s measurement cycle is a complete SSC measurement (using the command ACHEX) with  
AZBM, BM, AZTM, and TM followed by a signal correction calculation.  
3.3.  
Operational Modes  
Figure 3.1 illustrates the ZSSC3027 power-up sequence and subsequent operation depending on the selected  
interface communication mode (I2C™ or SPI) as determined by the SEL pin voltage level (see section 2.4.5). With  
either interface, after the voltage regulators are switched on, the ZSSC3027’s low voltage section (LV) is active  
while the related interface configuration information is read from memory. Then the LV section is switched off, the  
ZSSC3027 goes into Sleep State, and the interface is ready to receive commands. Since the interface is always  
powered by VDD, it is referred to as the high voltage section (HV).  
See Table 3.1 for definitions of the commands. Figure 3.2 shows the ZSSC3027 operation in Normal Mode and  
Command Mode including when the LV and HV sections are active as indicated by the color legend.  
19  
April 20, 2016  
 
 
 
 
The Normal Mode automatically returns to Sleep State after executing the requested measurements. In  
Command Mode, the ZSSC3027 remains active if a dedicated command (Start_NOM) was sent, which is helpful  
during calibration. Command Mode can only be entered if Start_CM is the first command received after POR.  
Figure 3.1 Operational Flow Chart: Power Up  
IC Power On  
I2CInterface  
SPI Interface  
IO_mode = I2CTM  
yes (I2CTM  
)
SEL==1  
no (SPI)  
IO_mode = SPI  
Command: load IC-I²C Addr.  
Power up LV  
Switch off pull-up at SEL  
Command: load I/O setup  
Power up LV  
LV Operation  
Save: IC I²C Address /  
Data / Status  
LV Operation  
CommandMode  
==active  
Save: Setup / Data /  
Status  
yes  
no  
Power down (switch  
off LV and wait for  
command)  
CommandMode  
==active  
yes  
no  
no  
Power down (switch  
off LV and wait for  
command)  
Receive: Command  
Received I²C  
Slave_Addr == IC I²C  
Slave_Addr  
no  
no  
no  
yes  
SS == 1  
Read_bit == 1  
(Data fetch)  
yes  
Receive: Command  
yes  
Execute: Data Fetch  
Received CMD ==  
Read_DF  
yes  
Color Legend:  
Execute: Data Fetch  
LV-Operation  
HV-Operation  
20  
April 20, 2016  
 
Figure 3.2 Operational Flow Chart: Command Mode and Normal Mode  
Start LV  
Get command from HV  
CM active  
CMD==Start_CM  
yes  
Receive: Command  
INVALID_CMD  
Case (Command)  
no  
Start_NOM  
Case (Command)  
REGULAR_CMD  
CM inactive  
INVALID_CMD  
REGULAR_CMD  
Execute: Command  
Execute: Command  
Color Legend:  
LV Operation  
HV Operation  
End LV  
Command Mode  
Sleep Mode  
3.4. Command Interpretation  
3.4.1.  
SPI/I2C™ Commands  
The user-accessible section of memory includes addresses 00HEX through 17HEX in the OTP memory that is  
designated by the user memory page pointer. Because each of the four OTP memory pages cannot be rewritten  
or erased, the memory page pointer must be incremented to the next OTP memory page in order to write to  
memory again (see Table 3.1 for the command). After all four user-accessible OTP memory pages have been  
used, further write operations are not possible and the “Memory Full” bit is returned as set in the status byte after  
write operations (see section 3.5.1).  
21  
April 20, 2016  
 
 
 
The SPI/I2C™ commands supported by the ZSSC3027 are listed in Table 3.1. The command to read an address  
in the user memory is the same as its address. The command to read the 16-bit memory status of the data at an  
address in user memory is the address plus 20HEX. The command to write to an address in user memory is the  
address plus 40HEX  
.
There is a IDT-reserved section of memory that can be read but not over-written by the user.  
Table 3.1 SPI/I2C™ Commands  
Note: Every return starts with a status byte followed by the data word as described in section 3.5.1.  
Command  
(Byte)  
Normal  
Mode  
Command  
Mode  
Return  
16-bit user data  
Description  
00HEX to 17HEX  
Read data in the user memory address  
(00HEX to 17HEX) matching the command  
(might not be using all addresses).  
yes  
yes  
20HEX to 37HEX  
16-bit user memory status  
Read memory status for address specified by  
command minus 20HEX (addresses 00HEX to  
17HEX respectively; see section 3.6.2 for a  
description of the memory status).  
yes  
no  
no  
no  
yes  
40HEX to 57HEX  
followed by data  
(0000HEX to  
Write data to user memory at address  
specified by command minus 40HEX  
(addresses 00HEX to 17HEX respectively; might  
not be using all addresses).  
yes  
yes  
yes  
FFFFHEX  
)
70HEX to 7EHEX  
16-bit IDT-reserved memory Read data in IDT-reserved memory at  
data  
address specified by command minus 70HEX  
(second set of addresses 00HEX to 0EHEX  
respectively).  
80HEX to 8EHEX  
16-bit IDT-reserved memory Read memory status bytes for IDT-reserved  
status  
memory data at address specified by  
command minus 80HEX (second set of  
addresses 00HEX to 0EHEX respectively; see  
section 3.6.2 for a description of the memory  
status bytes).  
5EHEX  
Increment user memory page pointer.  
no  
yes  
yes  
Get_Raw This command can be used to  
perform a measurement and write the raw  
ADC data into the output register. The LSB of  
the command determines how the AFE  
configuration register is loaded for the  
Get_Raw measurement (see Table 3.2).  
A0HEX to A7HEX  
followed by  
XXXXHEX  
16-bit wide raw data  
yes  
(see Table 3.2)  
Start_NOM Exit Command Mode and  
transition to Normal Mode.  
A8HEX  
A9HEX  
no  
yes  
no  
Start_CM Exit Normal Mode and transition  
yes  
to Command Mode.  
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April 20, 2016  
 
Command  
(Byte)  
Normal  
Mode  
Command  
Mode  
Return  
Description  
Write_ChecksumC If not yet written, the  
checksum for the valid user MTP page is cal-  
culated and written to MTP.  
AAHEX  
no  
yes  
Measure Triggers full measurement cycle  
(AZBM, BM, AZTM, and TM, as described in  
section 3.2) and calculation and storage of  
data in interface (configurations from MTP).  
ACHEX  
16-bit fully corrected bridge  
measurement data + 16-bit  
corrected internal  
yes  
yes  
yes  
temperature  
NOP Only valid for SPI (see 3.5.1 and 3.5.2).  
FXHEX  
Status followed by last data  
yes  
Table 3.2 Get_Raw Commands  
Command  
Measurement  
AFE Configuration Register  
A0HEX followed by 0000HEX  
A1HEX followed by ssssHEX  
BM – Bridge Measurement  
BM – Bridge Measurement  
BM_Config  
ssss is the user’s configuration setting for the measure-  
ment provided via the interface. The format and pur-  
pose of configuration bits must be according to the  
definitions for BM_Config.  
A2HEX followed by 0000HEX  
A3HEX followed by ssssHEX  
BM-AZBM – Auto-Zero Corrected  
Bridge Measurement 1)  
BM_Config  
BM-AZBM – Auto-Zero Corrected  
Bridge Measurement 2)  
ssss is the user’s configuration setting for the measure-  
ment provided via the interface. The format and pur-  
pose of configuration bits must be according to the  
definitions for BM_Config.  
A4HEX followed by 0000HEX  
A5HEX followed by ssssHEX  
TM – Temperature Measurement  
TM – Temperature Measurement  
IDT-defined register  
ssss is the user’s configuration setting for the measure-  
ment provided via the interface. The format and pur-  
pose of configuration bits must be according to the  
definitions for BM_Config being valid for temperature  
measurement in this case (bits [15:13] will be ignored).  
A6HEX followed by 0000HEX  
A7HEX followed by ssssHEX  
TM-AZTM – Auto-Zero Corrected  
Temperature Measurement 1)  
IDT-defined register  
TM-AZTM – Auto-Zero Corrected  
Temperature Measurement 2)  
ssss is the user’s configuration setting for the measure-  
ment provided via the interface. The format and pur-  
pose of configuration bits must be according to the  
definitions for BM_Config being valid for temperature  
measurement in this case (bits [15:13] will be ignored).  
1)  
2)  
Recommended for raw data collection during calibration coefficient determination using measurement setups pre-programmed in MTP.  
Recommended for raw data collection during calibration coefficient determination using un-programmed (i.e., not in MTP), external measurement  
setups; e.g., for evaluation purposes.  
23  
April 20, 2016  
 
 
 
3.5.  
Communication Interface  
Common Functionality  
3.5.1.  
Commands are handled by the command interpreter in the low-voltage (LV) section. Commands that need  
additional data are not treated differently than other commands because the high-voltage (HV) interface is able to  
buffer the command and all the data that belongs to the command and the command interpreter is activated as  
soon as a command byte is received.  
Every response starts with a status byte followed by the data word. The data word depends on the previous  
command. It is possible to read the same data more than once if the read request is repeated (I2C™) or a NOP  
command is sent (SPI). If the next command is not a read request (I²C™) or a NOP (SPI), it invalidates any  
previous data.  
The status byte contains the following bits (see Table 3.3, Table 3.4, and Table 3.5 for sequence):  
Power indication (bit 6): 1 if the device is powered (VDDB on); 0 if not powered. This is needed for SPI Mode  
where the master reads all zeros if the device is not powered or in power-on reset (POR).  
Busy indication (bit 5): 1 if the device is busy, which indicates that the data for the last command is not  
available yet. No new commands are processed if the device is busy.  
Actual ZSSC3027 mode (bits 4:3): 00 = Normal Mode; 01 = Command Mode; 1X = IDT-reserved.  
Memory integrity/error flag (bit 2): 0 if integrity test passed, 1 if test failed. This bit indicates whether the  
checksum-based integrity check passed or failed. Correctable errors are not reported but can be queried  
with the memory status commands (see section 3.6.2). The memory error status bit is calculated only  
during the power-up sequence, so a newly written CRC will only be used for memory verification and status  
update after a subsequent ZSSC3027 power-on reset (POR).  
Data transfer/correction (bit 1): If the last command was a memory write, this bit is 0 if the last memory  
write was successful (memory not full yet); otherwise it is 1 (e.g., page increase but already on last MTP  
page). If the last command was a memory read, this bit is 1 if the data was corrected.  
Table 3.3 General Status Byte  
Bit  
7
6
5
4
3
2
1
0
Meaning  
0
Powered?  
Busy?  
Mode  
Memory error?  
Internal data  
transfer  
Special  
Table 3.4 Status Byte for Read Operations  
Bit  
7
6
5
4
3
2
1
0
Meaning  
0
Powered?  
Busy?  
Mode  
Memory error?  
Data corrected?  
ALU saturation?  
Table 3.5 Status Byte for Write Operations  
Bit  
7
6
5
4
3
2
1
0
Meaning  
0
Powered?  
Busy?  
Mode  
Memory error?  
Memory full?  
Don’t care  
MTP write reject?  
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April 20, 2016  
 
 
 
 
 
Table 3.6 Mode Status  
Status[4:3]  
Mode  
00  
01  
10  
Normal Mode  
Command Mode  
IDT-Reserved  
11  
Command Mode and Reserved  
Further status information is provided by the EOC pin. The EOC pin is set when a measurement and calculation  
have been completed.  
3.5.2.  
SPI  
The SPI Mode is available when the SEL pin = 0. The polarity and phase of the SPI clock are programmable via  
the CKP_CKE setting in address 02HEX as described in Table 3.8. CKP_CKE is two bits: CPHA (bit 10), which  
selects which edge of SCLK latches data, and CPOL (bit 11), which indicates whether SCLK is high or low when it  
is idle. The polarity of the SS signal and pin are programmable via the SS_polarity setting (bit 9). The different  
combinations of polarity and phase are illustrated in the figures below.  
Figure 3.3 SPI Configuration CPHA=0  
CPHA=0  
SCLK (CPOL=0)  
SCLK (CPOL=1)  
MOSI  
MISO  
MSB  
MSB  
Bit6  
Bit6  
Bit5  
Bit5  
Bit4  
Bit4  
Bit3  
Bit3  
Bit2  
Bit2  
Bit1  
Bit1  
LSB  
LSB  
/SS  
SAMPLE  
25  
April 20, 2016  
 
 
 
Figure 3.4 SPI Configuration CPHA=1  
CPHA=1  
SCLK (CPOL=0)  
SCLK (CPOL=1)  
MOSI  
MISO  
MSB  
MSB  
Bit6  
Bit6  
Bit5  
Bit5  
Bit4  
Bit4  
Bit3  
Bit3  
Bit2  
Bit2  
Bit1  
Bit1  
LSB  
LSB  
/SS  
SAMPLE  
In SPI mode, each command except NOP is started as shown in Figure 3.5. After the execution of a command  
(busy = 0), the expected data can be read as illustrated in Figure 3.6 or if no data are returned by the command,  
the next command can be sent. The status can be read at any time with the NOP command (see Figure 3.7).  
Figure 3.5 SPI Command Request  
Command Request  
Command  
other than  
NOP  
CmdDat  
<15:8>  
CmdDat  
<7:0>  
MOSI  
MISO  
Status  
Data  
Data  
Note: A command request always consists of 3 bytes. If the command is shorter, then it must be completed with 0s.  
The data on MISO depend on the preceding command.  
26  
April 20, 2016  
 
 
Figure 3.6 SPI Read Status  
Read Status  
Command  
MOSI  
= NOP  
MISO  
Status  
Figure 3.7 SPI Read Data  
Read Data  
(a) Example: after the completion of a Memory Read command  
Command  
= NOP  
MOSI  
MISO  
00HEX  
00HEX  
MemDat  
<15:8>  
MemDat  
<7:0>  
Status  
(b) Example: after the completion of a Full Measurement command (ACHEX  
)
Command  
= NOP  
MOSI  
MISO  
00HEX  
00HEX  
00HEX  
00HEX  
BridgeDat BridgeDat TempDat  
<15:8> <7:0> <15:8>  
TempDat  
<7:0>  
Status  
27  
April 20, 2016  
 
 
3.5.3.  
I2C™  
I2C Mode is selected by the SEL pin = 1. In I2C Mode, each command is started as shown in Figure 3.8. Only the  
number of bytes that is needed for the command must be sent. An exception is the HS-mode where 3 bytes must  
always be sent as in SPI Mode. After the execution of a command (busy = 0), the expected data can be read as  
illustrated in Figure 3.10 or if no data are returned by the command, the next command can be sent. The status  
can be read at any time as described in Figure 3.9.  
Figure 3.8 I2C™ Command Request  
Command Request (I2CWrite)  
from master to slave  
from slave to master  
S
P
A
N
START condition  
STOP condition  
acknowledge  
S
SlaveAddr  
0
A
Command A P  
write  
0
CmdDat  
<15:8>  
CmdDat  
<7:0>  
S
SlaveAddr  
A
Command  
A
A
A P  
not acknowledge  
write  
Figure 3.9 I2C™ Read Status  
Read Status (I2CRead)  
S
SlaveAddr  
1
A
Status  
N P  
read  
28  
April 20, 2016  
 
 
 
Figure 3.10 I2C™ Read Data  
Read Data (I2CRead)  
(a) Example: after the completion of a Memory Read command  
MemDat  
<15:8>  
MemDat  
<7:0>  
S
SlaveAddr  
1
A
Status  
A
A
N P  
read  
(b) Example: after the completion of a Full Measurement command (ACHEX  
)
BridgeDat  
<15:8>  
BridgeDat  
<7:0>  
TempDat  
<15:8>  
TempDat  
<7:0>  
S
SlaveAddr  
1
A
Status  
A
A
A
A
N P  
read  
All mandatory I²C-bus protocol features are implemented. Optional features like clock stretching, 10-bit slave  
address, etc., are not supported by the ZSSC3027’s interface.  
In I²C-High-Speed Mode, a command consists of a fixed length of three bytes.  
3.6.  
Memory  
In the ZSSC3027, the memory is organized page-wise and can be programmed multiple (4) times (MTP). Each  
register can only be programmed once per page. The valid page is determined by the page counter which can be  
incremented with the command 5EHEX – this leads to a “reset” of all registers and a re-programming is necessary.  
Increasing the customer page counter will disable all old register contents of the former page. It is possible to  
(re-)program a total of 4 pages. Resetting the page counter is not possible. The page counter starts with 0 and  
can be incremented to a maximum of 3. If the 4th memory page has been used, no further changes in the memory  
are possible – careful writing and page incrementing is strongly recommended. There are two MTP page types:  
Customer Page: Accessible by means of regular write operations (40HEX to 57HEX). It contains the customer  
ID, interface setup data, measurement setup information, and calibration coefficients, etc.  
IDT Page:  
Only accessible for write operations by IDT. The IDT page contains specific trim  
information and is programmed during manufacturing test by IDT.  
29  
April 20, 2016  
 
 
3.6.1.  
Programming Memory  
Programming memory requires a specific supply voltage level (>2.9V) at the VDD pin (see section 1.3 for  
specifications). The MTP programming voltage itself is generated by means of an implemented charge pump,  
generating an internal memory programming voltage (VPP); no additional, external voltage, other than VDD  
needed. The program timing is shown in Figure 3.11. Supplying the ZSSC3027 with VDD>2.9V during memory  
programming is required. After the memory is programmed, it must be read again to verify the validity of the  
memory contents.  
Figure 3.11 Memory Program Operation  
command  
VPP  
Start_CM  
MemWr  
MemWr  
MemWr  
MemRd  
tVPP  
tVPP  
MemWr memory write customer address  
MemRd memory read customer address  
3.6.2.  
Memory Status Commands  
The 16-bit memory status answer for the commands 20HEX to 37HEX and 80HEX to 8EHEX contains the following  
information:  
One bit indicating if the data read was corrected.  
Two bits indicating the current page in use.  
Table 3.7 Memory Status Word  
Bit  
Description  
15 (MSB)  
Data was corrected (0: no, 1: yes)  
Current page  
14  
13  
12:0  
Undefined – do not use  
30  
April 20, 2016  
 
 
 
 
3.6.3.  
Memory Contents  
Table 3.8 MTP Memory Content Assignments  
MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
Customer ID byte 0 (combines with memory word  
01HEX to form customer ID)  
00HEX  
15:0  
15:0  
0000HEX  
0000HEX  
Cust_ID0  
Customer ID byte 1 (combines with memory word  
00HEX to form customer ID)  
01HEX  
Cust_ID1  
Interface Configuration  
I²C™ slave address; valid range: 00HEX to 7FHEX  
(default: 00HEX  
)
6:0  
8:7  
000 0000BIN Slave_Addr  
Note: address codes 04HEX to 07HEX are reserved for  
entering the I2C™ High Speed Mode.  
00BIN  
-
Reserved  
Determines the polarity of the Slave Select pin (SS)  
for SPI operation:  
0 Slave Select is active low (SPI and  
ZSSC3027 are active if SS==0)  
9
0BIN  
SS_polarity  
1 Slave Select is active high (SPI and  
ZSSC3027 are active if SS==1)  
02HEX  
Clock polarity and clock-edge select—determines  
polarity and phase of SPI interface clock with the  
following modes:  
00 SCLK is low in idle state, data latch with  
rising edge and data output with falling edge  
11:10  
15:12  
00BIN  
CKP_CKE  
01 SCLK is low in idle state, data latch with  
falling edge and data output with rising edge  
10 SCLK is high in idle state, data latch with  
falling edge and data output with rising edge  
11 SCLK is high in idle state, data latch with  
rising edge and data output with falling edge  
-
Not assigned  
31  
April 20, 2016  
 
 
MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
Signal Conditioning Parameters  
Bridge offset, bit[16]—functions as the MSB and  
combines with Offset_B[15:0] in 05HEX to form the  
17-bit coefficient’s absolute value  
0
1
2
3
0BIN  
Offset_B[16]  
Sign for sensor bridge offset (Offset_B):  
0 => a positive value or  
0BIN  
Offset_B_sign  
Gain_B[16]  
1 => a negative value  
Bridge gain, bit[16] —functions as the MSB and  
combines with Gain_B[15:0] in 06HEX to form the  
17-bit coefficient’s absolute value  
0BIN  
Sign of the sensor bridge gain (Gain_B):  
0 => a positive value or  
0BIN  
Gain_B_sign  
1 => a negative value  
1st-order temperature coefficient of the bridge gain,  
bit[16] —functions as the MSB and combines with  
Tcg[15:0] in 07HEX to form the 17-bit coefficient’s  
absolute value  
4
5
6
7
8
0BIN  
0BIN  
0BIN  
0BIN  
0BIN  
Tcg[16]  
Sign of 1st-order temperature coefficient (Tcg):  
0 => a positive value or  
Tcg_sign  
Tco[16]  
1 => a negative value  
1st-order temperature coefficient of the bridge offset,  
bit[16] —functions as the MSB and combines with  
Tco[15:0] in 08HEX to form the 17-bit coefficient’s  
absolute value  
03HEX  
Sign of 1st-order temperature coefficient (Tco):  
0 => a positive value or  
Tco_sign  
SOT_tco[16]  
1 => a negative value  
2nd-order temperature coefficient of the bridge offset,  
bit[16] —functions as the MSB and combines with  
SOT_tco[15:0] in 09HEX to form the 17-bit  
coefficient’s absolute value  
Separate sign setting for 2nd-order temperature  
coefficient (SOT_tco):  
9
0BIN  
0BIN  
0BIN  
SOT_tco_sign  
SOT_tcg[16]  
SOT_tcg_sign  
0 => a positive value or  
1 => a negative value  
2nd-order temperature coefficient of the bridge gain,  
bit[16] —functions as the MSB and combines with  
SOT_tcg[15:0] in 0AHEX to form the 17-bit  
coefficient’s absolute value  
10  
11  
Separate sign setting for 2nd-order temperature  
coefficient (SOT_tcg):  
0 => a positive value or  
1 => a negative value  
32  
April 20, 2016  
MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
2nd-order coefficient of the bridge signal, bit[16] —  
functions as the MSB and combines with  
SOT_bridge[15:0] in 0BHEX to form the 17-bit  
coefficient’s absolute value  
12  
0BIN  
SOT_bridge[16]  
Separate sign setting for 2nd-order bridge coefficient  
(SOT_bridge):  
13  
14  
0BIN  
SOT_bridge_sign  
SOT_curve  
0 => a positive value or  
1 => a negative value  
Type of second-order curve correction for the bridge  
sensor signal.  
0BIN  
0 parabolic curve  
1 s-shaped curve  
Separate sign setting for T_SETL:  
0 => a positive value or  
15  
0
0BIN  
TSETL_sign  
Gain_T[16]  
1 => a negative value  
Temperature gain of temperature sensor, bit[16] —  
functions as the MSB and combines with  
Gain_T[15:0] in 0DHEX to form the 17-bit coefficient’s  
absolute value  
0BIN  
Separate sign setting for the temperature gain  
(Gain_T):  
1
2
3
4
0BIN  
0BIN  
0BIN  
0BIN  
Gain_T_sign  
SOT_T[16]  
0 => a positive value or  
1 => a negative value  
2nd-order temperature coefficient of temperature  
sensor, bit[16] — functions as the MSB and  
combines with SOT_T[15:0] in 0EHEX to form the  
17-bit coefficient’s absolute value  
Separate sign setting for 2nd-order temperature  
coefficient (SOT_T):  
04HEX  
SOT_T_sign  
Offset_T[16]  
0 => a positive value or  
1 => a negative value  
Temperature offset of temperature sensor, bit[16] —  
functions as the MSB and combines with  
Offset_T[15:0] in 0CHEX to form the 17-bit  
coefficient’s absolute value  
Separate sign setting for the temperature offset  
(Offset_T):  
5
0BIN  
Offset_T_sign  
-
0 => a positive value or  
1 => a negative value  
0000000000BIN  
15:6  
Not assigned  
33  
April 20, 2016  
MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
Bits [15:0] of the bridge offset correction coefficient,  
which is an 18-bit wide absolute value (the  
respective MSBs Offset_B[16] and sign,  
Offset_B_sign, are under bits[1:0] in 03HEX  
)
Valid settings:  
[-1/16 to 15/16] = 7000HEX  
[-2/16 to 14/16] = 6000HEX  
[-3/16 to 13/16] = 5000HEX  
[-4/16 to 12/16] = 4000HEX  
[-5/16 to 11/16] = 3000HEX  
[-6/16 to 10/16] = 2000HEX  
[-7/16 to 9/16] = 1000HEX  
[-8/16 to 8/16] = 0000HEX  
05HEX  
15:0  
0000HEX  
Offset_B[15:0]  
Bits[15:0] of 17-bit wide absolute value of the bridge  
gain coefficient (the respective MSBs, Gain_B[16]  
06HEX  
07HEX  
08HEX  
09HEX  
0AHEX  
0BHEX  
15:0  
15:0  
15:0  
15:0  
15:0  
15:0  
0000HEX  
0000HEX  
0000HEX  
0000HEX  
0000HEX  
0000HEX  
Gain_B[15:0]  
Tcg[15:0]  
and sign, Gain_B_sign, are under bits[3:2] in 03HEX  
)
Coefficient for temperature correction of the bridge  
gain term (the respective MSBs, Tcg[16] and sign,  
Tcg_sign, are under bits[5:4] in 03HEX  
)
Coefficient for temperature correction of the bridge  
Tco[15:0]  
offset term (the respective MSBs, Tco[16] and sign,  
Tco_sign, are under bits[7:6] in 03HEX  
)
2
nd order term applied to Tco (the respective MSBs,  
SOT_tco[16] and sign, SOT_tco_sign, are under  
bits[9:8] in 03HEX  
SOT_tco[15:0]  
SOT_tcg[15:0]  
SOT_bridge[15:0]  
)
2
nd order term applied to Tcg (the respective MSBs,  
SOT_tcg[16] and sign, SOT_tcg_sign, are under  
bits[11:10] in 03HEX  
)
2nd order term applied to the sensor bridge readout  
(the respective MSBs, SOT_bridge[16] and sign,  
SOT_bridge_sign are under bits[13:12] in 03HEX  
)
Bits [15:0] of the temperature offset correction  
coefficient (the respective MSBs, Offset_T[16] and  
sign, Offset_T_sign, are under bits[5:4] in 04HEX  
)
Valid settings:  
[-1/16 to 15/16] = 7000HEX  
[-2/16 to 14/16] = 6000HEX  
[-3/16 to 13/16] = 5000HEX  
[-4/16 to 12/16] = 4000HEX  
[-5/16 to 11/16] = 3000HEX  
[-6/16 to 10/16] = 2000HEX  
[-7/16 to 9/16] = 1000HEX  
[-8/16 to 8/16] = 0000HEX  
0CHEX  
15:0  
0000HEX  
Offset_T[15:0]  
34  
April 20, 2016  
MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
Bits [15:0] of the absolute value of the temperature  
gain coefficient (the respective MSBs, Gain_T[16]  
and sign, Gain_T_sign, are under bits[1:0] in 04HEX  
0DHEX  
15:0  
0000HEX  
Gain_T[15:0]  
)
2
nd order term applied to the temperature reading  
(the respective MSBs, SOT_T[16] and sign,  
SOT_T_sign, are under bits[3:2] in 04HEX  
0EHEX  
0FHEX  
15:0  
15:0  
0000HEX  
0000HEX  
SOT_T[15:0]  
T_SETL  
)
Stores raw temperature reading at the temperature  
at which low calibration points were taken  
Measurement Configuration Register (BM_config)  
Gain setting for the 1st PREÀMP stage with  
Gain_stage1:  
00 12  
01 20  
10 30  
11 40  
1:0  
00BIN  
Gain_stage1  
Gain setting for the 2nd PREAMP stage with  
Gain_stage2:  
000 1.1  
001 1.2  
010 1.3  
011 1.4  
100 1.5  
101 1.6  
110 1.7  
111 1.8  
4:2  
000BIN  
Gain_stage2  
10HEX  
Set up the polarity of the sensor bridge’s gain  
(inverting of the chopper) with  
5
0BIN  
Gain_polarity  
0 positive (no polarity change)  
1 negative (180° polarity change)  
Absolute number of bits for the MSB conversion in  
the ADC with Msb:  
00BIN  
00 10-bit  
01 12-bit  
10 14-bit  
11 16-bit  
7:6  
Msb  
(11BIN  
)
35  
April 20, 2016  
MTP  
Address  
Word / Bit  
Range  
Default  
Setting  
Description  
Notes / Explanations  
Absolute number of bits for the LSB conversion in  
the ADC with Lsb:  
00 0-bit (single-stage ADC)  
01 2-bit  
9:8  
00BIN  
Lsb  
10 4-bit  
11 6-bit  
ADC offset and resulting A2D input range [Vref] with  
A2D_Offset:  
000 1/16 results in range [-1/16, 15/16]  
001 2/16 results in range [-2/16, 14/16  
010 3/16 results in range [-3/16, 13/16]  
011 4/16 results in range [-4/16, 12/16]  
100 5/16 results in range [-5/16, 11/16]  
101 6/16 results in range [-6/16, 10/16]  
110 7/16 results in range [-7/16, 9/16]  
111 8/16 results in range [-8/16, 8/16]  
12:10  
000BIN  
A2D_Offset  
Selection between fixed ADC segmentations for  
temperature measurements:  
00 setup according to IDT-reserved memory  
(recommended setup for best performance and  
speed trade-off)  
14:13  
15  
00BIN  
Temp_ADC  
01 MSB=16, LSB=0 (16-bit)  
10 MSB=10, LSB=6 (16-bit)  
11 MSB=12, LSB=4 (16-bit)  
0BIN  
-
Reserved  
Customer Registers  
11HEX  
12HEX  
13HEX  
14HEX  
15HEX  
16HEX  
Arbitrary customer use  
Arbitrary customer use  
Arbitrary customer use  
Arbitrary customer use  
Arbitrary customer use  
Arbitrary customer use  
Generated (checksum) for user page through a  
linear feedback shift register (LFSR); signature is  
checked with power-up to ensure memory content  
integrity  
17HEX  
15:0  
-
ChecksumC  
36  
April 20, 2016  
The memory integrity checksum (referred to as CRC) is generated through a linear feedback shift register with the  
polynomial:  
g(x) = x16 + x15 + x2 + 1  
with the initialization value: FFFFHEX.  
3.7. Calibration Sequence  
Calibration essentially involves collecting raw signal and temperature data from the sensor-IC system for different  
known bridge values and temperatures. This raw data can then be processed by the calibration master (assumed  
to be a PC), and the calculated calibration coefficients can then be written to MTP memory. Below is a brief  
overview of the steps involved in calibrating the ZSSC3027.  
There are three main steps to calibration:  
1. Assigning a unique identification to the ZSSC3027. This identification is written to shadow RAM and later  
programmed in MTP memory. This unique identification can be stored in the two 16-bit registers  
dedicated to customer ID. It can be used as an index into a database stored on the calibration PC. This  
database will contain all the raw values of bridge readings and temperature readings for that part, as well  
as the known bridge measurand conditions and temperature to which the bridge was exposed.  
2. Data collection. Data collection involves getting uncorrected or raw data from the bridge at different  
known measurand values and temperatures. Then this data is stored on the calibration PC using the  
unique identification of the device as the index to the database.  
3. Coefficient calculation and storage in MTP memory. After enough data points have been collected to  
calculate all the desired coefficients, the coefficients can be calculated by the calibrating PC and written  
to the shadow RAM. After that, MTP memory is programmed with the contents of the shadow RAM.  
4. Result. The sensor signal and the characteristic temperature effect on output will be linearized according  
to the setup-dependent maximum output range.  
It is essential to perform the calibration with a fixed programming setup during the data collection phase. In order  
to prevent any accidental misprocessing, it is further recommended to keep the MTP memory setup stable during  
the whole calibration process as well as in the subsequent operation. A ZSSC3027 calibration only fits the single  
setup used during its calibration. Changes of functional parameters after a successful calibration can decrease  
the precision and accuracy performance of the ZSSC3027 as well as of the whole application.  
3.7.1.  
Calibration Step 1 – Assigning Unique Identification  
Assign a unique identification number to the ZSSC3027 by using the memory write command (40HEX followed by  
two bytes of identification data and 41HEX followed by two bytes of identification data; see Table 3.1 and Table 3.8)  
to write the identification number to Cust_ID0 at memory address 00HEX and Cust_ID1 at address 01HEX as  
described in section 3.6.1. These two 16-bit registers allow for more than 4 trillion unique devices.  
3.7.2.  
Calibration Step 2 – Data Collection  
The number of unique points (measurand and/or temperature) at which calibration must be performed generally  
depends on the requirements of the application and the behavior of the resistive bridge in use. The minimum  
number of points required is equal to the number of bridge coefficients to be corrected with a minimum of three  
different temperatures at three different bridge values. For a full calibration resulting in values for all 7 possible  
bridge coefficients and 3 possible temperature coefficients, a minimum of 7 pairs of bridge with temperature  
measurements must be collected.  
37  
April 20, 2016  
 
 
 
Within this minimum 3x3 measurements field, data must be collected for the specific value pairs (at known  
conditions) and then processed to calculate the coefficients. In order to obtain the potentially best and most robust  
coefficients, it is recommended that measurement pairs (temperature vs. measurand) be collected at the outer  
corners of the intended operation range or at least at points that are located far from each other. It is also  
essential to provide highly precise reference values as nominal, expected values.  
Note: The measurement precision of the external calibration-measurement equipment should be ten times more  
accurate than the expected ZSSC3027 output precision after calibration in order to avoid precision losses caused  
by the nominal reference values (e.g., measurand signal and temperature deviations).  
Note: An appropriate selection of measurement pairs can significantly improve the overall system performance.  
The determination of the measurand-related coefficients will use all of the measurement pairs. For the  
temperature-related correction coefficients, three of the measurement pairs (at three different temperatures) will  
be used.  
Note: There is an inherent redundancy in the 7 bridge-related and 3 temperature-related coefficients. Since the  
temperature is a necessary output (which also needs correction), the temperature-related information is  
mathematically separated, which supports faster and more efficient DSP calculations during the normal usage of  
the sensor-IC system.  
The recommended approach for data collection is to make use of the raw-measurement commands:  
For bridge sensor values:  
A2HEX + 0000HEX  
:
Single bridge measurement for which the configuration register will be loaded  
from the BM_Config register (10HEX in MTP); preprogramming the measurement  
setup in the MTP is required.  
A3HEX + ssssHEX  
:
Single bridge measurement for which the BM_Config configuration register  
(Gain, ADC, Offset, etc.) will be loaded as ssssHEX, which is sent as the data  
following the A3HEX command.  
For temperature values (grey text indicates values that are possible but will overwrite IDT settings):  
A6HEX + 0000HEX  
:
Single temperature measurement for which the configuration register will be  
loaded from an internal temperature configuration register (preprogrammed by  
IDT in MTP); preprogramming of the respective configuration is done by IDT prior  
to IC delivery. This is the recommended approach for temperature data  
collection.  
A7HEX + ssssHEX  
:
Single temperature measurement for which the configuration register (Gain,  
ADC, Offset, etc.) will be loaded as ssssHEX and must be provided externally via  
the interface. The data composition of the temperature configuration register is  
similar to the BM_config (address 10HEX) register for the bridge sensor.  
3.7.3.  
Calibration Step 3 – Coefficient Calculations  
The math to perform the coefficient calculation is complicated and will not be discussed in detail. There is a brief  
overview in the next section. IDT will provide software (DLLs) to perform the coefficient calculation (external to the  
sensor-IC system) based on auto-zero corrected values. After the coefficients are calculated, the final step is to  
write them to the MTP memory of the ZSSC3027.  
38  
April 20, 2016  
 
3.8. The Calibration Math  
3.8.1.  
Bridge Signal Compensation  
The saturation check in the ZSSC3027 is enhanced compared with older SSCs from IDT. Even saturation effects  
of the internal calculation steps are detected, allowing the final correction output to still be determined. It is  
possible to get potentially useful signal conditioning results even if there has been an intermediate saturation  
during the calculations – these cases are detectable by observing the status bit[0] for each measurement result.  
Details about the saturation limits and the valid ranges for values are provided in the following equations.  
SOT_curve selects whether second-order equations compensate for sensor nonlinearity with a parabolic or  
S-shaped curve. The parabolic compensation is recommended.  
The correction formula for the differential signal reading is represented as a two-step process depending on the  
SOT_curve setting.  
Equations for the parabolic SOT_curve setting (SOT_curve = 0):  
Simplified equations:  
T = T _ Raw TSETL  
(1)  
(2)  
T SOT_tcg  
K1 = 215 +  
T +Tcg  
215  
215  
T SOT_tco  
K2 = Offset_ B + BR _ Raw+  
T +Tco  
(3)  
(4)  
(5)  
215  
215  
K1  
215  
Gain _ B  
(delimited to positive number range)  
(delimited to positive number range)  
ZBP  
=
K2 + 215  
215  
ZBP  
SOT_ bridge  
B
=
Z BP + 215  
215  
215  
Where  
B
=
Corrected bridge reading output via I2C™ or SPI; range [0HEX to FFFFHEX  
Raw bridge reading from ADC after AZ correction; range [-1FFFFHEX to 1FFFFHEX  
Bridge gain term; range [-1FFFFHEX to 1FFFFHEX  
Bridge offset term; range [-1FFFFHEX to 1FFFFHEX  
Temperature coefficient gain term; range [-1FFFFHEX to 1FFFFHEX  
Temperature coefficient offset term; range [-1FFFFHEX to 1FFFFHEX  
]
BR_Raw  
=
=
=
=
=
=
=
]
Gain_B  
Offset_B  
Tcg  
]
]
]
Tco  
]
T_Raw  
Raw temperature reading after AZ correction; range [-1FFFFHEX to 1FFFFHEX  
]
TSETL  
T_Raw reading at which low calibration was performed (e.g., 25°C);  
range [-FFFFHEX to FFFFHEX  
]
39  
April 20, 2016  
 
 
SOT_tcg  
SOT_tco  
=
=
Second-order term for Tcg non-linearity; range [-1FFFFHEX to 1FFFFHEX  
Second-order term for Tco non-linearity; range [-1FFFFHEX to 1FFFFHEX  
]
]
SOT_bridge = Second-order term for bridge non-linearity; range [-1FFFFHEX to 1FFFFHEX  
]
ZBP Intermediary term  
=
Complete equations:  
2
17 1  
(6)  
(7)  
T =  
[
T _ Raw TSETL  
]
217  
2
17 1  
2
17 1  
17 1  
2  
17 1  
2  
T  
2
SOT_tcg  
15  
K = 2 +  
⋅   
T  
+Tcg  
1
15  
215  
17  
2  
17  
2  
17  
2  
17  
2  
2
17 1  
2
17 1  
17 1  
2
17 1  
2  
17 1  
2  
T  
2
SOT_tco  
K = Offset_ B + BR _ Raw +  
T  
+Tco  
(8)  
(9)  
2
15  
215  
17  
2  
17  
2  
17  
2  
17  
2  
17  
2  
17 1  
2  
2
17 1  
17 1  
2  
K
Gain _ B  
=
+ 215  
1
ZBP  
K2  
15  
215  
2
17  
2  
17  
2  
0  
2
16 1  
17 1  
2  
17 1  
2  
Z
SOT_ bridge  
B
=
Z BP  
+ 215  
(10)  
BP  
15  
2
215  
17  
2  
17  
2  
0  
Where  
= absolute value  
= bound/saturation number range from ll to ul; over/under-flow is reported as saturation in status byte  
ul  
ll  
[
]
40  
April 20, 2016  
Equations for the S-shaped SOT_curve setting (SOT_curve = 1):  
Simplified equations:  
K1  
Gain _ B  
ZBS  
=
K2  
(11)  
(12)  
215  
215  
ZBS  
SOT_ bridge  
Z BS + 215 + 215  
(delimited to positive number range)  
B
=
215  
215  
Complete equations:  
2
17 1  
17 1  
K
Gain _ B  
2  
1
15  
ZBS  
=
K2  
(13)  
(14)  
215  
2
17  
2  
17  
2  
16  
2  
2
17 1  
17 1  
2  
17 1  
2  
Z
SOT_ bridge  
B
=
Z BS  
+ 215  
+ 215  
BS  
15  
215  
17  
2
2  
17  
2  
17  
2  
0  
41  
April 20, 2016  
3.8.2.  
Temperature Signal Compensation  
Temperature is measured internally. Temperature correction contains both linear gain and offset terms as well as  
a second-order term to correct for any nonlinearities. For temperature, second-order compensation for non-  
linearity is always parabolic. Again, the correction formula is best represented as a two-step process as follows:  
Simplified equations:  
Gain _T  
(delimited to positive number range)  
ZT =  
(
T _ Raw + Offset _T  
+ 215  
)
(15)  
(16)  
215  
ZT  
SOT_T  
215  
ZT + 215  
(delimited to positive number range)  
T
=
215  
Complete equations:  
17 1  
2  
17 1  
1 2  
217  
Gain _T  
ZT =   
[
T _ Raw + Offset _T  
]
+ 215   
(17)  
(18)  
217  
215  
17  
2  
0  
2
16 1  
17 1  
2  
17 1  
2  
Z
SOT_T  
215  
+ 215  
T
15  
T
=
Z T  
17  
2
2  
17  
2  
0  
Where  
Gain_T  
T_Raw  
=
Gain coefficient for temperature; range [-1FFFFHEX to 1FFFFHEX  
Raw temperature reading after AZ correction; range [-1FFFFHEX to 1FFFFHEX  
Offset coefficient for temperature; range [-1FFFFHEX to 1FFFFHEX  
Second-order term for temperature source non-linearity; range [-1FFFFHEX to 1FFFFHEX  
]
=
=
=
]
Offset_T  
]
SOT_T  
]
ul  
ll  
=
bound/saturation number range from ll to ul; over/under-flow is reported as saturation in  
[ ]  
status byte  
42  
April 20, 2016  
 
4 Die Pad Assignments  
The ZSSC3027 is available in die form. See Figure 4.1 for pad assignments.  
Note that the ZMDI-test pads are for IDT use only.  
Figure 4.1 ZSSC3027 Pad Assignments  
Table 4.1 Pad Assignments  
Name  
VDD  
VSS  
Direction  
IN  
Type  
Supply  
Supply  
Analog  
Analog  
Digital  
Description  
IC positive supply voltage for the ZSSC3027; regular bond pad  
Ground reference voltage signal  
Positive bridge supply  
IN  
VDDB  
INN  
OUT  
IN  
Negative bridge signal  
EOC  
OUT  
End of conversion; regular bond pad  
43  
April 20, 2016  
 
 
 
Name  
MISO  
Direction  
Type  
Digital  
Digital  
Digital  
Analog  
Analog  
Digital  
Digital  
-
Description  
OUT  
IN  
Data output for SPI  
SCLK/SCL  
MOSI/SDA  
VSSB  
Clock input for I²C™/SPI  
Data input for SPI; data in/out for I²C™  
Negative bridge supply (bridge sensor ground)  
Positive bridge signal  
IN/Out  
OUT  
IN  
INP  
SEL  
IN  
I²C™ or SPI interface select  
Slave select for SPI  
SS  
IN  
ZMDI-test  
-
Do not connect to these pads  
5 Quality and Reliability  
The ZSSC3027 is available in a standard qualification version. For the standard version ZSSC3027CCxxx, all  
data specified parameters are guaranteed if not stated otherwise.  
6 Ordering Sales Codes  
Sales Code  
Description  
Package  
ZSSC3027AC1B  
ZSSC3027AC6B  
ZSSC3027AC7B  
ZSSC3026-KIT  
Die—temperature range: –40°C to +85 °C  
Die—temperature range: –40°C to +85 °C  
Die—temperature range: –40°C to +85°C  
Wafer (304µm) unsawn, tested  
Wafer (725µm) unsawn, tested  
Wafer (200µm) unsawn, tested  
Evaluation Kit for ZSSC3026, including boards, cable, software, and 1 ZSSC3026 PQFN24 sample.  
The ZSSSC3026 is equivalent to the ZSSC3027. IDT recommends using the ZSSC3026 Evaluation Kit  
to evaluate the capabilities of the ZSSC3027 because the ZSSC3027 is only available as die.  
Contact IDT Sales for additional information.  
44  
April 20, 2016  
 
 
7
Related Documents  
Document  
ZSSC3027 Feature Sheet  
ZSSC30x6 Evaluation Kit Documentation*  
ZSSC30x6 Application Note—Calibration Sequence and DLL**  
*
This document is applicable to both the ZSSC30x6 and ZSSC3027 and is included  
with the software for the ZSSC3026 Evaluation Kit. The software can be freely  
downloaded from the ZSSC3026 product page.  
** This document is applicable to both the ZSSC30x6 ICs and the ZSSC3027, and it  
is available on the ZSSC3026 product page at www.IDT.com/ZSSC3026. A free  
customer login is required to access this document.  
Visit the ZSSC3027 product page at www.IDT.com/ZSSC3027 or contact your nearest sales office for ordering information or  
the latest version of this document.  
8
Glossary  
Term  
Description  
A2D  
ACK  
ADC  
AZ  
Analog-to-digital  
Acknowledge (interface’s protocol indicator for successful data/command transfer)  
Analog-to-digital converter or conversion  
Auto-zero (unspecific)  
AZB  
AZT  
Auto-zero measurement for sensor bridge path  
Auto-zero measurement for temperature path  
Clock  
CLK  
DAC  
DF  
Digital-to-analog conversion or converter  
Data fetch (this is a command type)  
DSP  
FSO  
LSB  
LFSR  
MR  
Digital signal processor (digital configuration, calibration, calculation, communication unit)  
Full-scale output (value in percent relative to the ADC maximum output code; resolution dependent)  
Least significant bit (“fine” portion of the converted signal)  
Linear Feedback Shift Register  
Measurement Request (this is a command type)  
Most significant bit (“coarse” portion of the converted signal)  
Not Acknowledge (interface’s protocol indicator for unsuccessful data/command transfer)  
Power-on reset  
MSB  
NACK  
POR  
PreAmp  
Preamplifier  
45  
April 20, 2016  
 
 
Term  
SM  
Description  
Signal measurement  
SOT  
TC  
Second-order term  
Temperature coefficient (of a resistor or the equivalent bridge resistance)  
Temperature measurement  
TM  
9
Document Revision History  
Revision Date  
Description  
1.00  
December 10, 2013  
August 24, 2014  
First release of data sheet.  
1.01  
Update for contact information.  
Minor edit for die description.  
April 20, 2016  
Changed to IDT branding  
 
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