M37735S4BFP_技术文档

To all our customers

Regarding the change of names mentioned in the document, such as Mitsubishi

Electric and Mitsubishi XX, to Renesas Technology Corp.

The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas

Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog

and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)

Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi

Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names

have in fact all been changed to Renesas Technology Corp. Thank you for your understanding.

Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been

made to the contents of the document, and these changes do not constitute any alteration to the

contents of the document itself.

Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices

and power devices.

Renesas Technology Corp.

Customer Support Dept.

April 1, 2003

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

DESCRIPTION

●10-bit A-D converter ..............................................8-channel inputs

●12-bit watchdog timer

The M37735S4BFP is a microcomputer using the 7700 Family core.

This microcomputer has a CPU and a bus interface unit. The CPU is

a 16-bit parallel processor that can be an 8-bit parallel processor,

and the bus interface unit enhances the memory access efficiency to

execute instructions fast. This microcomputer also includes a 32 kHz

oscillation circuit, in addition to the RAM, multiple-function timers,

serial I/O, A-D converter, and so on.

●Programmable input/output

(ports P4, P5, P6, P7, P8) ..............................................................37

●Clock generating circuit ........................................ 2 circuits built-in

APPLICATION

Control devices for general commercial equipment such as office

automation, office equipment, and so on.

FEATURES

●Number of basic instructions .................................................. 103

Control devices for general industrial equipment such as

communication equipment, and so on.

●Memory size

RAM ................................................ 2048 bytes

●Instruction execution time

The fastest instruction at 25 MHz frequency ...................... 160 ns

●Single power supply ...................................................... 5 V ± 10%

●Low power dissipation (at 25 MHz frequency)

............................................ 47.5 mW (Typ.)

●Interrupts ............................................................ 19 types, 7 levels

●Multiple-function 16-bit timer ................................................. 5 + 3

●Serial I/O (UART or clock synchronous)..........................................3

PIN CONFIGURATION (TOP VIEW)

P8

/CLKS

P8

/RTS

3

/T

X

D

0

65

66

67

68

69

70

71

72

73

74

75

76

77

40

39

38

37

36

P2

4

5

6

7

/A

4

5

6

7

/D

4

5

6

7

P8

2/RXD0

1/CLK

0

P8

0

/CTS

0

/

CLKS

1

VCC

P3

0

/WEL

35

34

33

32

31

30

29

28

AVCC

P3

1

/

WEH

ALE

VREF

P32

/

AVSS

P33

HLDA

M37735S4BFP

V

ss

V

SS

P7

P7 /AN

/AN

P7

7

/AN

6

7

/XcIN

/XcOUT

ADTRG/T

RDE

6

X

OUT

X

IN

P7

5

/

XD2

4

/AN

P7

4

/R

/CLK

CTS

/AN

X

D

2

RESET

CNVSS

BYTE

27

26

25

78

79

80

3

2

/

2

1

HOLD

Outline 80P6N-A

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Data Bus(Even)

Data Bus(Odd)

Data Buffer DBH(8)

Data Buffer DB

L(8)

Instruction Queue Buffer Q

0(8)

Instruction Queue Buffer Q

1(8)

Instruction Queue Buffer Q

2(8)

Address Bus

Incrementer(24)

Program Address Register PA(24)

Data Address Register DA(24)

Incrementer/Decrementer(24)

Program Counter PC(16)

Program Bank Register PG(8)

Data Bank Register DT(8)

Input Butter Register IB(16)

Processor Status Register PS(11)

Direct Page Register DPR(16)

Stack Pointer S(16)

Index Register Y(16)

Index Register X(16)

Accumulatcr B(16)

Accumulator A(16)

X

COUT

CIN

Arithmetic Logic

Unit(16)

2

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

FUNCTIONS OF M37735S4BFP

Parameter

Functions

Number of basic instructions

Instruction execution time

103

160ns (the fastest instruction at external clock 25 MHz frequency)

Memory size

RAM

2048 bytes

P5 – P8

P4

8-bit ✕ 4

5-bit ✕ 1

Input/Output ports

TA0, TA1, TA2, TA3, TA4

TB0, TB1, TB2

16-bit ✕ 5

16-bit ✕ 3

Multi-function timers

Serial I/O

A-D converter

Watchdog timer

(UART or clock synchronous serial I/O) ✕ 3

10-bit ✕ 1 (8 channels)

12-bit ✕ 1

3 external types, 16 internal types

Interrupts

Each interrupt can be set to the priority level (0 – 7.)

2 circuits built-in (externally connected to a ceramic resonator or a

quartz-crystal oscillator)

Clock generating circuit

Supply voltage

5 V ± 10%

Power dissipation

47.5 mW (at external clock 25 MHz frequency)

Input/Output voltage

Output current

5 V

5 mA

Input/Output characteristic

Memory expansion

Operating temperature range

Device structure

Maximum 1 Mbytes

–20 to 85 °C

CMOS high-performance silicon gate process

80-pin plastic molded QFP (80P6N-A)

Package

3

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

PIN DESCRIPTION

Vcc,

Name

Input/Output

Functions

Power source

Apply 5 V ± 10% to Vcc and 0 V to Vss.

Vss

CNVss

RESET

XIN

CNVss input

Reset input

Input

Connect to Vcc.

_____

When “L” level is applied to this pin, the microcomputer enters the reset state.

These are pins of main-clock generating circuit. Connect a ceramic resonator or a quartz-crystal

oscillator between XIN and XOUT. When an external clock is used, the clock source should be

Clock input

Input

XOUT

____

Clock output

Output

connected to the XIN pin, and the XOUT pin should be left open.

____

RDE

Read enable output

Bus width

selection input

Output

Input

When data/instruction read is performed, output level of RDE signal is “L”.

BYTE

This pin determines whether the external data bus has an 8-bit width or a 16-bit width.

The data bus has a 16-bit width when “L” signal is input and an 8-bit width when “H” signal

is input.

AVcc,

AVss

VREF

Analog power

source input

Reference

Power source input pin for the A-D converter. Externally connect AVcc to Vcc and AVss to Vss.

Input

This is reference voltage input pin for the A-D converter.

voltage input

P00/^_C^_S^_0^_– Chip selection

Output

I/O

When the specified external memory area is accessed,^_C^_S^_0^_– ^_C^_S^_4^_signals are “L”.

P04/^_C^_S^_4^_

output

P05/RSMP Ready sampling

output

_____

____

The timing signal to be input to the RDY pin is output.

P06/A16,

P07/A17

Address output

An address (A16, A17) is output.

P10/A

8/D

8

– Address output

/A15/D15 /data (high

-order) I/O

When the BYTE pin is set to “L” and external data bus has a 16-bit width, high-order data

(D8 – D15) is input/output or an address (A8 – A15) is output. When the BYTE pin is “H” and an

external data bus has an 8-bit width, only address (A8 – A15) is output.

P17

P2

P27

0

/A

7

0

/D

0

–

Address output

/data (low

I/O

Low-order data (D0 – D7) is input/output or an address (A0 – A7) is output.

/A

/D

7

-order) I/O

____

P30/WEL

Write enable

output

Output

When the BYTE pin is “L” and writing to an even address is performed, output level of WEL signal

is “L”. When the BYTE pin is “H” and writing to an even address or an odd address is performed,

____

output level of WEL signal is “L”.

____

P31/WEH Write enable

high output

Output

When the BYTE pin is “L” and writing to an odd address is performed, output level of WEH signal

____

is “L”. When the BYTE pin is “H”, WEH signal is always “H”.

This is used to retrieve only the address from the multiplex signal which consists of address and

data.

P32/ALE

Address latch

enable output

_____

P33/HLDA Hold acknow-

This outputs “L” level when the microcomputer enters hold state after a hold request is accepted.

ledge output

_____

HOLD

Hold request

input

Input

This is an input pin for HOLD request signal. The microcomputer enters hold state while this

signal is “L”.

____

RDY

____

Ready input

This is an input pin for RDY signal. The microcomputer enters ready state while this signal is “L”.

This pin outputs the clock 1.

These pins become a 5-bit I/O port. An I/O direction register is available so that each pin can be

programmed for input or output. These ports are in the input mode when reset.

P42/

1

Clock output

Output

I/O

P43 – P47 I/O port P4

P50 – P57 I/O port P5

P60 – P67 I/O port P6

I/O

In addition to having the same functions as port P4, these pins also function as I/O pins for timers

A0 to A3 and input pins for key input interrupt input (^_K^_I0^_– ^_K^_I3^_).

In addition to having the same functions as port P4, these pins also function as I/O pins for timer

____ ____

A4, input pins for external interrupt input (INT0 – INT2) and input pins for timers B0 to B2. P67 also

functions as sub-clock SUB output pin.

P70 – P77 I/O port P7

P80 – P87 I/O port P8

I/O

In addition to having the same functions as port P4, these pins function as input pins for A-D

converter. P72 to P75 also function as I/O pins for UART2. Additionally, P76 and P77 have the

function as the output pin (XCOUT) and the input pin (XCIN) of the sub-clock (32 kHz) oscillation

circuit, respectively. When P76 and P77 are used as the XCOUT and XCIN pins, connect a resonator

or an oscillator between the both.

In addition to having the same functions as port P4, these pins also function as I/O pins for UART

0 and UART 1.

4

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

BASIC FUNCTION BLOCKS

The M37735S4BFP has the same functions as the

M37735MHBXXXFP except for the following:

(1) The memory map is different.

Built-in RAM and control registers for internal peripheral devices are

assigned to bank 016.

Addresses FFD616 to FFFF16 are the RESET and interrupt vector

addresses and contain the interrupt vectors. Use ROM for memory

of this address.

(2) The processor mode is different.

(3) The reset circuit is different.

The 2048-byte area allocated to addresses from 8016 to 87F16 is the

built-in RAM. In addition to storing data, the RAM is used as stack

during a subroutine call or interrupts.

(4) Pulse output port mode of timer A is available.

(5) The function of ROM area modification is not available.

Refer to the section on the M37735MHBXXXFP, except for above

(1)–(5).

Peripheral devices such as I/O ports, A-D converter, serial I/O, timer,

and interrupt control registers are allocated to addresses from 016 to

7F16.

MEMORY

A 256-byte direct page area can be allocated anywhere in bank 016

by using the direct page register (DPR). In the direct page addressing

mode, the memory in the direct page area can be accessed with two

words. Hence program steps can be reduced.

The memory map is shown in Figure 1. The address space has a

capacity of 16 Mbytes and is allocated to addresses from 016 to

FFFFFF16. The address space is divided by 64-Kbyte unit called bank.

The banks are numbered from 016 to FF16.

However, banks 1016–FF16 of the M37735S4BFP cannot be

accessed.

00000016

00007F16

00008016

00000016

Internal peripheral

devices

Bank 016

Bank 116

control registers

refer to Fig. 2 for

detail information

00FFFF16

01000016

Internal RAM

00007F16

2048 bytes

Interrupt vector table

00FFD616

A-D/UART2 trans./rece.

00087F16

UART1 transmission

UART1 receive

01FFFF16

UART0 transmission

UART0 receive

Timer B2

Timer B1

Timer B0

Timer A4

Timer A3

Timer A2

FE000016

Timer A1

Timer A0

Bank FE16

Bank FF16

INT /Key input

2

INT1

INT0

FEFFFF16

FF000016

Watchdog timer

DBC

BRK instruction

00FFD616

00FFFF16

Zero divide

RESET

00FFFE16

FFFFFF16

: Internal

: External

Note. Banks 1016–FF16 cannot be accessed in the M37735S4BFP.

Fig. 1 Memory map

5

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Address (Hexadecimal notation)

Count start flag

One-shot start flag

Up-down flag

000000

000001

000002

000003

000004

000040

000041

000042

000043

000044

000045

000046

000047

000048

000049

00004A

00004B

00004C

00004D

00004E

00004F

000050

000051

000052

000053

000054

000055

000056

000057

000058

000059

00005A

00005B

00005C

00005D

00005E

00005F

000060

000061

000062

000063

000064

000065

000066

000067

000068

000069

00006A

00006B

00006C

00006D

00006E

00006F

000070

000071

000072

000073

000074

000075

000076

000077

000078

000079

00007A

00007B

00007C

00007D

00007E

Port P0 register

Port P1 register

Port P0 direction register

000005 Port P1 direction register

Port P2 register

000006

000007

000008

000009

00000A

00000B

00000C

00000D

00000E

00000F

000010

000011

000012

000013

000014

000015

000016

000017

000018

000019

00001A

00001B

00001C

00001D

00001E

00001F

000020

000021

000022

000023

000024

000025

000026

000027

000028

000029

00002A

00002B

00002C

00002D

00002E

00002F

000030

000031

000032

000033

000034

000035

000036

000037

000038

000039

00003A

00003B

00003C

00003D

00003E

00003F

Timer A0 register

Timer A1 register

Timer A2 register

Timer A3 register

Timer A4 register

Timer B0 register

Timer B1 register

Timer B2 register

Port P3 register

Port P2 direction register

Port P3 direction register

Port P4 register

Port P5 register

Port P4 direction register

Port P5 direction register

Port P6 register

Port P7 register

Port P6 direction register

Port P7 direction register

Port P8 register

Port P8 direction register

Timer A0 mode register

Timer A1 mode register

Timer A2 mode register

Timer A3 mode register

Timer A4 mode register

Timer B0 mode register

Timer B1 mode register

Pulse output data register 1

Pulse output data register 0

A-D control register 0

Timer B2 mode register

Processor mode register 0

Processor mode register 1

Watchdog timer register

Watchdog timer frequency selection flag

Waveform output mode register

Reserved area (Note)

A-D control register 1

A-D register 0

A-D register 1

A-D register 2

A-D register 3

A-D register 4

A-D register 5

A-D register 6

A-D register 7

UART2 transmit/receive mode register

UART2 baud rate register (BRG2)

UART2 transmission buffer register

UART2 transmit/receive control register 0

UART2 transmit/receive control register 1

UART2 receive buffer register

Oscillation circuit control register 0

Port function control register

Serial transmit control register

Oscillation circuit control register 1

A-D/UART2 trans./rece. interrupt control register

UART 0 transmission interrupt control register

UART 0 receive interrupt control register

UART 1 transmission interrupt control register

UART 1 receive interrupt control register

Timer A0 interrupt control register

Timer A1 interrupt control register

Timer A2 interrupt control register

Timer A3 interrupt control register

Timer A4 interrupt control register

Timer B0 interrupt control register

Timer B1 interrupt control register

Timer B2 interrupt control register

UART 0 transmit/receive mode register

UART 0 baud rate register (BRG0)

UART 0 transmission buffer register

UART 0 transmit/receive control register 0

UART 0 transmit/receive control register 1

UART 0 receive buffer register

UART 1 transmit/receive mode register

UART 1 baud rate register (BRG1)

UART 1 transmission buffer register

UART 1 transmit/receive control register 0

UART 1 transmit/receive control register 1

INT

0

interrupt control register

INT1

UART 1 receive buffer register

00007F INT

2/Key input interrupt control register

Note. Writing to reserved area is disabled.

Fig. 2 Location of internal peripheral devices and interrupt control registers

6

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

shows the bit configuration of the pulse output data register. The

contents of the pulse output data register 1 (low-order four bits of

1C16 address) corresponding to RTP10, RTP11, RTP12, and RTP13

is output to the ports each time the counter of timer A2 becomes

000016. The contents of the pulse output data register 0 (low-order

four bits of 1D16 address) corresponding to RTP00, RTP01, RTP02,

and RTP03 is output to the ports each time the counter of timer A0

becomes 000016.

Pulse output port mode

The pulse motor drive waveform can be output by using plural internal

timer A.

Figure 3 shows a block diagram for pulse output port mode. In the

pulse output port mode, two pairs of four-bit pulse output ports are

used. Whether using pulse output port or not can be selected by

waveform output selection bit (bit 0, bit 1) of waveform output mode

register (6216 address) shown in Figure 4. When bit 0 of waveform

output selection bit is set to “1”, RTP10, RTP11, RTP12, and RTP13

are used as pulse output ports, and when bit 1 of waveform output

selection bit is set to “1”, RTP00, RTP01, RTP02, and RTP03 are

used as pulse output ports. When bits 1 and 0 of waveform output

selection bit are set to“1”, RTP10, RTP11, RTP12, and RTP13, and

RTP00, RTP01, RTP02, and RTP03 are used as pulse output ports.

The ports not used as pulse output ports can be used as normal

parallel ports, timer input/output or key input interruput input.

In the pulse output port mode, set timers A0 and A2 to timer mode as

timers A0 and A2 are used. Figure 5 shows the bit configuration of

timer A0, A2 mode registers in pulse output port mode.

Figure 7 shows example of waveforms in pulse output port mode.

When “0” is written to a specified bit of the pulse output data register,“L”

level is output to the corresponding pulse output port when the counter

of corresponding timer becomes 000016, and when “1” is written, “H”

level is output to the pulse output port.

Pulse width modulation can be applied to each pulse output port.

Since pulse width modulation involves the use of timers A1 and A3,

activate these timers in pulse width modulation mode.

Data can be set in each bit of the pulse output data register

corresponding to four ports selected as pulse output ports. Figure 6

4

5

Pulse width modulation selection bit

(Bit 4, 5 of 62¹⁶address)

Pulse width modulation output

by timer A3

Pulse width modulation output

by timer A1

Timer A2

Pulse output data

register 1 (1C¹⁶address)

T

RTP1³(P57)

D³

D

Q

RTP1²(P56)

RTP1¹(P55)

RTP1⁰(P54)

D2

D1

D

Q

D0

D

Q

RTP0³(P53)

D11

D10

D

Q

RTP02 (P52)

RTP0¹(P51)

D9

D8

D

Q

RTP0⁰(P50)

T

Pulse output data

register 0 (1D¹⁶address)

Polarity selection bit

(Bit 3 of 62¹⁶address)

Timer A0

Fig. 3 Block diagram for pulse output port mode

7

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

RTP10, RTP11, RTP12, and RTP13 are applied pulse width modulation

by timer A3 by setting the pulse width modulation selection bit by

timer A3 (bit 5) of the waveform output mode register to “1”.

Address

7

6

5

0

4

0

3

2

1

0

RTP00, RTP01, RTP02, and RTP03 are applied pulse width modulation

by timer A1 by setting the pulse width modulation selection bit by

timer A1 (bit 4) of the waveform output mode register to “1”.

Timer A0 mode register 5616

Timer A2 mode register 5816

X

Always “100” in pulse output

port mode

The contents of the pulse output data register 0 can be reversed and

output to pulse output ports RTP00, RTP01, RTP02, and RTP03 by

the polarity selection bit (bit 3) of the waveform output mode register.

When the polarity selection bit is “0”, the contents of the pulse output

data register 0 is output unchangeably, and when “1”, the contents of

the pulse output data register 0 is reversed and output. When pulse

width modulation is applied, likewise the polarity reverse to pulse

width modulation can be selected by the polarity selection bit.

Not used in pulse output port mode

Always “00” in pulse output port mode

Clock source selection bit

0 0 : Select f

2

0 1 : Select f16

1 0 : Select f64

1 1 : Select f512

Fig. 5 Timer A0, A2 mode register bit configuration in pulse output

port mode

7

0

6 5 4 3 2 1 0

Address

Weveform output mode register 6216

Weveform output selection bit

0 0 : Parallel port

0 1 : RTP1 selected

1 0 : RTP0 selected

7

6 5 4 3 2 1 0

Address

1 1 : RTP1 and RTP0 selected

Pulse output data register 0 1D16

Polarity selection bit

0 : Positive polarity

1 : Negative polarity

RTP0

0

1

2

3

output data

Pulse width modulation selection bit

by timer A1

0 : Not modulated

1 : Modulated

Pulse width modulation selection bit

by timer A3

0 : Not modulated

1 : Modulated

7

6 5 4 3 2 1 0

Address

Pulse output data register 1 1C16

Always “0”

RTP1

0

1

2

3

output data

Fig. 4 Waveform output mode register bit configuration

Fig. 6 Pulse output data register bit configuration

8

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Example of pulse output port (RTP10 – RTP13)

Output signal at each time

when timer A2 becomes 000016

RTP13(P57)

RTP12(P56)

RTP11(P55)

RTP10(P54)

Example of pulse output port (RTP10 – RTP13) when pulse width modulation is applied by timer A3.

Output signal at each time

when timer A2 becomes 000016

RTP13(P57)

RTP12(P56)

RTP11(P55)

RTP10(P54)

Example of pulse output port (RTP00 – RTP03) when pulse width modulation is applied

by timer A1 with polarity selection bit = “1”.

Output signal at each time

when timer A0 becomes 000016

RTP03(P53)

RTP02(P52)

RTP01(P51)

RTP00(P50)

Fig. 7 Example of waveforms in pulse output port mode

9

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

PROCESSOR MODE

Only the microprocessor mode can be selected.

• BYTE pin

___

Figure 9 shows the functions of pins P00/CS0 — P47 in the

microprocessor mode.

When accessing the external memory, the level of the BYTE pin is

used to determine whether to use the data bus as 8-bit width or 16-

bit width.

Figure 10 shows external memory area for the microprocessor mode.

Access to the external memory is affected by the BYTE pin, the wait

bit (bit 2 of the processor mode register 0 at address 5E16), and the

wait selection bit (bit 0 of the processor mode register 1 at address

5F16) .

The data bus has a width of 8 bits when level of the BYTE pin is “H”,

and pins P20/A0/D0 — P27/A7/D7 are the data I/O pins.

The data bus has a width of 16 bits when the level of the BYTE pin is

“L”, and pins P20/A0/D0 — P27/A7/D7 and pins P10/A8/D8 — P17/A15/

D15 are the data I/O pins.

When accessing the internal memory, the data bus always has a

width of 16 bits regardless of the BYTE pin level.

7

6

0

5

4

3

2

1

0

7 6 5 4 3 2 1 0

Address

5E16

Address

5F16

1

Processor mode register 0

Processor mode register 1

Wait selection bit

0 : Wait 0

1 : Wait 1

Must be “10” (“10” after reset)

Wait bit

0 : Wait

1 : No wait

Software reset bit

Reset occurs when this bit is set to “1”

Interrupt priority detection time selection bit

0 0 : Internal clock ✕ 7 (cycle)

0 1 : Internal clock

✕ 4 (cycle)

1 0 : Internal clock ✕ 2 (cycle)

Must be “0”

Not used

Fig. 8 Processor mode register bit configuration

10

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

PM

1

0

PM

0

Mode

Microprocessor mode

RDE

(Note)

RDE, WEL, WEH

P0

0

to

/

CS

0

CS

0

to CS

4

CS0

— CS

4

P04/CS

4

RSMP, A16, A17

P05/RSMP

RSMP

P0

6

/A16

/A17

Address A16, A17

P07

RDE, WEL, WEH

A8

to A15

Address

P1

0

/A

to

/A15 /D15

8/D8

BYTE = “L”

BYTE = “H”

Data(odd)

P10/A8/D8

P17

to

P17/A15/D15

RDE, WEL, WEH

P1 /A /D

to

/A15/D15

0

8

Address A8 – A15

P17

RDE, WEL, WEH

A0 to A7

P2

0

/A

to

/A

0

/D

0

BYTE = “L”

BYTE = “H”

Data(even)

Address

P2

0

/A

to

/A

0

/D

0

7

P2

7

7/D

7

RDE, WEL, WEH

P27

7/D

A0 to A7

P2

0

/A

to

/A

0

/D

0

Address

Data

(odd,even)

P2

7

/D

7

P3

0

1

2

3

/

WEL

WEH

ALE

WEL

WEH

(Note)

P30

P31

P32

P33

/

WEL,

WEH

P3

/

,

/ALE,

ALE

/HLDA

HLDA

RDE, WEL, WEH

HOLD

RDY

HOLD

RDY

HOLD

,

RDY

,

P4

Ports P4

2

/

1,

(Note)

P42

/

1

3

to P47

P4

to

P4

3

7

I/O Port

___

Fig. 9 Functions of pins P00/CS0 to P47 in microprocessor mode

Note. The signal output disable selection bit (bit 6 of the oscillation circuit control register 0) can stop the

1 output in the microprocessor

___ ___ ___

mode. In this mode, signals RDE, WEL, WEH can also be fixed to “H” when the internal memory area is accessed.

11

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

• Wait bit

Internal clock

As shown in Figure 11, when the external memory area is accessed

with the wait bit (bit 2 of the processor mode register 0 at address

5E16) cleared to “0”, the access time can be extended compared with

no wait (the wait bit is “1”).

Address

Data

Ai/Di

Wait bit “1”

RDE or

(No wait)

WEL, WEH

The access time is extended in two ways and this is selected with the

wait selection bit (bit 0 of the processor mode register 1 at address

5F16).

ALE

Ai/Di

Access time

When this bit is “1”, the access time is 1.5 times compared to that for

no wait. When this bit is “0”, the access time is twice compared to

that for no wait.

Address

Data

Wait bit “0”

(Wait 1)

RDE or

WEL, WEH

At reset, the wait bit and the wait selection bit are “0”.

Access to internal memory area is always performed in the no wait

mode regardless of the wait bit.

ALE

Ai/Di

Access time

The processor modes are described below.

Address

Data

Wait bit “0”

(Wait 0)

RDE or

WEL, WEH

Microprocessor

mode

ALE

0016

SFR

Access time

Fig. 11 Relationship between wait bit, wait selection bit, and access time

8016

RAM

(1) Microprocessor mode [10]

The microcomputer enters the microprocessor mode after connecting

87F16

the CNVss pin to Vcc and starting from reset.

___

Pin RDE is the output pin for the read enable signal (RDE).

___

RDE is “L” during the data read term in the read cycle. When the

___

internal memory area is read, RDE can be fixed to “H” by setting the

signal output disabe selection bit (bit 6 of the oscillation circuit control

register 0) to “1”.

The shaded area is the external memory area.

Note that banks 1016 to FF16 cannot be accessed.

Fig. 10 External memory area for microprocessor mode

12

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

___ ___

___

RDY is a ready signal. If this signal goes “L”, the internal clock

___

CS0 to CS4 are the chip select signals and are “L” when the address

____

shown in Table 2 is accessed. RSMP is the ready-sampling signal

___

stops at “L”. RDY is used when slow external memory is attached.

which is output for the RDY input described later when the external

P42/

1 pin is an output pin for clock

1. The

1 output is

____

memory area is accessed. By inputting logical AND of RSMP and

___

independent of RDY and does not stop even when internal clock

___

____

CSn (n = 0 to 4) to the RDY pin, read/write term for any address areas

can be extended by 1 cycle of clock 1. In addition, the read/write

term can also be extended by 2 cycles of clock 1 if the above

stops because of “L” input to the RDY pin.

function and wait 0/1 function specified with the wait bit are used

together.

Pins P10/A8/D8 — P17/A15/D15 have two functions depending on the

level of the BYTE pin.

When the BYTE pin level is “L”, pins P10/A8/D8 — P17/A15/D15 function

___ ___ ___

as address (A8 to A15) output pins while RDE or WEL, WEH are “H”

and as odd address data I/O pins while these signals are “L”. However,

___

if an internal memory is read, external data is ignored while RDE is

“L”.

When the BYTE pin level is “H”, pins P10/A8/D8 — P17/A15/D15 function

as address (A8 to A15) output pins.

Pins P20/A0/D0 — P27/A7/D7 have two functions depending on the

level of the BYTE pin.

When the BYTE pin level is “L”, pins P20/A0/D0 — P27/A7/D7 function

___ ___ ___

as address (A0 to A7) output pins while RDE or WEL, WEH are “H” and

as even address data I/O pins while these signals are “L”. However,

___

if an internal memory is read, external data is ignored while RDE is

“L”.

When the BYTE pin level is “H”, pins P20/A0/D0 — P27/A7/D7 function

___ ___ ___

as address (A0 to A7) output pins while RDE or WEL, WEH are “H” and

as even and odd address data I/O pins while these signals are “L”.

However, if an internal memory is read, external data is ignored while

___

RDE is “L”.

___ ___

WEL, WEH are the write-enable low signal and the write-enable high

signal, respectively. These signals are “L” during the data write term

of the write cycle, but their operations differ depending on the BYTE

pin level.

___

In the case the BYTE pin level is “L”, WEL is “L” when writing to

___

an even address, WEH is “L” when writing to an odd address, and

___

both WEL and WEH are “L” when writing to even and odd addresses.

In the case the BYTE pin level is “H”, regardless of address, only

___

WEL is “L”, and WEH retains “H”. WEL and WEH can also be fixed to

___

“H” when the internal memory is accessed, same as RDE, by writing

“1” to the signal output disable selection bit.

ALE is an address latch enable signal used to latch the address signal

from a multiplexed signal of address and data. The latch is transparent

while ALE is “H” to let the address signal pass through and held

while ALE is “L”.

____

HLDA is a hold acknowledge signal and is used to notify externally

____

when the microcomputer receives HOLD input and enters into hold

state.

____

HOLD is a hold request signal. It is an input signal used to put the

____

microcomputer in hold state. HOLD input is accepted when the internal

clock

falls from “H” level to “L” level while the bus is not used.

___ ____ ___

Pins P00/CS0 — P31/WEH and RDE are floating while the microcomputer

____

stays in hold state. After HLDA signal changes to “L” level and one

cycle of internal clock

passed, these ports become floating. After

____

HLDA signal changes to “H” level and one cycle of internal clock

passed, these ports are released from floating state.

13

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

As shown in Table 3,

1 output can be stopped with the signal

Table 1. Relationship between CNVss pin input levels and processor

mode

output disable selection bit = “1”. In this case, write “1” to the port P42

direction register.

CNVss

Mode

Description

• Microprocessor

Microprocessor mode upon

starting after reset.

Table 1 shows the relationship between the CNVss pin input level

and the processor mode.

Vcc

Table 2. Relationship between access addresses and chip-select signals CS0 to CS4

Access address

Chip-select

signal

Area

Microprocessor mode

00 088016

to

00 7FFF16

00 800016

to

03 FFFF16

04 000016

to

07 FFFF16

08 000016

to

____

The first half of bank 0016 except

internal memory area

CS0

The latter half of bank 0016 except

internal memory area and banks

0116 to 0316.

____

CS1

____

CS2

Banks 0416 to 0716

Banks 0816 to 0B16

Banks 0C16 to 0F16

____

CS3

0B FFFF16

0C 000016

to

____

CS4

0F FFFF16

Table 3. Function of signal output disable selection bit CM6 (bit 6 of oscillation circuit control register 0)

Function

Processor mode

CM6 = “0”

CM6 = “1”

___ ___ ___

RDE, WEL, WEH are output when the

___

_^R_^D_^E,

RDE, WEL, WEH are output only when the

external memory area is accessed.

“L” is output after WIT/STP instruction is

executed

Standby state selection bit (bit 0 of port

function control register) must be set to “1”.

“H” or “L” is output. (Contents of P42 port

latch is output.)

internal/external memory area is accessed.

WEL, WEH

___

RDE

After WIT/STP instruction is executed,

“H” is output.

Microprocessor mode

Clock

1 is output independent of

1

Port P42 direction register must be set to

“1”.

output selection bit.

Note. Functions shown in Table 3 cannot be emulated with a debugger. For the oscillation circuit control register 0 and port function control

register, refer to Figures 64 and 11 in data sheet “M37735MHBXXXFP”, respectively.

14

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

RESET CIRCUIT

input voltage must be 0.9 V or less when the power source voltage

reaches 4.5 V. If a resonator/oscillator is connected to the main-clock

oscillation circuit, change the reset input voltage from “L” to “H” after

the main-clock oscillation is fully stabilized.

_____

The microcomputer is released from the reset state when the RESET

pin is returned to “H” level after holding it at “L” level with the power

source voltage at 5 V ± 10%. Program execution starts at the address

formed by setting address A23 – A16 to 0016, A15 – A8 to the contents

of address FFFF16, and A7 – A0 to the contents of address FFFE16.

Figure 13 shows an example of a reset circuit. If the stabilized clock

is input from the external to the main-clock oscillation circuit, the reset

Figure 12 shows the status of the internal registers during reset.

Address

0016

(6116

)

•••

0

(0416

(0516

(0816

(0916

)

•••

Port P0 direction register

Port P1 direction register

Port P2 direction register

Port P3 direction register

Watchdog timer frequency selection flag

Waveform output mode register

UART2 transmit/receive mode register

(6216

(6416

(6816

(6916

)

•••

0

0 0 0

0 0

0016

•••

)

0 0 0 0 0 0 0

1 0 0 0

UART2 transmit/receive control register 0

UART2 transmit/receive control register 1

Oscillation circuit control register 0

Port function control register

0 0 0 0

•••

0 0 0 0 0 1 0

(0C16

)

•••

0016

Port P4 direction register

Port P5 direction register

Port P6 direction register

Port P7 direction register

Port P8 direction register

A-D control register 0

(6C16

)•••

0 0 0 0 0

0016

1

(0D16

)

•••

0016

(6D16

)•••

0016

(1016

(1116

(1416

)

•••

(6E16

)

•••

0 0

)

Serial transmit control register

(6F16

)

0

0 0 0 0 0

0 0 0 0

0016

Oscillation circuit control register 1

A-D/UART2 trans./rece. interrupt control register

(7016

(7116

(7216

(7316

(7416

(7516

(7616

(7716

(7816

(7916

)

0 0 0 0 0 ? ? ?

(1E16

)

•••

UART 0 transmission interrupt control register

UART 0 receive interruupt control register

UART 1 transmission interrupt control register

0 0 0 0

)

(1F16

(3016

(3816

(3416

)

•••

0

0 0

0016

1 1

A-D control register 1

0 0 0 0

)

•••

UART 0 transmit/receive mode register

UART 1 transmit/receive mode register

)

•••

0 0 0 0

•••

0 0 0 0 1 0 0 0

UART 0 transmit/receive

control register 0

UART 1 transmit/receive

control register 0

UART 0 transmit/receive

control register 1

UART 1 transmit/receive

control register 1

UART 1 receive interruupt control register

Timer A0 interrupt control register

0 0 0 0

0 0 0 0 1 0 0 0

(3C16

)

•••

0 0 0 0

0 0 0 0 0 0 1 0

(3516

)

•••

Timer A1 interrupt control register

Timer A2 interrupt control register

0 0 0 0

0 0 0 0 0 0 1 0

(3D16

)

•••

Timer A3 interrupt control register

Timer A4 interrupt control register

Timer B0 interrupt control register

0 0 0 0

(4016

(4216

(4416

(5616

(5716

(5816

(5916

)

•••

0016

Count start flag

0 0 0 0

)

•••

0 0 0 0 0

One- shot start flag

Up-down flag

0 0 0 0

0016

(7A16

)

•••

0 0 0 0

Timer A0 mode register

Timer A1 mode register

0016

(7B16

)

•••

Timer B1 interrupt control register

Timer B2 interrupt control register

0 0 0 0

0016

(7C16

)•••

0 0 0 0 0 0

•••

0016

(7D16

)•••

INT

0

1

interrupt control register

Timer A2 mode register

Timer A3 mode register

Timer A4 mode register

Timer B0 mode register

Timer B1 mode register

Timer B2 mode register

INT

(7E16

)

•••

(5A16

)

•••

INT2/key input interrupt control register

0016

(7F16

)

•••

(5B16

)

•••

Processor status register (PS)

Program bank register (PG)

0

0 0 ? ? 0 0 0 1 ? ?

0016

0 0 1 0 0 0 0 0

(5C16

)

^•••0 0 1

0 0 0 0

Content of FFFF16

Content of FFFE16

000016

(5D16

)

^•••0 0 1

Program counter (PC

H)

(5E16

(5F16

(6016

)

•••

0016

Program counter (PC

L)

Processor mode register 0

Processor mode register 1

Watchdog timer register

)

•••

0

Direct page register (DPR)

Data bank register (DT)

)•••

0016

FFF16

Contents of other registers and RAM are undefined during reset. Initialize them by software.

Fig. 12 Microcomputer internal status during reset

15

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

ADDRESSING MODES

The M37735S4BFP has 28 powerful addressing modes.Refer to the

MITSUBISHI SEMICONDUCTORS DATA BOOK SINGLE-CHIP 16-

BIT MICROCOMPUTERS for the details of each addressing mode.

Power on

4.5 V

VCC

RESET

VCC

MACHINE INSTRUCTION LIST

0 V

The M37735S4BFP has 103 machine instructions. Refer to the

MITSUBISHI SEMICONDUCTORS DATA BOOK SINGLE-CHIP 16-

BIT MICROCOMPUTERS for details.

RESET

0.9 V

0 V

Note. In this case, stabilized clock is input from the

external to the main-clock oscillation circuit.

Perform careful evaluation at the system design

level before using.

Fig. 13 Example of a reset circuit

16

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

ABSOLUTE MAXIMUM RATINGS

Symbol

Vcc

AVcc

VI

Parameter

Power source voltage

Conditions

Ratings

Unit

V

–0.3 to +7

–0.3 to +12

Analog power source voltage

_____

Input voltage RESET, CNVss, BYTE

V

Input voltage P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7,

P43 – P47, P50 – P57, P60 – P67, P70 – P77,

VI

–0.3 to Vcc + 0.3

V

_____ ____

P80 – P87, VREF, XIN, HOLD, RDY

___

Output voltage P00/CS – P07/A17, P10/A8/D8 – P17/A15/D15,

0

____ _____

P20/A0/D0 – P27/A7/D7, P30/WEL – P33/HLDA ,P42/

1,

VO

P43 – P47, P50 – P57, P60 – P67, P70 – P77, P80 – P87,

____

XOUT, RDE

Pd

Topr

Tstg

Power dissipation

Operating temperature

Storage temperature

Ta = 25 °C

300

–20 to +85

–40 to +150

mW

°C

RECOMMENDED OPERATING CONDITIONS (Vcc = 5 V ± 10%, Ta = –20 to +85 °C, unless otherwise noted)

Limits

Typ.

5.0

Symbol

Parameter

Unit

V

Min.

4.5

2.7

Max.

5.5

f(XIN) : Operating

f(XIN) : Stopped, f(XCIN) = 32.768 kHz

Vcc

Power source voltage

AVcc

Vss

AVss

Analog power source voltage

Power source voltage

Vcc

0

V

Analog power source voltage

____ ___

High-level input voltage HOLD, RDY, P43 – P47, P50 – P57, P60 – P67, P70 – P77,

_____

Vcc

VIH

VIL

0.8 Vcc

0.5 Vcc

V

P80 – P87, XIN, RESET, CNVss, BYTE, XCIN (Note 3)

High-level input voltage P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7

____ ___

Low-level input voltage HOLD, RDY, P43 – P47, P50 – P57, P60 – P67, P70 – P77,

_____

0.2Vcc

0

V

P80 – P87, XIN, RESET, CNVss, BYTE, XCIN (Note 3)

Low-level input voltage P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7

VIL

0.16Vcc

___

High-level peak output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,

____

P20/A0/D0 – P27/A7/D7, P30/WEL – P33/^_H^_L^_D^_A^_

P42/ 1, P43 – P47, P50 – P57, P60 – P67,

,

IOH(peak)

–10

–5

mA

P70 – P77, P80 – P87

___

High-level average output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,

____

P20/A0/D0 – P27/A7/D7, P30/WEL – P33/H^__L^_D^_A^_

,

IOH(avg)

IOL(peak)

P42/ 1, P43 – P47, P50 – P57, P60 – P67,

P70 – P77, P80 – P87

___

Low-level peak output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,

____

P20/A0/D0 – P27/A7/D7, P30/WEL – P33/^_H^_L^_D^_A^_

,

10

P42/ 1, P43, P54 – P57, P60 – P67, P70 – P77,

P80 – P87

Low-level peak output current P44 – P47, P50 – P53

20

5

mA

IOL(peak)

IOL(avg)

___

Low-level average output current P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15,

____

P20/A0/D0 – P27/A7/D7, P30/WEL – P33/^_H^_L^_D^_A^_

,

P42/ 1, P43, P54 – P57,P60 – P67, P70 – P77,

P80 – P87

IOL(avg)

f(XIN)

Low-level average output current P44 – P47, P50 – P53

Main-clock oscillation frequency (Note 4)

Sub-clock oscillation frequency

15

25

50

mA

MHz

kHz

f(XCIN)

32.768

____

Notes 1. Average output current is the average value of a 100 ms interval.

___

2. The sum of IOL(peak) for ports P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7, P30/WEL – P33/H^__L^_D^_A^_and P8 must

___

____

be 80 mA or less, the sum of IOH(peak) for ports P00/CS0 – P07/A17, P10/A8/D8 – P17/A15/D15, P20/A0/D0 – P27/A7/D7, P30/WEL – P33/

^_H^_L^_D^_A^_and P8 must be 80 mA or less, the sum of IOL(peak) for ports P4, P5, P6, and P7 must be 100 mA or less, and the sum of IOH(peak)

for ports P4, P5, P6, and P7 must be 80 mA or less.

3. Limits VIH and VIL for XCIN are applied when the sub clock external input selection bit = “1”.

4. The maximum value of f(XIN) = 12.5 MHz when the main clock division selection bit = “1”.

17

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

ELECTRICAL CHARACTERISTICS (Vcc = 5 V, Vss = 0 V, Ta = –20 to +85 °C, f(XIN) = 25 MHz, unless otherwise noted)

Limits

Typ.

Symbol

Parameter

___

Test conditions

Unit

Min.

Max.

High-level output voltage P00/CS

0

– P07/A17, P10/A8/D8 – P17/A15/D15,

_____

P20/A0/D0 – P27/A7/D7, P33/HLDA, P42/

1,

3

VOH

IOH = –10 mA

V

P43 – P47, P50 – P57, P60 – P67, P70 – P77,

P80 – P87

___

High-level output voltage P00/CS

0

– P07/A17, P10/A8/D8 – P17/A15/D15,

_____

VOH

4.7

IOH = –400

A

V

P20/A0/D0 – P27/A7/D7, P33/HLDA, P42/

1

____ ____

IOH = –10 mA

IOH = –400

3.1

4.8

3.4

4.8

High-level output voltage P30/WEL, P31/WEH, P32/ALE

A

____

IOH = –10 mA

IOH = –400

High-level output voltage RDE

___

V

Low-level output voltage P00/CS

0

– P07/A17, P10/A8/D8 – P17/A15/D15,

_____

P20/A0/D0 – P27/A7/D7, P33/HLDA, P42/

P43, P54 – P57, P60 – P67, P70 – P77,

P80 – P87

1,

VOL

IOL = 10 mA

2

Low-level output voltage P44 – P47, P50 – P53

VOL

IOL = 20 mA

IOL = 2 mA

2

V

___

Low-level output voltage P00/CS

0

– P07/A17, P10/A8/D8 – P17/A15/D15,

_____

0.45

P20/A0/D0 – P27/A7/D7, P33/HLDA, P42/

____ ____

1

IOL = 10 mA

IOL = 2 mA

IOL = 10 mA

IOL = 2 mA

1.9

0.43

1.6

VOL

Low-level output voltage P30/WEL, P31/WEH, P32/ALE

V

____

Low-level output voltage RDE

____ ___

0.4

Hysteresis HOLD, RDY, TA0IN – TA4IN, TB0IN – TB2IN,

____ ____ _____ ____ ____ ____

VT+ – VT–

0.4

1

V

INT0 – INT2, ADTRG, CTS0, CTS1, CTS2, CLK0,

___ ___

CLK1, CLK2, KI0 – KI3

_____

VT+ – VT–

0.2

0.1

0.5

0.4

V

Hysteresis RESET

Hysteresis XIN

Hysteresis XCIN (When external clock is input)

High-level input current P10/A8/D8 – P17/A15/D15,

P20/A0/D0 – P27/A7/D7, P43 – P47,

IIH

VI = 5 V

A

5

P50 – P57, P60 – P67, P70 – P77,

_____

P80 – P87, XIN, RESET, CNVss, BYTE

Low-level input current P10/A8/D8 – P17/A15/D15,

P20/A0/D0 – P27/A7/D7, P43 – P47,

IIL

–5

A

VI = 0 V

V^I= 0 V,

P50 – P53, P60, P61, P65 – P67, P70 – P77,

_____

P80 – P87, XIN, RESET, CNVss, BYTE

without a pull-up

–5

transistor

Low-level input current P54 – P57, P62 – P64

IIL

V^I= 0 V,

–0.5

–1.0

–0.25

mA

V

with a pull-up

transistor

RAM hold voltage

When clock is stopped.

2

VRAM

18

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

ELECTRICAL CHARACTERISTICS (Vcc = 5 V, Vss = 0 V, Ta = –20 to +85 °C, unless otherwise noted)

Limits

Typ.

Symbol

Parameter

Test conditions

Unit

mA

Min.

Max.

22.8

VCC = 5 V,

f(XIN) = 25 MHz (square waveform),

(f(f2) = 12.5 MHz),

f(XCIN) = 32.768 kHz,

in operating (Note 1)

11.4

1.6

VCC = 5 V,

f(XIN) = 25 MHz (square waveform),

(f(f2) = 1.5625 MHz),

f(XCIN): Stopped

3.2

mA

in operating (Note 1)

VCC = 5 V,

f(XIN) = 25 MHz (square waveform),

f(XCIN) = 32.768 kHz,

When external bus

is in use, output

pins are open, and

other pins are VSS.

Power source

current

10

60

5

20

120

10

ICC

A

when a WIT instruction is executed (Note 2)

VCC = 5 V,

f(XIN) : Stopped,

f(XCIN) = 32.768 kHz,

in operating (Note 3)

VCC = 5 V,

f(XIN) : Stopped,

f(XCIN) = 32.768 kHz,

when a WIT instruction is executed (Note 4)

Ta = 25 °C,

when clock is stopped

A

1

Ta = 85 °C,

when clock is stopped

20

Notes 1. This applies when the main clock external input selection bit = “1”, the main clock division selection bit = “0”, and the signal output stop

bit = “1”.

2. This applies when the main clock external input selection bit = “1” and the system clock stop bit at wait state = “1”.

3. This applies when CPU and the clock timer are operating with the sub clock (32.768 kHz) selected as the system clock.

4. This applies when the XCOUT drivability selection bit = “0” and the system clock stop bit at wait state = “1”.

A–D CONVERTER CHARACTERISTICS

(VCC = AVCC = 5 V, VSS = AVSS = 0 V, Ta = –20 to +85 °C, f(XIN) = 25 MHz, unless otherwise noted (Note))

Limits

Typ.

Symbol

Parameter

Test conditions

Unit

Min.

Max.

10

± 3

25

—

RLADDER

tCONV

VREF

VIA

Resolution

VREF = VCC

Bits

LSB

kΩ

s

V

Absolute accuracy

Ladder resistance

Conversion time

Reference voltage

Analog input voltage

10

9.44

2

VCC

VREF

0

Note. This applies when the main clock division selection bit = “0” and f(f2) = 12.5 MHz.

19

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

TIMING REQUIREMENTS (VCC = 5 V ± 10%, VSS = 0 V, Ta = –20 to +85 °C, f(XIN) = 25 MHz, unless otherwise noted (Note 1))

Notes 1. This applies when the main clock division selection bit = “0” and f(f2) = 12.5 MHZ.

2. Input signal’s rise/fall time must be 100 ns or less, unless otherwise noted.

External clock input

Limits

Symbol

Parameter

Unit

Min.

40

15

Max.

tc

External clock input cycle time (Note 1)

ns

tw(H)

tw(L)

tr

External clock input high-level pulse width (Note 2)

External clock input low-level pulse width (Note 2)

External clock rise time

15

8

tf

External clock fall time

Notes 1. When the main clock division selection bit = “1”, the minimum value of tc = 80 ns.

2. When the main clock division selection bit = “1”, values of tw(H) / tc and tw(L) / tc must be set to values from 0.45 through 0.55.

Microprocessor mode

Limits

Symbol

Parameter

Unit

Min.

60

0

Max.

tsu(P4D–RDE)

tsu(P5D–RDE)

tsu(P6D–RDE)

tsu(P7D–RDE)

tsu(P8D–RDE)

th(RDE–P4D)

th(RDE–P5D)

th(RDE–P6D)

th(RDE–P7D)

th(RDE–P8D)

Port P4 input setup time

Port P5 input setup time

Port P6 input setup time

Port P7 input setup time

Port P8 input setup time

Port P4 input hold time

Port P5 input hold time

Port P6 input hold time

Port P7 input hold time

Port P8 input hold time

ns

Microprocessor mode

Limits

Symbol

Parameter

Unit

Min.

32

55

0

Max.

tsu(D–RDE)

tsu(RDY– 1) RDY input setup time

tsu(HOLD– 1) HOLD input setup time

th(RDE–D)

th( 1–RDY)

Data input setup time

ns

___

____

Data input hold time

___

RDY input hold time

0

____

th( 1–HOLD) HOLD input hold time

20

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Timer A input (Count input in event counter mode)

Symbol Parameter

Limits

Unit

Min.

80

40

Max.

tc(TA)

TAiIN input cycle time

ns

tw(TAH)

tw(TAL)

TAiIN input high-level pulse width

TAiIN input low-level pulse width

40

Timer A input (Gating input in timer mode)

Limits

Symbol

Parameter

Unit

Min.

320

160

tc(TA)

TAiIN input cycle time (Note)

ns

tw(TAH)

tw(TAL)

TAiIN input high-level pulse width (Note)

TAiIN input low-level pulse width (Note)

Note. Limits change depending on f(XIN). Refer to “DATA FORMULAS”.

Timer A input (External trigger input in one-shot pulse mode)

Limits

Symbol

Parameter

Unit

Min.

320

80

Max.

tc(TA)

tw(TAH)

tw(TAL)

TAiIN input cycle time (Note)

TAiIN input high-level pulse width

TAiIN input low-level pulse width

ns

80

Note. Limits change depending on f(XIN). Refer to “DATA FORMULAS”.

Timer A input (External trigger input in pulse width modulation mode)

Limits

Symbol

Parameter

Unit

Min.

80

Max.

tw(TAH)

tw(TAL)

TAiIN input high-level pulse width

TAiIN input low-level pulse width

ns

Timer A input (Up-down input in event counter mode)

Symbol Parameter

Limits

Unit

Min.

2000

1000

400

tc(UP)

tw(UPH)

tw(UPL)

TAiOUT input cycle time

ns

TAiOUT input high-level pulse width

TAiOUT input low-level pulse width

TAiOUT input setup time

tsu(UP–TIN)

th(TIN–UP)

TAiOUT input hold time

400

Timer A input (Two-phase pulse input in event counter mode)

Symbol Parameter

Limits

Unit

Min.

800

200

Max.

tc(TA)

TAjIN input cycle time

ns

tsu(TAjIN–TAjOUT) TAjIN input setup time

tsu(TAjOUT–TAjIN) TAjOUT input setup time

21

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Timer B input (Count input in event counter mode)

Symbol Parameter

Limits

Unit

Min.

80

40

160

80

Max.

tc(TB)

TBiIN input cycle time (one edge count)

ns

tw(TBH)

tw(TBL)

tc(TB)

TBiIN input high-level pulse width (one edge count)

TBiIN input low-level pulse width (one edge count)

TBiIN input cycle time (both edges count)

tw(TBH)

tw(TBL)

TBiIN input high-level pulse width (both edges count)

TBiIN input low-level pulse width (both edges count)

80

Timer B input (Pulse period measurement mode)

Limits

Symbol

Parameter

Unit

Min.

320

160

Max.

tc(TB)

tw(TBH)

tw(TBL)

TBiIN input cycle time (Note)

TBiIN input high-level pulse width (Note)

TBiIN input low-level pulse width (Note)

ns

Note. Limits change depending on f(XIN). Refer to “DATA FORMULAS”.

Timer B input (Pulse width measurement mode)

Limits

Symbol

Parameter

Unit

Min.

320

160

tc(TB)

tw(TBH)

tw(TBL)

TBiIN input cycle time (Note)

TBiIN input high-level pulse width (Note)

TBiIN input low-level pulse width (Note)

ns

Note. Limits change depending on f(XIN). Refer to “DATA FORMULAS”.

A-D trigger input

Limits

Symbol

Parameter

Unit

Min.

1000

125

_____

tc(AD)

tw(ADL)

ADTRG input cycle time (minimum allowable trigger)

_____

ns

ADTRG input low-level pulse width

Serial I/O

Symbol

Parameter

Unit

Min.

200

100

Max.

80

tc(CK)

CLKi input cycle time

ns

tw(CKH)

tw(CKL)

td(C–Q)

th(C–Q)

tsu(D–C)

th(C–D)

CLKi input high-level pulse width

CLKi input low-level pulse width

TXDi output delay time

TXDi hold time

RXDi input setup time

RXDi input hold time

0

30

90

____

___

External interrupt INTi input, key input interrupt KIi input

Limits

Symbol

Parameter

Unit

Min.

250

Max.

____

tw(INH)

tw(INL)

tw(KIL)

INTi input high-level pulse width

____

ns

INTi input low-level pulse width

___

KIi input low-level pulse width

22

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

DATA FORMULAS

Timer A input ^{(Gating input in timer mode)}

Limits

Unit

Symbol

Parameter

Min.

Max.

8 ✕ 10⁹

2 • f(f2)

4 ✕ 10⁹

2 • f(f2)

4 ✕ 10⁹

2 • f(f2)

tc(TA)

TAiIN input cycle time

ns

tw(TAH)

tw(TAL)

TAiIN input high-level pulse width

TAiIN input low-level pulse width

Timer A input (External trigger input in one-shot pulse mode)

Symbol Parameter

Limits

Unit

ns

Min.

Max.

8 ✕ 10⁹

2 • f(f2)

tc(TA)

TAiIN input cycle time

Timer B input (In pulse period measurement mode or pulse width measurement mode)

Symbol Parameter

Limits

Unit

ns

Min.

Max.

8 ✕ 10⁹

2 • f(f2)

4 ✕ 10⁹

2 • f(f2)

10⁹

2 • f(f2)

tc(TB)

TBiIN input cycle time

tw(TBH)

tw(TBL)

TBiIN input high-level pulse width

TBiIN input low-level pulse width

ns

4

✕

ns

Note. f(f2) represents the clock f2 frequency.

For the relation to the main clock and sub clock, refer to Table 10 in data sheet “M37735MHBXXXFP”.

23

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

SWITCHING CHARACTERISTICS

(VCC = 5 V ± 10%, VSS = 0 V, Ta = –20 to +85°C, f(XIN) = 25 MHz, unless otherwise noted (Note))

Microprocessor mode

Limits

Unit

Symbol

Parameter

Test conditions

Fig. 14

Min.

Max.

80

td(WE–P4Q)

td(WE–P5Q)

td(WE–P6Q)

td(WE–P7Q)

td(WE–P8Q)

Port P4 data output delay time

Port P5 data output delay time

Port P6 data output delay time

Port P7 data output delay time

Port P8 data output delay time

ns

80

Note. This applies when the main clock division selection bit = “0” and f(f2) = 12.5 MHz.

CS0 – CS4

RSMP

A16, A17

A0/D0 – A15/D15

50 pF

WEL

WEH

ALE

HLDA

P 4

P 5

P 6

P 7

P 8

1

RDE

Fig. 14 Measuring circuit for each pin

24

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Microprocessor mode

(VCC = 5 V ± 10%, VSS = 0 V, Ta = –20 to +85 °C, f(XIN) = 25 MHz, unless otherwise noted (Note 1))

Limits

Test

conditions

(Note 2)

Symbol

Parameter

Unit

Wait mode

No wait

Wait 1

Min.

Max.

td(CS–WE)

td(CS–RDE)

12

87

4

ns

Chip-select output delay time

Wait 0

th(WE–CS)

th(RDE–CS)

Chip-select hold time

No wait

Wait 1

Wait 0

No wait

Wait 1

Wait 0

td(An–WE)

td(An–RDE)

12

ns

Address output delay time

87

12

ns

td(A–WE)

Address output delay time

Address hold time

td(A–RDE)

75

18

ns

th(WE–An)

th(RDE–An)

No wait

Wait 1

Wait 0

No wait

Wait 1

Wait 0

No wait

Wait 1

Wait 0

No wait

Wait 1

Wait 0

22

57

5

ns

tw(ALE)

ALE pulse width

Fig. 14

tsu(A–ALE)

th(ALE–A)

Address output setup time

Address hold time

45

9

ns

15

4

ns

td(ALE–WE)

td(ALE–RDE)

ALE output delay time

10

45

5

td(WE–DQ)

th(WE–DQ)

Data output delay time

Data hold time

ns

18

50

No wait

Wait 1

Wait 0

___ ___

tw(WE)

WEL/WEH pulse width

130

ns

tpxz(RDE–DZ)

tpzx(RDE–DZ)

ns

Floating start delay time

Floating release delay time

20

48

No wait

Wait 1

Wait 0

___

RDE pulse width

tw(RDE)

ns

128

____

RSMP output delay time

____

RSMP hold time

td(RSMP–WE)

td(RSMP–RDE)

10

0

ns

th(

1–RSMP)

td(WE–

td(RDE–

1)

0

1 output delay time

____

ns

18

50

td( 1–HLDA) HLDA output delay time

Notes 1. This applies when the main clock division selection bit = “0” and f(f2) = 12.5 MHz.

2. No wait : Wait bit = “1”.

Wait 1 : The external memory area is accessed with wait bit = “0” and wait selection bit = “1”.

Wait 0 : The external memory area is accessed with wait bit = “0” and wait selection bit = “0”.

25

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Microprocessor mode

Bus timing data formulas ^(VCC = 5 V ± 10%, VSS = 0 V, Ta = –20 to +85 °C, f(XIN) = 25 MHz (Max.), unless otherwise noted (Note1))

Limits

Symbol

Parameter

Unit

ns

Wait mode

No wait

Wait 1

Min.

1 ✕ 10⁹

2 • f(f2)

3 ✕ 10⁹

2 • f(f2)

Max.

–28

td(CS–WE)

td(CS–RDE)

Chip-select output delay time

Chip-select hold time

Wait 0

– 33

th(WE–CS)

th(RDE–CS)

4

No wait

Wait 1

1 ✕ 10⁹

2 • f(f2)

3 ✕ 10⁹

2 • f(f2)

1 ✕ 10⁹

2 • f(f2)

3 ✕ 10⁹

2 • f(f2)

1 ✕ 10⁹

2 • f(f2)

1 ✕ 10⁹

2 • f(f2)

2 ✕ 10⁹

2 • f(f2)

1 ✕ 10⁹

2 • f(f2)

2 ✕ 10⁹

2• f(f2)

– 28

– 33

– 28

– 45

– 22

– 18

– 23

– 35

td(An–WE)

Address output delay time

td(An–RDE)

Wait 0

No wait

Wait 1

td(A–WE)

Address output delay time

td(A–RDE)

Wait 0

th(WE–An)

Address hold time

ALE pulse width

th(RDE–An)

No wait

Wait 1

tw(ALE)

Wait 0

No wait

Wait 1

Address output setup time

Address hold time

tsu(A–ALE)

th(ALE–A)

Wait 0

No wait

Wait 1

9

1 ✕ 10⁹

2 • f(f2)

– 25

– 30

Wait 0

No wait

Wait 1

4

td(ALE–WE)

td(ALE–RDE)

ALE output delay time

1 ✕ 10⁹

2 • f(f2)

Wait 0

td(WE–DQ)

th(WE–DQ)

45

ns

Data output delay time

Data hold time

1 ✕ 10⁹

2 • f(f2)

2 ✕ 10⁹

2 • f(f2)

4 ✕ 10⁹

2 • f(f2)

– 22

– 30

ns

No wait

___ ___

WEL/WEH pulse width

tw(WE)

Wait 1

Wait 0

tpxz(RDE–DZ)

tpzx(RDE–DZ)

Floating start delay time

5

ns

1 ✕ 10⁹

2 • f(f2)

2 ✕ 10⁹

2 • f(f2)

4 ✕ 10⁹

2 • f(f2)

1 ✕ 10⁹

2 • f(f2)

– 20

– 32

– 30

Floating release delay time

ns

No wait

___

RDE pulse width

tw(RDE)

Wait 1

Wait 0

____

RSMP output delay time

____

td(RSMP–WE)

td(RSMP–RDE)

th(

td(WE–

td(RDE–

1–RSMP)

0

ns

RSMP hold time

1)

18

1 output delay time

0

Notes 1. This applies when the main clock division selection bit = “0”.

2. f(f2) represents the clock f2 frequency.

For the relation to the main clock and sub clock, refer to Table 10 in data sheet “M37735MHBXXXFP”.

26

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

TIMING DIAGRAM

tw(H)

tw(L)

tr

tf

tc

XIN

RDE, WEL, WEH

Port P4 output

Port P4 input

t

d(WE–P4Q)

h(RDE–P4D)

d(WE–P5Q)

h(RDE–P5D)

t

su(P4D–RDE)

Port P5 output

Port P5 input

tsu(P5D–RDE)

d(WE–P6Q)

Port P6 output

Port P6 input

tsu(P6D–RDE)

th(RDE–P6D)

td(WE–P7Q)

Port P7 output

Port P7 input

tsu(P7D–RDE)

th(RDE–P7D)

td(WE–P8Q)

Port P8 output

Port P8 input

tsu(P8D–RDE)

th(RDE–P8D)

27

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

t

c(TA)

tw(TAH)

TAiIN input

tw(TAL)

tc(UP)

t

w(UPH)

TAi^OUTinput

t

w(UPL)

In event count mode

TAiOUT input

(Up-down input)

TAi^INinput

(when count by falling)

TAi^INinput

t

h(TIN–UP)

tsu(UP–TIN)

(when count by rising)

In event counter mode

(When two-phase pulse input is selected)

tc(TA)

TAjIN input

t

su(TAjIN–TAjOUT)

t

su(TAjIN–TAjOUT)

t

su(TAjOUT–TAjIN)

TAj^OUTinput

t

su(TAjOUT–TAjIN)

t

c(TB)

tw(TBH)

TBiIN input

tw(TBL)

28

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

t

c(AD)

t

w(ADL)

ADTRG input

c(CK)

t

w(CKH)

CLK

i

t

w(CKL)

th(C–Q)

TxD

i

t

d(C–Q)

tsu(D–C)

th(C–D)

RxD

i

t

w(INL)

INTi input

Kli input

tw(INH)

tw(KNL)

29

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Microprocessor mode

(When wait bit = “1”)

1

WEL

WEH

RDE

RDY input

t

su(RDY–

1)

th(

1–RDY)

(When wait bit = “0”)

1

WEL

WEH

RDE

RDY input

t

su(RDY–

1)

t

h(

1–RDY)

(When wait bit = “1” or “0” in common)

1

tsu(HOLD–

1)

th(

1–HOLD)

HOLD input

td(

1–HLDA)

t

d(

1–HLDA)

HLDA output

Test conditions

• VCC = 5 V ± 10%

• Input timing voltage : VIL = 1.0 V, VIH = 4.0 V

• Output timing voltage : VOL = 0.8 V, VOH = 2.0 V

30

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Microprocessor mode

(No wait : When wait bit = “1”)

t

w(L)

t

w(H)

tf

tr

tc

X

IN

1

td(WE–

1)

t

d(WE–

1)

t

d(RDE–

1)

t

d(RDE–

1)

CS0

– CS4

td(CS–WE)

td(CS–RDE)

th(WE–CS)

th(RDE–CS)

An

Address

td(An–WE)

td(An–RDE)

t

h(RDE–An)

t

w(ALE)

td(ALE–WE)

th(WE–An)

ALE

td(ALE–RDE)

th(ALE–A)

tsu(A–ALE)

th(WE–DQ)

tpxz(RDE–DZ)

tpzx(RDE–DZ)

Am/Dm

Address

Data

Address

t

d(A–RDE)

td(WE–DQ)

t

d(A–WE)

t

w(WE)

th(RDE–D)

WEL, WEH

DmIN

t

su(D–RDE)

Data

tw(RDE)

RDE

th(

1–RSMP)

td(RSMP–RDE)

td(RSMP–WE)

RSMP

Test condition

• Vcc = 5 V ± 10%

• Output timing voltage : VOL = 0.8 V, VOH = 2.0 V

• Data input DmIN : VIL = 0.8 V, VIH = 2.5 V

31

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Microprocessor mode

(Wait 1 : The external area is accessed when wait bit = “0” and wait selection bit = “1”.)

tw(L)

tw(H)

tf

t

r

tc

XIN

1

td(WE–

1)

t

d(WE–

1)

td(RDE–

1)

t

d(RDE-

1)

CS0

– CS4

th(WE–CS)

t

h(RDE–CS)

t

d(CS–RDE)

td(CS–WE)

Address

An

t

h(RDE–An)

t

d(An–WE)

td(An–RDE)

t

h(WE-An)

tw(ALE)

t

d(ALE–WE)

ALE

th(ALE–A)

td(ALE–RDE)

tpzx(RDE–DZ)

tpxz(RDE–DZ)

t

su(A–ALE)

t

h(WE–DQ)

Am/Dm

Address

Data

Address

td(WE–DQ)

td(A–WE)

td(A–RDE)

t

w(WE)

t

h(RDE–D)

WEL, WEH

DmIN

t

su(D–RDE)

Data

t

w(RDE)

RDE

th(

1–RSMP)

t

d(RSMP–RDE)

td(RSMP–WE)

RSMP

Test condition

• Vcc = 5 V ± 10%

• Output timing voltage : VOL = 0.8 V, VOH = 2.0 V

• Data input DmIN : VIL = 0.8 V, VIH = 2.5 V

32

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Microprocessor mode

(Wait 0 : The external memory are is accessed when wait bit = “0” and wait selection bit = “0”.)

t

w(L)

t

w(H)

t

f

tr

tc

X

IN

1

t

d(WE–

1)

td(RDE–

1)

td(RDE–

1)

t

d(WE–

1)

CS

An

0

– CS4

t

h(WE–CS)

t

d(CS–WE)

t

d(CS–RDE)

t

h(RDE–CS)

Address

t

d(An–WE)

w(ALE)

t

d(An–RDE)

t

h(RDE–An)

t

h(WE–An)

td(ALE–WE)

ALE

td(ALE–RDE)

t

su(A–ALE)

th(ALE–A)

t

pxz(RDE–DZ)

t

h(WE–DQ)

tpzx(RDE–DZ)

Am/Dm

Address

Data

Address

t

d(WE–DQ)

t

d(A–WE)

t

d(A–RDE)

tw(WE)

WEL, WEH

tsu(D–RDE)

th(RDE–D)

Data

DmIN

t

w(RDE)

RDE

t

d(RSMP–RDE)

th(

1–RSMP)

t

d(RSMP–WE)

RSMP

Test conditions

• Vcc = 5 V ± 10%

• Output timing voltage : VOL = 0.8 V, VOH = 2.0 V

• Data input DmIN : VIL = 0.8 V, VIH = 2.5 V

33

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

PACKAGE OUTLINE

34

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

MEMO

35

MITSUBISHI MICROCOMPUTERS

M37735S4BFP

16-BIT CMOS MICROCOMPUTER

Keep safety first in your circuit designs!

•

Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with

semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of

substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap.

Notes regarding these materials

•

These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer’s application; they do not convey any license under any

intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party.

Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party’s rights, originating in the use of any product data, diagrams, charts or circuit application examples

contained in these materials.

All information contained in these materials, including product data, diagrams and charts, represent information on products at the time of publication of these materials, and are subject to change by Mitsubishi

Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor

product distributor for the latest product information before purchasing a product listed herein.

•

Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact

Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for

transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use.

•

The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials.

If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the

approved destination.

Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.

•

Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein.

H-LF426-A KI-9606 Printed in Japan (ROD)

New publication, effective Jun. 1996.

Specifications subject to change without notice.


型号：	M37735S4BFP
厂家：	RENESAS TECHNOLOGY CORP
描述：	16-BIT CMOS MICROCOMPUTER 16位微机的CMOS 微控制器和处理器外围集成电路计算机时钟
文件：	总37页 (文件大小：846K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

M37735S4BFP [RENESAS]

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