ISL32743EIBZ-T7A [RENESAS]
Isolated 3.3V Half-Duplex 40Mbps RS-485 Transceiver;
| 型号： | ISL32743EIBZ-T7A |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Isolated 3.3V Half-Duplex 40Mbps RS-485 Transceiver PC 接口集成电路 |
| 文件： | 总19页 (文件大小：808K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
ISL32743E
Isolated 3.3V Half-Duplex 40Mbps RS-485 Transceiver
FN8987
Rev. 1.00
Jul 9, 2018
The ISL32743E is a galvanically isolated high-speed
Features
• 40Mbps data rate
differential bus transceiver, designed for bidirectional
data communication on balanced transmission lines. The
device uses Giant Magnetoresistance (GMR) as its
isolation technology.
• 2.5kV isolation/600V
working voltage
RMS
RMS
• 3.3V bus
The part is available in a 16 Ld SOICW package
providing a true 8mm creepage distance.
• 20ns propagation delay
• 5ns pulse skew
A unique ceramic/polymer composite barrier provides
excellent isolation and 44000 years of barrier life.
• 1/5 unit load allows up to 160 devices on the bus
• 50kV/µs (typical), 30kV/µs (minimum)
common-mode transient immunity
The device is compatible with 3V and 5V input supplies,
allowing an interface to standard microcontrollers
without additional level shifting.
• 16.5kV ESD protection
Current limiting and thermal shutdown features protect
against output short-circuits and bus contention that may
cause excessive power dissipation. Receiver inputs are a
full fail-safe design, ensuring a logic high R-output if
A/B are floating or shorted.
• Low EMC footprint
• Thermal shutdown protection
• Temperature range: -40°C to +85°C
• Meets or exceeds ANSI RS-485 and
ISO 8482:1987(E)
Applications
• Factory automation
• True 8mm 16 Ld SOICW packages
• UL 1577 recognized
• Building environmental control systems
• Process control networks
• VDE V 0884-11 pending
• Equipment covered under IEC 61010-1 Edition 3
Related Literature
For a full list of related documents, visit our website
• ISL32743E product page
Isolation
Barrier
Isolation
Barrier
3.3V
1
3.3V
3.3V
3.3V
100n
100n
100n
100n
16
16
1
VDD1
R
542R
135R
VDD1
VDD2
VDD2
3
4
5
6
3
R
12
13
10
12
13
10
A
B
A
4
5
6
120R
RE
DE
D
RE
B
DE
ISODE
ISODE
D
542R
GND1
2,8
GND2
GND2
GND1
2,8
9,15
9,15
ISL32743EIBZ
ISL32743EIBZ
Figure 1. Typical Application
FN8987 Rev. 1.00
Jul 9, 2018
Page 1 of 19
ISL32743E
1. Overview
1. Overview
1.1
Typical Operating Circuits
3.3V
3.3V
Isolation
Barrier
100n
100n
1
16
VDD2
VDD1
5
6
DE
ISODE 10
1.09k
127R
1.09k
A 12
B 13
D
3
4
R
RE
GND1
2,8
GND2
9,15
ISL32743EIBZ
Figure 2. Typical Operating Circuit
1.2
Ordering Information
Part Number
(Notes 2, 3)
Temp. Range
(°C)
Tape and Reel
(Units) (Note 1)
Package
(RoHS Compliant)
Part Marking
32743EIBZ
Pkg. Dwg. #
M16.3A
ISL32743EIBZ
ISL32743EIBZ-T
ISL32743EIBZ-T7A
Notes:
-40 to +85
-40 to +85
-40 to +85
-
16 Ld SOICW
16 Ld SOICW
16 Ld SOICW
32743EIBZ
1k
M16.3A
M16.3A
32743EIBZ
250
1. Refer to TB347 for details about reel specifications.
2. Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
3. For Moisture Sensitivity Level (MSL), refer to the ISL32743E product information page. For more information about MSL, refer to
TB363.
Table 1. Key Differences Between Family of Parts
V
(V)
V
(V)
Data Rate
(Mbps)
Isolation Voltage
(kV
DD1
DD2
Part Number
ISL32704E
Full/Half Duplex
)
RMS
Half
Full
Half
Half
Half
Full
3.0 – 5.5
3.0 – 5.5
3.0 – 5.5
3.0 – 5.5
3.0 – 5.5
3.0 – 5.5
4.5 – 5.5
4.5 – 5.5
4.5 – 5.5
4.5 – 5.5
3.0 – 3.6
4.5 – 5.5
4
2.5
2.5
2.5
6
ISL32705E
ISL32740E
ISL32741E
ISL32743E
ISL32745E
4
40
40
40
40
2.5
6
FN8987 Rev. 1.00
Jul 9, 2018
Page 2 of 19
ISL32743E
1. Overview
1.3
Pin Configurations
ISL32743E
(16 Ld SOICW)
Top View
VDD1
GND1
R
1
2
3
4
5
6
7
8
16 VDD2
15 GND2
14 NC
13 B
RE
DE
12 A
D
11 NC
10 ISODE
NC
GND1
9
GND2
DE
D
ISODE
B
A
R
RE
1.4
Truth Tables
Transmitting
Inputs
Outputs
DE
1
D
ISODE
B
A
1
0
X
1
1
0
0
1
1
0
1
0
High-Z
High-Z
Receiving
Inputs
Output
RE
0
A-B
≥ -0.05V
RO
V
1
AB
0
-0.05 > V > -0.2V
Undetermined
AB
0
V
≤ -0.2V
0
1
AB
0
Inputs Open/Shorted
X
1
High-Z
FN8987 Rev. 1.00
Jul 9, 2018
Page 3 of 19
ISL32743E
1. Overview
1.5
Pin Descriptions
Pin Number
16 Ld SOICW
Pin
Name
Function
1
2, 8
3
VDD1 Input power supply.
GND1 Input power supply ground return. Pin 2 is internally connected to Pin 8 (for SOIC package).
R
Receiver output: If A-B ≥-50mV, R is high; If A-B ≤-200mV, R is low; R = High if A and B are unconnected
(floating) or shorted, or connected to a terminated bus that is not driven.
4
5
RE
DE
Receiver output enable. R is enabled when RE is low; R is high impedance when RE is high. If the Rx
enable function is not required, connect RE directly to GND1.
Driver output enable. The driver outputs, A and B, are enabled by bringing DE high. They are high
impedance when DE is low. If the Tx enable function is not required, connect DE to VDD1 through a 1kΩ
or greater resistor.
6
D
Driver input. A low on D forces output A low and output B high. Similarly, a high on D forces output A high
and output B low.
7, 11, 14
9, 15
10
NC
No internal connection.
GND2 Output power supply ground return. Dual ground pins are connected internally.
ISODE Isolated DE output for use in applications in which the state of the isolated drive enable node needs to be
monitored.
12
13
16
A
±16.5kV IEC61000 ESD protected RS-485/RS422 level, noninverting receiver input if DE = 0 and
noninverting driver output if DE = 1.
B
±16.5kV IEC61000 ESD protected RS-485/RS422 level, inverting receiver input if DE = 0 and inverting
driver output if DE = 1.
VDD2 Output power supply.
FN8987 Rev. 1.00
Jul 9, 2018
Page 4 of 19
ISL32743E
2. Specifications
2. Specifications
2.1
Absolute Maximum Ratings
Parameter (Note 4)
Minimum
-0.5
Maximum
Unit
Supply Voltages (Note 7)
VDD1 to GND1
VDD2 to GND2
Input Voltages D, DE, RE
Input/Output Voltages
A, B
+7
7
V
V
V
-0.5
VDD1 + 0.5
-9
+13
V
V
V
R
-0.5
VDD1 + 1
Short-Circuit Duration A, B
ESD Rating
Continuous
See “Electrical Specifications” on page 7
Note:
4. Absolute Maximum specifications mean the device will not be damaged if operated under these conditions. It does not
guarantee performance.
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may
adversely impact product reliability and result in failures not covered by warranty.
2.2
Thermal Information
Thermal Resistance (Typical)
(°C/W)
(°C/W)
JC
JA
16 Ld SOICW Package (Notes 5, 6)
Notes:
43
20
5. is measured in free air with the component soldered to a double-sided board.
JA
6. For , the “case temp” location is the center of the package top side.
JC
Parameter
Maximum Junction Temperature (Plastic Package)
Maximum Storage Temperature Range
Maximum Power Dissipation
Minimum
-55
Maximum
Unit
°C
+150
+150
800
-55
°C
mW
Pb-Free Reflow Profile
see TB493
2.3
Recommended Operation Conditions
Parameter
Minimum
Maximum
Unit
Supply Voltages
V
V
3.0
3.0
5.5
3.6
V
V
DD1
DD2
High-Level Digital Input Voltage, V
IH
V
V
= 3.3V
= 5.0V
2.4
3.0
0
V
V
V
V
V
V
DD1
DD1
DD1
DD1
Low-Level Digital Input Voltage, V
0.8
12
IL
Differential Input Voltage, V (Note 8)
ID
-7
FN8987 Rev. 1.00
Jul 9, 2018
Page 5 of 19
ISL32743E
2. Specifications
Parameter
High-Level Output Current (Driver), I
Minimum
Maximum
Unit
mA
mA
mA
mA
°C
60
8
OH
High-Level Digital Output Current (Receiver), I
OH
Low-Level Output Current (Driver), I
-60
OL
Low-Level Digital Output Current (Receiver), I
Junction Temperature, T
-8
OL
-40
-40
+110
+85
J
Ambient Operating Temperature, T
°C
A
Digital Input Signal Rise and Fall Times, t , t
IR IF
DC Stable
2.4
Electrical Specifications
Test conditions: T
min
to T = 3.0V to 3.6V; unless otherwise stated (Note 7).
, V
max DD2
Typ
(Note 11) Max Unit
Parameter
DC Characteristics
Driver Line Output Voltage (V , V )
Symbol
Test Conditions
Min
V
No load
No load
-
-
V
V
A
B
O
DD2
DD2
(Note 7)
Driver Differential Output Voltage (Note 8)
Driver Differential Output Voltage (Note 8)
V
-
-
V
V
V
V
V
OD1
OD2
OD3
V
V
R
R
= 54Ω
= 60Ω
1.5
1.5
2.1
2.0
L
L
DD2
-
Driver Differential Output Voltage
(Notes 8, 12)
Change in Magnitude of Differential
Output Voltage (Note 13)
V
R
= 54Ω or 100Ω
-
0.01
0.20
V
OD
L
Driver Common-Mode Output Voltage
V
R
R
= 54Ω or 100Ω
= 54Ω or 100Ω
-
-
2
2.5
V
V
OC
L
L
Change in Magnitude of Driver
V
0.02
0.20
OC
Common-Mode Output Voltage (Note 13)
Bus Input Current (A, B) (Notes 10, 14)
I
DE = 0V
V
V
= 12V
= -7V
-
220
µA
µA
µA
µA
IN2
IN
-160
IN
High-Level Input Current (DI, DE, RE)
Low-Level Input Current (DI, DE, RE)
Absolute Short-Circuit Output Current
Supply Current
I
V = 3.5V
-
-
-
10
-
IH
I
I
V = 0.4V
-10
IL
I
I
DE = V
, -7V ≤ V or V ≤ 12V
-
-
±250 mA
OS
DD1
A
B
I
V
V
= 5V
-
4
3
-
6
4
mA
mA
mV
mV
mV
pF
V
DD1
DD1
DD1
= 3.3V
-
Positive-Going Input Threshold Voltage
Negative-Going Input Threshold Voltage
Receiver Input Hysteresis
V
-7V ≤ V
-7V ≤ V
≤ 12V
≤ 12V
-
-50
-
TH+
CM
CM
V
-200
-
TH-
V
V
= 0V
CM
-
-
28
9
-
-
HYS
Differential Bus Input Capacitance
Receiver Output High Voltage
Receiver Output Low Voltage
High impedance Output Current
Receiver Input Resistance
C
12
-
D
V
I
I
= -20µA, V = -50mV
ID
V
- 0.2
OH
O
O
DD2
-
V
= +20µA, V = -200mV
ID
-
0.2
1
V
OL
I
0.4V ≤ V ≤ (V
DD2
- 0.5)
-1
-
µA
kΩ
mA
OZ
O
R
-7V ≤ V
≤ 12V
54
-
80
5
-
IN
CM
Supply Current
I
DE = V
, no load
16
DD2
DD1
FN8987 Rev. 1.00
Jul 9, 2018
Page 6 of 19
ISL32743E
2. Specifications
Test conditions: T
to T = 3.0V to 3.6V; unless otherwise stated (Note 7). (Continued)
, V
min
max DD2
Typ
(Note 11) Max Unit
Parameter
ESD Performance
Symbol
Test Conditions
Min
RS-485 Bus Pins (A, B)
IEC61000-4-2, air-gap discharge to GND2
IEC61000-4-2, contact discharge to GND2
-
-
-
±16.5
±9
-
-
-
kV
kV
kV
Human Body Model discharge (HBM) to
GND2
±16.5
All Pins (R, RE, D, DE)
Human Body Model discharge (HBM) to
GND1
-
±2
-
kV
Switching Characteristics
V
= 5V, V
= 3.3V
DD2
DD1
Data Rate
DR
R
= 54Ω, C = 50pF
40
-
-
-
Mbps
ns
L
L
Propagation Delay (Notes 8, 15)
Pulse Skew (Notes 8, 16)
t
V
= -1.5V to 1.5V, C = 15pF
20
1
30
5
PD
(P)
O
O
L
t
V
= -1.5V to 1.5V, C = 15pF
-
ns
SK
L
Skew Limit (Note 9)
t
(LIM)
R
= 54Ω, C = 50pF
L
-
2
10
30
30
30
30
-
ns
SK
L
Output Enable Time to High Level
Output Enable Time to Low Level
Output Disable Time from High Level
Output Disable Time from Low Level
Common-Mode Transient Immunity
t
C
C
C
C
= 15pF
= 15pF
= 15pF
= 15pF
-
15
15
15
15
50
ns
PZH
L
t
-
ns
PZL
L
t
-
ns
PHZ
L
t
-
ns
PLZ
L
CMTI
V
= 1500 V , t
DC TRANSIENT
= 25ns
30
kV/µs
CM
V
= 3.3V, V
= 3.3V
DD2
DD1
Data Rate
DR
R
= 54Ω, C = 50pF
40
-
-
-
Mbps
ns
L
L
Propagation Delay (Notes 8, 9)
Pulse Skew (Notes 8, 9)
t
V
= -1.5V to 1.5V, C = 15pF
25
2
35
5
PD
(P)
O
O
L
t
V
= -1.5V to 1.5V, C = 15pF
-
ns
SK
L
Skew Limit (Note 9)
t
(LIM)
R
= 54Ω, C = 50pF
L
-
4
10
30
30
30
30
-
ns
SK
L
Output Enable Time to High Level
Output Enable Time to Low Level
Output Disable Time from High Level
Output Disable Time from Low Level
Common-Mode Transient Immunity
t
C
C
C
C
= 15pF
= 15pF
= 15pF
= 15pF
-
17
17
17
17
50
ns
PZH
L
t
-
ns
PZL
L
t
-
ns
PHZ
L
t
-
ns
PLZ
L
CMTI
V
= 1500 V , t
DC TRANSIENT
= 25ns
30
kV/µs
CM
Notes: (Apply to both driver and receiver sections)
7. All voltages on the isolator primary side are with respect to GND1. All line voltages and common-mode voltages on the isolator
secondary or bus side are with respect to GND2.
8. Differential I/O voltage is measured at the noninverting bus Terminal A with respect to the inverting Terminal B.
9. Skew limit is the maximum propagation delay difference between any two devices at +25°C.
10. The power-off measurement in ANSI Standard EIA/TIA-422-B applies to disabled outputs only and is not applied to combined
inputs and outputs.
11. All typical values are at V
, V
= 5V or V
= 3.3V and T = +25°C.
DD1 A
DD1 DD2
12. -7V < V
< 12V; 4.5 < V < 5.5V.
CM
and V
DD
are the changes in magnitude of V
13. V
and V
respectively, that occur when the input is changed from one
OD
OD
OC
OD
logic state to the other.
14. This applies for both power-on and power-off; refer to ANSI standard RS-485 for the exact condition. The EIA/TIA-422 -B limit
does not apply for a combined driver and receiver terminal.
15. Includes 10ns read enable time. Maximum propagation delay is 25ns after read assertion.
16. Pulse skew is defined as |t
- t | of each channel.
PLH PHL
FN8987 Rev. 1.00
Jul 9, 2018
Page 7 of 19
ISL32743E
2. Specifications
2.5
Insulation Specifications
Parameter
Symbol
Test Conditions
Per IEC 60601
Min
Typ
8.3
13
Max
Unit
mm
µm
Ω
Creepage Distance (External)
Total Barrier Thickness (Internal)
Barrier Resistance
8.03
-
-
-
-
-
-
-
-
-
-
14
R
C
500V
-
>10
IO
IO
Barrier Capacitance
f = 1MHz
-
7
pF
Leakage Current
240V
, 60Hz
-
0.2
µA
RMS
RMS
RMS
RMS
Comparative Tracking Index
CTI
Per IEC 60112
≥600
1000
1500
-
-
V
V
High Voltage Endurance (Maximum
Barrier Voltage for Indefinite Life)
V
At maximum operating temperature
-
-
IO
V
DC
Barrier Life
100°C, 1000V
energy
, 60% CL activation
44000
Years
RMS
2.6
Magnetic Field Immunity
Parameter (Note 17)
= 5V, V = 3.3V
Symbol
Test Conditions
Min
Typ
Max
Unit
V
DD1
DD2
Power Frequency Magnetic Immunity
Pulse Magnetic Field Immunity
H
50Hz/60Hz
t = 8µs
P
-
-
-
-
3500
4500
4500
2.5
-
-
-
-
A/m
A/m
A/m
PF
H
PM
Damped Oscillatory Magnetic Field
H
0.1Hz to 1MHz
OSC
Cross-Axis Immunity Multiplier
(Note 18)
K
X
V
= 3.3V, V
= 3.3V
DD2
DD1
Power Frequency Magnetic Immunity
Pulse Magnetic Field Immunity
H
50Hz/60Hz
-
-
-
-
1500
2000
2000
2.5
-
-
-
-
A/m
A/m
A/m
PF
H
t = 8µs
P
PM
Damped Oscillatory Magnetic Field
H
0.1Hz to1MHz
OSC
Cross-Axis Immunity Multiplier
(Note 18)
K
X
Notes:
17. The relevant test and measurement methods are given in “Electromagnetic Compatibility” on page 10.
18. External magnetic field immunity is improved by this factor if the field direction is “end-to-end” rather than “pin-to-pin”. See
“Electromagnetic Compatibility” on page 10.
FN8987 Rev. 1.00
Jul 9, 2018
Page 8 of 19
ISL32743E
3. Safety and Approvals
3. Safety and Approvals
3.1
VDE V 0884-11 (Certification Pending)
Basic Isolation; File Number: Certifications pending
• Working voltage (V ) 600V (848V ); Basic insulation, Pollution degree 2
IORM PK
RMS
• Transient overvoltage (V
) 4000V
PK
IOTM
• Each part tested at 1590V for 1s, 5pC partial discharge limit
PK
• Samples tested at 4000V for 60s, then 1358V for 10s with 5pC partial discharge limit
PK
PK
Symbol
Safety-Limiting Values
Value
180
270
54
Unit
°C
T
P
Safety Rating Ambient Temperature
Safety Rating Power (+180°C)
S
mW
mA
S
I
Supply Current Safety Rating (Total of supplies)
S
3.2
UL 1577
Component Recognition Program File Number: E483309
• Working voltage (V ) 600V (848V ); basic insulation, Pollution degree 2
IORM PK
RMS
• Transient overvoltage (V
) 4000V
IOTM
• Each part tested at 3000V
PK
(4243V ) for 1s
RMS
• Each lot of samples tested at 2500V
PK
(3536V ) for 60s
RMS
PK
FN8987 Rev. 1.00
Jul 9, 2018
Page 9 of 19
ISL32743E
4. Electromagnetic Compatibility
4. Electromagnetic Compatibility
The ISL32743E is fully compliant with generic EMC standards EN50081, EN50082-1, and the umbrella line-voltage
standard for Information Technology Equipment (ITE) EN61000. The isolator’s Wheatstone bridge configuration and
differential magnetic field signaling ensure excellent EMC performance against all relevant standards. Compliance
tests have been conducted in the following categories:
Table 2. Compliance Test Categories
EN50081-1
EN50082-2
EN50204
Residential, Commercial, and
Light Industrial:
Industrial Environment
EN61000-4-2 (ESD)
Radiated field from digital
telephones
Methods EN55022, EN55014
EN61000-4-3 (Electromagnetic Field Immunity)
EN61000-4-4 (EFT)
EN61000-4-6 (RFI Immunity)
EN61000-4-8 (Power Frequency Magnetic Field immunity)
EN61000-4-9 (Pulsed Magnetic Field)
EN61000-4-10 (Damped Oscillatory Magnetic Field)
Immunity to external magnetic fields is even higher if the field direction
is “end-to-end” rather than “pin-to-pin” as shown on the right.
FN8987 Rev. 1.00
Jul 9, 2018
Page 10 of 19
ISL32743E
5. Application Information
5. Application Information
The ISL32743E is an isolated half-duplex RS-485 transceiver designed for low bus voltage, high-speed data networks.
5.1
RS-485 and Isolation
RS-485 is a differential (balanced) data transmission standard for use in long haul networks or noisy environments. It
is a true multipoint standard, which allows up to 32 one-unit load devices (any combination of drivers and receivers)
on a bus. To allow for multipoint operation, the RS-485 specification requires that drivers must handle bus contention
without sustaining any damage.
An important advantage of RS-485 is its wide common-mode range, which specifies that the driver outputs and the
receiver inputs withstand signals ranging from +12V to -7V. This common-mode range is the sum of the ground
potential difference between driver and receiver, V
, the driver output common-mode offset, V , and the
GPD
OC
longitudinally coupled noise along the bus lines, V : V
= V
+ V
+ V .
n
n
CM
GPD
OC
V
CC1
V
CC2
V
N
D
R
R
T
R
T
D
R
V
OC
V
CM
V
GPD
GND
GND
2
1
Figure 3. Common-Mode Voltages in a Non-Isolated Data Link
However, in networks using isolated transceivers, such as the ISL32743E, the supply and signal paths of the driver
and receiver bus circuits are galvanically isolated from their local mains supplies and signal sources.
V
CC1
V
V
CC2
CC2-ISO
V
N
ISO
D
R
R
T
R
T
D
R
V
CM
= 0V
R
ISO
V
OC
V
CM
GND
2-ISO
V
GPD
GND
GND
2
1
Figure 4. Common-Mode Voltages in an Isolated Data Link
Because the ground potentials of isolated bus nodes are isolated from each other, the common-mode voltage of one
node’s output has no effect on the bus inputs of another node. This is because the common-mode voltage is
14
dropping across the high-resistance isolation barrier of 10 Ω. Thus, galvanic isolation extends the maximum
allowable common-mode range of a data link to the maximum working voltage of the isolation barrier, which is
600V
for the ISL32743E.
RMS
FN8987 Rev. 1.00
Jul 9, 2018
Page 11 of 19
ISL32743E
5. Application Information
5.2
Digital Isolator Principle
The ISL32743E uses a Giant Magnetoresistance (GMR) isolation. Figure 5 shows the principle operation of a
single channel GMR isolator.
External B-Field
V
DD2
Internal
B-Field
GMR1
GMR3
GMR2
In
Out
GMR4
GND2
Figure 5. Single Channel GMR Isolator
The input signal is buffered and drives a primary coil, which creates a magnetic field that changes the resistance of
the GMR resistors 1 to 4. GMR1 to GMR4 form a Wheatstone bridge to create a bridge output voltage that reacts
only to magnetic field changes from the primary coil. However, large external magnetic fields are treated as
common-mode fields, and are therefore suppressed by the bridge configuration. The bridge output is fed into a
comparator with an output signal that is identical in phase and shape to the input signal.
5.3
GMR Resistor in Detail
Figure 6 shows a GMR resistor consisting of ferromagnetic alloy layers, B1 and B2, sandwiched around an ultra
thin, nonmagnetic conducting middle layer A, typically copper. The GMR structure is designed so that the
magnetic moments in B1 and B2 face opposite directions in the absence of a magnetic field, thus causing heavy
electron scattering across layer A, which increases its resistance for current C drastically. When a magnetic field D
is applied, the magnetic moments in B1 and B2 are aligned and electron scattering is reduced. This lowers the
resistance of layer A and increases current C.
High
Low
Resistance
Resistance
B1
B1
C
C
C
C
A
A
B2
B2
D
Applied Magnetic
Field
Figure 6. Multilayer GMR Resistor
FN8987 Rev. 1.00
Jul 9, 2018
Page 12 of 19
ISL32743E
5. Application Information
5.4
Low Emissions
Because GMR isolators do not use complex encoding schemes, such as RF carriers or high-frequency clocks, and
do not include power transfer coils or transformers, their radiated emission spectrum is practically undetectable.
60
50
40
30
20
10
0
FCC-B < 1GHz 3m
EN55022 < 1GHz 3m
Laboratory Noise Floor
10MHz
100MHz
1GHz
Figure 7. Undetectable Emissions of GMR Isolators
5.5
Low EMI Susceptibility
Because GMR isolators have no pulse trains or carriers to interfere with, they also have very low EMI susceptibility.
For the list of compliance tests conducted on GMR isolators, refer to “Electromagnetic Compatibility” on page 10.
5.6
Receiver (Rx) Features
This transceiver uses a differential input receiver for maximum noise immunity and common-mode rejection. The
input sensitivity range is from -50mV to -200mV.
The receiver input resistance is about five times higher than the RS-485 Unit Load (UL) requirement of 12kΩ. The
receiver includes a “fail-safe if open or shorted” function that guarantees a high level receiver output if the receiver
inputs are unconnected (floating), shorted, or connected to an undriven, terminated bus. The receiver output is
tri-statable through the active low RE input.
5.7
Driver (Tx) Features
The 3.3V RS-485 driver is a differential output device that delivers at least 1.5V across a 54Ω purely differential
load. The driver features low propagation delay skew to maximize bit width and to minimize EMI.
The ISL32743E driver is tri-statable through the active high DE input. The ISL32743E driver outputs are not slew
rate limited, so faster output transition times allow data rates of at least 40Mbps.
5.8
Built-In Driver Overload Protection
As stated previously, the RS-485 specification requires that drivers survive worst-case bus contentions undamaged.
The ISL32743E transmitter meets this requirement through driver output short-circuit current limits and on-chip thermal
shutdown circuitry.
The driver output stage incorporates short-circuit current limiting circuitry, which ensures that the output current
never exceeds the RS-485 specification. In the event of a major short-circuit condition, the device’s thermal
shutdown feature disables the driver whenever the die temperature becomes excessive. This eliminates the power
dissipation, allowing the die to cool. The driver automatically re-enables after the die temperature drops about
15°C. If the condition persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. The receiver
stays operational during thermal shutdown.
FN8987 Rev. 1.00
Jul 9, 2018
Page 13 of 19
ISL32743E
5. Application Information
5.9
Dynamic Power Consumption
The ISL32743E isolator achieves its low power consumption from the way it transmits data across the barrier. By
detecting the edge transitions of the input logic signal and converting these to narrow current pulses, a magnetic
field is created around the GMR Wheatstone bridge. Depending on the direction of the magnetic field, the bridge
causes the output comparator to switch following the input signal. Because the current pulses are narrow (about
2.5ns), the power consumption is independent of the mark-to-space ratio and depends solely on frequency.
Table 3. Supply Current Increase with Data Rate
Data Rate (Mbps)
I
(mA)
I
(mA)
DD1
DD2
1
0.15
0.15
10
20
40
1.5
3
1.5
3
6
6
5.10 Power Supply Decoupling
Bypass both supplies, V
and V
, with 100nF ceramic capacitors. Place the capacitors as close as possible to
DD1
DD2
the supply pins for proper operation.
5.11 DC Correctness
The ISL32743E incorporates a patented refresh circuit to maintain the correct output state with respect to data input.
At power-up, the bus outputs follow the truth tables on page 3. Hold the DE input low during power-up to prevent
false drive data pulses on the bus.
5.12 Data Rate, Cables, and Terminations
RS-485 is intended for network lengths up to 4000 feet, but the maximum system data rate decreases as the
transmission length increases. Devices operating at 40Mbps are typically limited to lengths less than 50 feet, but
are capable of driving up to 100 feet of cable when allowing for some jitter of 5%.
Twisted pair is the cable of choice for RS-485 networks. Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common-mode signals, which are effectively rejected by the differential
receivers in these ICs.
To minimize reflections, proper termination is imperative when using this high data rate transceiver. In multipoint
(multiple driver) networks, terminate the main cable in its characteristic impedance (typically 120Ω for RS-485) at
both cable ends. Keep stubs connecting the transceivers to the main cable as short as possible.
A useful guideline for determining the maximum stub lengths is given with Equation 1.
t
r
(EQ. 1)
------
L
v c
S
10
where:
• L is the stub length (ft)
S
• t is the driver rise time (s)
r
• c is the speed of light (9.8 x 108 ft/s)
• v is the signal velocity as a percentage of c.
To ensure the receiver outputs of all bus transceivers are high when the bus is not actively driven, Renesas
recommends fail-safe biasing of the bus lines. Figure 8 on page 15 shows the proper termination of a high-speed
data link with fail-safe biasing.
FN8987 Rev. 1.00
Jul 9, 2018
Page 14 of 19
ISL32743E
5. Application Information
VS
RB
RT2
RB
RT1
120R
GND
Figure 8. Failsafe Biasing for a High-speed Data Link
In this example, the termination resistor value at the cable end without fail-safe biasing matches the characteristic
cable impedance: R = Z . The values for R and R are calculated using Equations 2 and 3.
T1 T2
0
B
V
V
1
AB
S
(EQ. 2)
R
B
0.036
R 120
(EQ. 3)
B
R
T 2
R 60
B
where:
• R is the value of the biasing resistors
B
• R is the value of the termination resistors
T
• V is the minimum transceiver supply voltage
S
• V is the minimum bus voltage during bus idling
AB
• Z is the characteristic cable impedance of 120Ω
0
FN8987 Rev. 1.00
Jul 9, 2018
Page 15 of 19
ISL32743E
5. Application Information
5.13 Transient Protection
Protecting the ISL32743E against transients exceeding the device’s transient immunity requires the addition of an
external TVS. For this purpose, Semtech’s RClamp0512TQ was chosen due to its high transient protection levels,
low junction capacitance, and small form factor.
Table 4. RClamp0512TQ TVS Features
Parameter
Symbol
Value
±30
±30
±4
Unit
kV
ESD (IEC61000-4-2)
Air
V
V
ESD
Contact
kV
ESD
EFT (IEC61000-4-4)
Surge (IEC61000-4-5)
Junction Capacitance
Form Factor
V
kV
EFT
V
±1.3
3
kV
SURGE
C
pF
J
-
1 x 0.6
mm
The TVS is implemented between the bus lines and isolated ground (GND2).
Because transient voltages on the bus lines are referenced to Earth potential, also known as Protective Earth (PE), a
high-voltage capacitor (C ) is inserted between GND2 and PE, providing a low-impedance path for
HV
high-frequency transients.
Note that the connection from the PE point on the isolated side to the PE point on the non-isolated side (Earth) is
usually made using the metal chassis of the equipment, or through a short, thick low inductance wire.
A high-voltage resistor (R ) is added in parallel to C
to prevent the build-up of static charges on floating
grounds (GND2) and cable shields. The bill of materials for the circuit in Figure 9 is listed in Table 5.
HV HV
V
S-ISO
V
S
A
B
A
MCU/
UART
ISL32743E
B
Shield
TVS
GND
PE
C
R
HV
HV
PE
Non-isolated Ground
Isolated Ground, Floating RS-485 Common
Protective Earth Ground, Equipment Safety Ground
Figure 9. Transient Protection for the ISL32743E
Table 5. BOM for Circuit in Figure 9
Name
Function
Order No.
Vendor
TVS
170W (8, 20µs) 2-LINE PROTECTOR RCLAMP0512TQ
Semtech
Novacap
C
R
4.7nF, 2kV, 10% CAPACITOR
1MΩ, 2kV, 5% RESISTOR
1812B472K202NT
HVC12061M0JT3
HV
TT-Electronics
HV
FN8987 Rev. 1.00
Jul 9, 2018
Page 16 of 19
ISL32743E
6. Revision History
6. Revision History
Rev.
Date
Description
1.00
Jul 9, 2018
Updated Ordering Information table by adding column for tape and reel and updating Note 1.
Corrected the ESD Rating specification cross reference on page 5.
0.00
Nov 30, 2017
Initial release.
FN8987 Rev. 1.00
Jul 9, 2018
Page 17 of 19
ISL32743E
7. Package Outline Drawing
For the most recent package outline drawing, see M16.3A.
7. Package Outline Drawing
M16.3A
16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE (SOICW)
Rev 1, 6/17
1
3
10.08
10.49
0.3
0.5
SEE DETAIL "X"
16
9
0.18
0.25
7.42
7.59
10.00
10.64
6.60
7.11
PIN #1
I.D. MARK
2
3
0.85
1.10
1
8
1.24
1.30
0.2
0.3
TOP VIEW
END VIEW
0.05
2.34
2.67
H
C
2.0
2.5
GAUGE
PLANE
SEATING
PLANE
0.25
0.1
0.3
0.3
0.5
5
0.1 MIN
0.40
0.10
C
0° TO 8°
0.3 MAX
1.30
0.1 M
C
B A
SIDE VIEW
DETAIL X
(1.7)
NOTES:
1. Dimension does not include mold flash, protrusions, or gate burrs.
Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
(9.75)
3. Dimensions are measured at datum plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion.
6. Dimension in ( ) are for reference only.
7. Pin spacing is a BASIC dimension; tolerances do not accumulate.
8. Dimensions are in mm.
(0.51)
(1.27)
TYPICAL RECOMMENDED LAND PATTERN
FN8987 Rev. 1.00
Jul 9, 2018
Page 18 of 19
Notice
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