ICL3241IAZ-T [RENESAS]
1mA Supply-Current, +3V to +5.5V, 250kbps, RS-232 Transmitters/Receivers; SSOP28, TSSOP28; Temp Range: See Datasheet;
| 型号： | ICL3241IAZ-T |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | 1mA Supply-Current, +3V to +5.5V, 250kbps, RS-232 Transmitters/Receivers; SSOP28, TSSOP28; Temp Range: See Datasheet 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总36页 (文件大小：874K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
One Microamp Supply-Current, +3V to +5.5V, 250kbps, RS-232
Transmitters/Receivers
The ICL3221, ICL3222, ICL3223, ICL3232, ICL3241,
ICL3243 (ISL32xx) devices are 3.0V to 5.5V powered
RS-232 transmitters/receivers that meet ElA/TIA-232
Features
• RoHS Compliant
• 15kV ESD protected (Human Body Model)
and V.28/V.24 specifications, even at V = 3.0V.
CC
Targeted applications are PDAs, notebook, and laptop
computers where the low operational power
consumption and even lower standby power
consumption are critical. Efficient on-chip charge
pumps, coupled with manual and automatic
power-down functions (except for the ICL3232),
reduce the standby supply current to a 1µA trickle.
Small footprint packaging, and the use of small, low
value capacitors ensure board space savings as well.
Data rates greater than 250kbps are ensured at worst
case load conditions. This family is fully compatible
with 3.3V only systems, mixed 3.3V and 5.0V
systems, and 5.0V only systems.
• Drop-in replacements for MAX3221, MAX3222,
MAX3223, MAX3232, MAX3241, MAX3243,
SP3243
• ICL3221 is a low-power, pin compatible upgrade for
5V MAX221
• ICL3222 is a low-power, pin compatible upgrade for
5V MAX242, and SP312A
• ICL3232 is a low-power upgrade for HIN232/ICL232
and pin compatible competitor devices
• RS-232 compatible with V = 2.7V
CC
• Meets EIA/TIA-232 and V.28/V.24 specifications at
3V
The ICL324x are 3-driver, 5-receiver devices that
provide a complete serial port suitable for laptop or
notebook computers. Both devices also include
noninverting always-active receivers for “wake-up”
capability.
• Latch-up free
• On-chip voltage converters require only four
external 0.1µF capacitors
• Manual and automatic powerdown features (except
ICL3232)
The ICL3221, ICL3223 and ICL3243 feature an
automatic powerdown function that powers down the
on-chip power-supply and driver circuits. Power-down
occurs when an attached peripheral device is shut off
or the RS-232 cable is removed, conserving system
power automatically without changes to the hardware
or operating system. These devices power up again
when a valid RS-232 voltage is applied to any
receiver input.
• Assured mouse driveability (ICL324x only)
• Receiver hysteresis for improved noise immunity
• Assured minimum data rate: 250kbps
• Assured minimum slew rate: 6V/μs
• Wide power supply range: single +3V to +5.5V
• Low supply current in powerdown state:1µA
Table 1 on page 6 summarizes the features of the
devices represented by this datasheet, while
Application Note AN9863 summarizes the features of
each device comprising the ICL32xx 3V family.
Applications
• Any system requiring RS-232 communication ports
○ Battery powered, hand-held, and portable
equipment
Related Literature
For a full list of related documents, visit our website:
○ Laptop computers, Notebooks
○ Modems, printers, and other peripherals
○ Digital cameras
• ICL3221, ICL3222, ICL3223, ICL3232, ICL3241,
and ICL3243 device pages
○ Cellular/mobile phones
FN4805 Rev.23.00
Apr.26.19
Page 1 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
Contents
1.
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
1.2
1.3
1.4
Typical Operating Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.
Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1
2.2
2.3
2.4
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.
4.
Typical Performance Curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Application Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1
Charge Pump. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1.1
Charge Pump Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Transmitters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Receivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Low Power Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Powerdown Functionality (Except ICL3232) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Software Controlled (Manual) Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
INVALID Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Automatic Powerdown (ICL3221/23/43 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Receiver ENABLE Control (ICL3221/22/23/41 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Power Supply Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Operation Down to 2.7V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Transmitter Outputs when Exiting Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Mouse Driveability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
High Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Interconnection with 3V and 5V Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Pin Compatible Replacements For 5V Devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.2
4.3
4.4
4.5
4.5.1
4.5.2
4.5.3
4.6
4.7
4.8
4.9
4.10
4.11
4.12
4.13
4.14
5.
6.
7.
Die Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Package Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
FN4805 Rev.23.00
Apr.26.19
Page 2 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
1. Overview
1. Overview
1.1
Typical Operating Circuits
ICL3221
ICL3222
C (Optional Connection, Note)
C (Optional Connection, Note)
3
3
+3.3V
C
+3.3V
+
+
0.1µF
0.1µF
17
15
2
2
+
4
3
7
C
0.1µF
3
C1+
V
CC
1
C1+
1
V
CC
C
0.1µF
+
+
C
3
+
3
+
V+
V-
V+
V-
0.1µF
4
5
0.1µF
C1-
C1-
5
C
2
0.1µF
C
2
0.1µF
C2+
C2+
+
6
7
C
4
0.1µF
C
4
0.1µF
6
C2-
C2-
+
+
T
T
1
1
12
15
8
11
13
T1
T1
T1
T1
IN
OUT
IN
OUT
T
2
11
13
9
1
8
T2
T2
R1
R1
IN
OUT
IN
OUT
5kΩ
R
1
14
9
EN
R1
R1
R2
OUT
OUT
IN
IN
5kΩ
16
10
R
V
1
CC
FORCEOFF
INVALID
10
1
12
To Power
Control
Logic
R2
FORCEON
5kΩ
GND
R
2
EN
14
18
V
CC
SHDN
GND
16
NOTE: The negative terminal of C3 can be
connected to either VCC or GND
NOTE: The negative terminal of C3 can be
connected to either VCC or GND
ICL3223
ICL3232
+3.3V
C (Optional Connection, Note)
3
+
0.1µF
19
+3.3V
+
2
0.1μF
C
0.1µF
C1+
V
3
1
16
CC
C
0.1µF
+
3
+
V+
V-
4
1
C
0.1µF
C1+
C1-
1
V
2
6
CC
C
3
0.1µF
+
+
+
5
V+
V-
C
2
0.1µF
3
4
C2+
+
C1-
7
C
4
6
C
0.1µF
2
C2-
C2+
0.1µF
+
C
4
5
T
T
1
2
C2-
13
17
8
0.1µF
+
T1
T2
T1
T2
IN
IN
OUT
OUT
T
T
1
2
11
14
7
T1
T2
T1
T2
IN
IN
OUT
OUT
12
15
10
12
16
9
R1
R2
R1
R2
OUT
OUT
IN
IN
5kΩ
5kΩ
13
8
R
1
R1
R2
R1
R2
OUT
OUT
IN
IN
10
1
R
5kΩ
5kΩ
1
R
2
9
EN
20
11
R
2
V
FORCEOFF
INVALID
CC
14
To Power
Control Logic
GND
15
FORCEON
GND
18
NOTE: The negative terminal of C3 can be
connected to either VCC or GND
FN4805 Rev.23.00
Apr.26.19
Page 3 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
1. Overview
ICL3241
ICL3243
+3.3V
+
+3.3V
+
0.1µF
28
26
0.1µF
26
27
C
C1+
V
1
C
3
0.1µF
28
+
24
CC
+
+
C
0.1µF
+
C1+
V
27
3
1
V+
V-
0.1µF
CC
C
3
0.1µF
24
1
+
V+
V-
C1-
C1-
C
2
C2+
1
C
2
0.1µF
3
9
C2+
0.1µF
C
4
0.1µF
+
2
C
4
0.1µF
C2-
2
+
C2-
+
T
T
T
1
2
3
T
T
T
14
1
2
3
14
9
T1
T1
IN
OUT
T1
T1
IN
OUT
13
12
10
11
13
12
10
11
T2
T3
T2
T3
T2
T3
T2
T3
IN
OUT
OUT
IN
IN
OUT
OUT
IN
21
20
19
R1
R2
OUTB
OUTB
R2
OUTB
20
19
4
5
4
5
R1
R1
R2
OUT
OUT
IN
IN
R1
R1
R2
OUT
IN
R
R
1
2
5kΩ
5kΩ
5kΩ
R
5kΩ
5kΩ
1
18
18
17
R2
R2
OUT
IN
R
2
17
16
6
7
6
R3
R4
R3
R4
OUT
OUT
IN
IN
R3
R3
OUT
IN
R
R
3
4
5kΩ
R
R
R
3
4
16
15
7
8
R4
R5
R4
R5
OUT
OUT
IN
IN
5kΩ
5kΩ
5kΩ
5kΩ
15
23
8
R5
R5
OUT
IN
R
5
FORCEON
5
23
22
EN
22
21
V
CC
FORCEOFF
GND
25
V
CC
SHDN
GND
25
INVALID
1.2
Ordering Information
Tape and Reel
(Units) (Note 1)
Package
(RoHS Compliant)
Part Number (Notes 2, 3)
Part Marking Temp. Range (°c)
Pkg. Dwg. #
M16.209
M16.209
M16.173
M16.173
M16.209
M16.209
M16.209
M20.209
ICL3221CAZ
ICL3221CAZ-T
ICL3221CVZ
ICL3221CVZ-T
ICL3221IAZ
ICL3221CAZ
ICL3221CAZ
3221CVZ
0 to 70
0 to 70
-
1k
-
16 Ld SSOP
16 Ld SSOP
16 Ld TSSOP
16 Ld TSSOP
16 Ld SSOP
16 Ld SSOP
16 Ld SSOP
20 Ld SSOP
0 to 70
3221CVZ
0 to 70
2.5k
-
ICL3221IAZ
ICL3221IAZ
ICL3221IAZ
-40 to 85
-40 to 85
-40 to 85
0 to 70
ICL3221IAZ-T
ICL3221IAZ-T7A
1k
250
-
ICL3222CAZ (No longer available, ICL3222CAZ
recommended replacement:
ICL3222ECAZ)
FN4805 Rev.23.00
Apr.26.19
Page 4 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
1. Overview
Tape and Reel
(Units) (Note 1)
Package
(RoHS Compliant)
Part Number (Notes 2, 3)
Part Marking Temp. Range (°c)
Pkg. Dwg. #
ICL3222CBZ (No longer available, 3222CBZ
recommended replacement:
ICL3222EIBZ)
0 to 70
-
18 Ld SOIC
M18.3
ICL3222CVZ
ICL3222CVZ
0 to 70
0 to 70
-
2.5k
-
20 Ld TSSOP
20 Ld TSSOP
20 Ld SSOP
M20.173
M20.173
M20.209
ICL3222CVZ-T
ICL3222CVZ
ICL3222IAZ
ICL3222IAZ (No longer available,
recommended replacement:
ICL3222EIAZ)
-40 to 85
ICL3222IVZ (No longer available,
recommended replacement:
ICL3222EIVZ)
ICL3222IVZ
-40 to 85
0 to 70
-
-
20 Ld TSSOP
20 Ld SSOP
M20.173
M20.209
ICL3223CAZ (No longer available, ICL3223CAZ
recommended replacement:
ICL3223ECAZ)
ICL3223IAZ
ICL3223IAZ-T
ICL3223IVZ
ICL3223IVZ-T
ICL3223IAZ
ICL3223IAZ
ICL3223IVZ
ICL3223IVZ
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
-
1k
-
20 Ld SSOP
20 Ld SSOP
20 Ld TSSOP
20 Ld TSSOP
16 Ld SSOP
M20.209
M20.209
M20.173
M20.173
M16.209
2.5k
-
ICL3232CAZ (No longer available, 3232CAZ
recommended replacement:
ICL3232ECAZ)
ICL3232CBZ (No longer available, 3232CBZ
recommended replacement:
ICL3232ECBZ)
0 to 70
-
16 Ld SOIC
M16.3
ICL3232CBNZ
ICL3232CBNZ-T
ICL3232CPZ
3232CBNZ
3232CBNZ
ICL3232CPZ
3232CVZ
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
-40 to 85
-
16 Ld SOIC (N)
16 Ld SOIC (N)
16 Ld PDIP
M16.15
M16.15
E16.3
2.5k
-
ICL3232CVZ
-
2.5k
-
16 Ld TSSOP
16 Ld TSSOP
16 Ld SSOP
M16.173
M16.173
M16.209
ICL3232CVZ-T
3232CVZ
ICL3232IAZ (No longer available,
recommended replacement:
ICL3232EIAZ)
3232IAZ
ICL3232IBZ (No longer available,
recommended replacement:
ICL3232EIBZ)
3232IBZ
-40 to 85
-
16 Ld SOIC
M16.3
ICL3232IBNZ
3232IBNZ
3232IBNZ
3232IBNZ
3232IVZ
3232IVZ
3232IVZ
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
-
16 Ld SOIC (N)
16 Ld SOIC (N)
16 Ld SOIC (N)
16 Ld TSSOP
16 Ld TSSOP
16 Ld TSSOP
28 Ld SSOP
M16.15
M16.15
M16.15
M16.173
M16.173
M16.173
M28.209
ICL3232IBNZ-T
ICL3232IBNZ-T7A
ICL3232IVZ
2.5k
250
-
ICL3232IVZ-T
ICL3232IVZ-T7A
2.5k
250
-
ICL3241CAZ (No longer available, ICL3241CAZ
recommended replacement:
ICL3241ECAZ)
ICL3241CVZ (No longer available, ICL3241CVZ
recommended replacement:
ICL3241ECVZ)
0 to 70
-
-
28 Ld TSSOP
28 Ld SSOP
M28.173
M28.209
ICL3241IAZ (No longer available,
recommended replacement:
ICL3241EIAZ)
ICL3241IAZ
-40 to 85
FN4805 Rev.23.00
Apr.26.19
Page 5 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
1. Overview
Tape and Reel
(Units) (Note 1)
Package
(RoHS Compliant)
Part Number (Notes 2, 3)
Part Marking Temp. Range (°c)
Pkg. Dwg. #
ICL3243CAZ (No longer available, ICL3243CAZ
recommended replacement:
ICL3243ECAZ)
0 to 70
-
28 Ld SSOP
M28.209
ICL3243CBZ
ICL3243CBZ
ICL3243CBZ
0 to 70
0 to 70
0 to 70
-
1k
-
28 Ld SOIC
28 Ld SOIC
28 Ld TSSOP
M28.3
ICL3243CBZ-T
M28.3
ICL3243CVZ (No longer available, ICL3243CVZ
recommended replacement:
ICL3243ECVZ)
M28.173
ICL3243IAZ (No longer available,
recommended replacement:
ICL3243EIAZ)
ICL3243IAZ
-40 to 85
-
28 Ld SSOP
M28.209
Notes:
1. See TB347 for details about reel specifications.
2. Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J-STD-020.
3. For Moisture Sensitivity Level (MSL), see the ICL3221, ICL3222, ICL3223, ICL3232, ICL3241,and ICL3243 device pages. For more
information about MSL, see TB363.
Table 1. Summary of Features
Automatic
No. of Monitor
Data Rate Rx. Enable
Ready
Manual
Powerdown
Part Number
ICL3221
ICL3222
ICL3223
ICL3232
ICL3241
ICL3243
No. of Tx.
No. of Rx.
Rx. (ROUTB
)
(kbps)
Function?
Output?
Power- Down? Function?
1
2
2
2
3
3
1
2
2
2
5
5
0
0
0
0
2
1
250
Yes
No
No
No
No
No
No
Yes
Yes
Yes
No
Yes
No
250
Yes
250
Yes
Yes
No
250
No
250
Yes
Yes
Yes
No
250
No
Yes
1.3
Pin Configurations
ICL3221 (SSOP, TSSOP)
Top View
ICL3222 (SOIC)
Top View
EN
C1+
V+
1
2
3
4
5
6
7
8
9
18 SHDN
EN
C1+
V+
1
2
3
4
5
6
7
8
16 FORCEOFF
15 V
17 V
CC
CC
16 GND
15 T1
14 GND
13 T1
C1-
C2+
C2-
V-
OUT
C1-
C2+
C2-
V-
OUT
14 R1
13 R1
12 T1
IN
12 FORCEON
11 T1
OUT
IN
IN
IN
10 INVALID
R1
T2
11 T2
10
OUT
R1
9
IN
OUT
R2
R2
IN
OUT
FN4805 Rev.23.00
Apr.26.19
Page 6 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
1. Overview
ICL3222 (SSOP, TSSOP)
Top View
ICL3223 (SSOP, TSSOP)
Top View
EN
C1+
V+
1
2
20 SHDN
EN
C1+
V+
1
2
20 FORCEOFF
19 V
19 V
CC
CC
3
18 GND
3
18 GND
17 T1
17 T1
OUT
C1-
C2+
C2-
V-
4
C1-
C2+
C2-
V-
4
OUT
5
16 R1
IN
5
16 R1
15 R1
IN
6
15 R1
OUT
6
OUT
7
14 NC
7
14 FORCEON
T2
8
13 T1
IN
T2
8
13 T1
IN
OUT
OUT
R2
9
12
T2
R2
9
12
T2
IN
IN
IN
IN
10
11 NC
R2
10
11 INVALID
R2
OUT
OUT
ICL3232 (PDIP, SOIC, SSOP, TSSOP)
Top View
ICL3241 (SSOP, TSSOP)
Top View
C2+
1
2
28 C1+
27 V+
C1+
V+
1
2
3
4
5
6
7
8
16 V
CC
C2-
V-
15 GND
14 T1
3
26 V
CC
C1-
C2+
C2-
V-
OUT
25 GND
24 C1-
R1
4
IN
IN
IN
IN
IN
13 R1
12 R1
IN
R2
R3
R4
R5
5
OUT
IN
6
23 EN
11 T1
10 T2
7
22 SHDN
T2
OUT
IN
8
21 R1
OUTB
OUTB
OUT
OUT
OUT
OUT
OUT
R2
9 R2
OUT
IN
T1
9
20
R2
OUT
OUT
OUT
10
11
12
13
14
19 R1
18 R2
17 R3
16 R4
15 R5
T2
T3
T3
T2
T1
IN
IN
IN
ICL3243 (SOIC, SSOP, TSSOP)
Top View
C2+
C2-
V-
1
2
28 C1+
27 V+
3
26 V
CC
25 GND
24 C1-
R1
R2
R3
R4
R5
4
IN
IN
IN
IN
IN
5
6
23 FORCEON
7
22 FORCEOFF
21 INVALID
8
T1
9
20
R2
OUT
OUT
OUT
OUTB
OUT
OUT
OUT
OUT
OUT
10
11
12
13
14
19 R1
18 R2
17 R3
16 R4
15 R5
T2
T3
T3
T2
T1
IN
IN
IN
FN4805 Rev.23.00
Apr.26.19
Page 7 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
1. Overview
1.4
Pin Descriptions
Pin
VCC
V+
Function
System power supply input (3.0V to 5.5V).
Internally generated positive transmitter supply (+5.5V).
Internally generated negative transmitter supply (-5.5V).
Ground connection.
V-
GND
C1+
C1-
C2+
C2-
TIN
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage doubler) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
External capacitor (voltage inverter) is connected to this lead.
TTL/CMOS compatible transmitter Inputs.
TOUT
RIN
RS-232 level (nominally 5.5V) transmitter outputs.
RS-232 compatible receiver inputs.
ROUT
ROUTB
INVALID
EN
TTL/CMOS level receiver outputs.
TTL/CMOS level, noninverting, always enabled receiver outputs.
Active low output that indicates if no valid RS-232 levels are present on any receiver input.
Active low receiver enable control; doesn’t disable ROUTB outputs.
Active low input to shut down transmitters and on-board power supply to place device in low power mode.
SHDN
FORCEOFF Active low to shut down transmitters and on-chip power supply. This overrides any automatic circuitry and FORCEON (See
Table 5 on page 15).
FORCEON Active high input to override automatic powerdown circuitry thereby keeping transmitters active. (FORCEOFF must be high).
FN4805 Rev.23.00
Apr.26.19
Page 8 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
2. Specifications
2. Specifications
2.1
Absolute Maximum Ratings
Parameter
Minimum
-0.3
Maximum
Unit
V
VCC to Ground
6
V+ to Ground
-0.3
7
V
V- to Ground
+0.3
-7
14
V
V+ to V-
V
Input Voltages
TIN, FORCEOFF, FORCEON, EN, SHDN
-0.3
-0.3
6
V
V
RIN
±25
Output Voltages
TOUT
±13.2
V
V
ROUT, INVALID
Short-Circuit Duration
TOUT
VCC +0.3
Continuous
ESD Rating
(See ESD Performance)
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions can adversely
impact product reliability and result in failures not covered by warranty.
2.2
Thermal Information
Thermal Resistance (Typical, Note 4)
θJA (°C/W)
16 Ld PDIP Package (Note 5)
16 Ld Wide SOIC Package
16 Ld Narrow SOIC Package
18 Ld SOIC Package
90
100
115
75
28 Ld SOIC Package
75
16 Ld SSOP Package
135
122
145
140
100
20 Ld SSOP Package
16 Ld TSSOP Package
20 Ld TSSOP Package
28 Ld SSOP and TSSOP Packages
Notes:
4. θJA is measured with the component mounted on a low-effective thermal conductivity test board in free air. See TB379.
5. Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing
applications.
Parameter
Minimum
Maximum
+150
Unit
°C
Maximum Junction Temperature (Plastic Package)
Maximum Storage Temperature Range
-65
+150
°C
Pb-Free Reflow Profile (SOIC, SSOP, TSSOP Only)
see TB493
FN4805 Rev.23.00
Apr.26.19
Page 9 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
2. Specifications
2.3
Recommended Operating Conditions
Parameter
Minimum
Maximum
Unit
Temperature Range
ICL32xxCx
0
+70
+85
°C
°C
ICL32xxIx
-40
2.4
Electrical Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; unless otherwise specified. Typicals are at TA = 25°C
Tem
p
Uni
Parameter
DC Characteristics
Test Conditions
(°C)
Min
Typ
Max
t
Supply Current, Automatic
Power-Down
All RIN open, FORCEON = GND, FORCEOFF = VCC
(ICL3221, ICL3223, ICL3243 only)
25
-
1.0
10
10
µA
µA
Supply Current, Powerdown
FORCEOFF = SHDN = GND (except ICL3232)
25
25
-
-
1.0
0.3
Supply Current, Automatic
Power-Down Disabled
All outputs unloaded,
FORCEON = FORCEOFF =
SHDN = VCC
VCC = 3.15V,
ICL3221-32
1.0 mA
V
CC = 3.0V, ICL3241-43
25
-
0.3
1.0 mA
Logic and Transmitter Inputs and Receiver Outputs
Input Logic Threshold Low
Input Logic Threshold High
TIN, FORCEON, FORCEOFF, EN, SHDN
Full
Full
Full
Full
Full
-
2.0
2.4
-
-
-
-
0.8
V
V
V
TIN, FORCEON, FORCEOFF,
EN, SHDN
VCC = 3.3V
VCC = 5.0V
-
-
Input Leakage Current
TIN, FORCEON, FORCEOFF, EN, SHDN
FORCEOFF = GND or EN = VCC
±0.01 ±1.0 µA
±0.05 ±10 µA
Output Leakage Current
(Except ICL3232)
-
Output Voltage Low
Output Voltage High
I
I
OUT = 1.6mA
OUT = -1.0mA
Full
Full
-
-
0.4
-
V
V
VCC
0.6
-
VCC
0.1
-
Automatic Powerdown (ICL3221, ICL3223, ICL3243 only, FORCEON = GND, FORCEOFF = VCC
)
Receiver Input Thresholds to Enable
Transmitters
ICL32xx powers up (See Figure 12)
Full
Full
Full
-2.7
-0.3
-
-
-
2.7
0.3
V
V
Receiver Input Thresholds to Disable ICL32xx powers down (See Figure 12)
Transmitters
INVALID Output Voltage Low
INVALID Output Voltage High
Receiver Threshold to Transmitters
IOUT = 1.6mA
IOUT = -1.0mA
-
-
0.4
V
V
Full VCC-0.6
-
-
25
-
100
µs
Enabled Delay (tWU
)
Receiver Positive or Negative
Threshold to INVALID High Delay
25
-
1
-
-
µs
µs
(tINVH
)
Receiver Positive or Negative
25
-
30
Threshold to INVALID Low Delay
(tINVL
)
Receiver Inputs
Input Voltage Range
Input Threshold Low
Full
25
25
25
25
25
-25
0.6
0.8
-
-
25
-
V
V
V
V
V
V
VCC = 3.3V
VCC = 5.0V
VCC = 3.3V
VCC = 5.0V
1.2
1.5
1.5
1.8
0.3
-
Input Threshold High
Input Hysteresis
2.4
2.4
-
-
-
FN4805 Rev.23.00
Apr.26.19
Page 10 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
2. Specifications
Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; unless otherwise specified. Typicals are at TA = 25°C (Continued)
Tem
p
Uni
Parameter
Input Resistance
Test Conditions
(°C)
Min
Typ
Max
t
25
3
5
7
kΩ
Transmitter Outputs
Output Voltage Swing
Output Resistance
All Transmitter Outputs Loaded with 3kΩ to Ground
VCC = V+ = V- = 0V, Transmitter Output = ±2V
Full
Full
Full
Full
±5.0
±5.4
10M
±35
-
-
-
V
300
W
Output Short-Circuit Current
Output Leakage Current
-
-
±60 mA
±25 µA
VOUT = ±12V, VCC = 0V or 3V to 5.5V
Automatic Powerdown or FORCEOFF = SHDN = GND
Mouse Driveability (ICL324X Only)
Transmitter Output Voltage
(See Figure 15)
T1IN = T2IN = GND, T3IN = VCC, T3OUT loaded with 3kΩ to
GND, T1OUT and T2OUT loaded with 2.5mA each
Full
Full
±5
-
-
-
V
Timing Characteristics
Maximum Data Rate
RL = 3kΩ, CL = 1000pF, one transmitter switching
250
500
kbp
s
Receiver Propagation Delay
Receiver input to receiver output, tPHL
25
25
-
-
-
-
-
0.3
0.3
-
-
-
-
µs
µs
ns
ns
CL = 150pF
tPLH
Receiver Output Enable Time
Receiver Output Disable Time
Transmitter Skew
Normal operation (except ICL3232)
Normal operation (except ICL3232)
25
200
200
200
25
t
PHL - tPLH
Full
100 ns
0
Receiver Skew
t
PHL - tPLH
Full
25
-
100
8.0
500 ns
Transition Region Slew Rate
VCC = 3.3V,
CL = 200pF to 2500pF
CL = 200pF to 1000pF
4
30 V/µ
s
RL = 3kΩ to 7kΩ,
Measured from 3V to -3V or -3V
to 3V
25
6
-
30 V/µ
s
ESD Performance
RS-232 Pins (TOUT, RIN
)
Human Body Model
ICL3221 - ICL3243
25
25
25
25
25
-
-
-
-
-
±15
±8
-
-
-
-
-
kV
kV
kV
kV
kV
IEC61000-4-2 Contact Discharge ICL3221 - ICL3243
IEC61000-4-2 Air Gap Discharge ICL3221 - ICL3232
ICL3241 - ICL3243
±8
±6
All Other Pins
Human Body Model
ICL3221 - ICL3243
±2
FN4805 Rev.23.00
Apr.26.19
Page 11 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
3. Typical Performance Curves
3. Typical Performance Curves
VCC = 3.3V, TA = 25°C
6
25
20
V
+
OUT
4
2
1 Transmitter at 250kbps
1 or 2 Transmitters at 30kbps
0
15
10
5
-SLEW
-2
-4
+SLEW
V
-
OUT
-6
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
Load Capacitance (pF)
Load Capacitance (pF)
Figure 1. Transmitter Output Voltage vs Load
Capacitance
Figure 2. Slew Rate vs Load Capacitance
45
45
ICL3221
ICL3222 - ICL3232
250kbps
40
35
30
25
20
15
10
40
35
30
25
20
15
10
250kbps
120kbps
20kbps
120kbps
20kbps
5
0
5
0
0
1000
2000
3000
4000
5000
0
1000
2000
3000
4000
5000
Load Capacitance (pF)
Load Capacitance (pF)
Figure 3. Supply Current vs Load Capacitance when
Transmitting Data
Figure 4. Supply Current vs Load Capacitance when
Transmitting Data
3.5
45
No Load
All Outputs Static
ICL324X
250kbps
40
35
30
25
20
15
10
5
3.0
ICL3221 - ICL3232
2.5
120kbps
2.0
1.5
1.0
20kbps
ICL324X
0.5
ICL324X
0
0
2.5
4000
5000
2000
3000
1000
0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Supply Voltage (V)
Load Capacitance (pF)
Figure 6. Supply Current vs Supply Voltage
Figure 5. Supply Current vs Load Capacitance when
Transmitting Data
FN4805 Rev.23.00
Apr.26.19
Page 12 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
4. Application Information
4. Application Information
The ICL32xx interface ICs operate from a single +3V to +5.5V supply, ensure a 250kbps minimum data rate,
require only four small external 0.1µF capacitors, feature low-power consumption, and meet all ElA RS-232C and
V.28 specifications. The circuit is divided into three sections:
• Charge-pump
• Transmitters
• Receivers
4.1
Charge Pump
The ICL32xx family uses regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to
generate ±5.5V transmitter supplies from a V supply as low as 3.0V, which allows these devices to maintain
CC
RS-232 compliant output levels over the ±10% tolerance range of 3.3V powered systems. The efficient on-chip
power supplies require only four small, external 0.1µF capacitors for the voltage doubler and inverter functions at
V
= 3.3V. See Capacitor Selection and Table 6 on page 19 for capacitor recommendations for other operating
CC
conditions. The charge pumps operate discontinuously (for example, they turn off as soon as the V+ and V-
supplies are pumped up to the nominal values), resulting in significant power savings.
4.1.1 Charge Pump Absolute Maximum Ratings
These 3V to 5V RS-232 transceivers have been fully characterized for 3.0V to 3.6V operation, and at critical
points for 4.5V to 5.5V operation. Furthermore, load conditions were favorable using static logic states only.
The specified maximum values for V+ and V- are +7V and -7V, respectively. These limits apply for VCC values set
to 3.0V and 3.6V (see Table 2). For VCC values set to 4.5V and 5.5V, the maximum values for V+ and V- can
approach +9V and -7V respectively (see Table 3). The breakdown characteristics for V+ and V- were measured
with ±13V.
Table 2. V+ and V- Values for V = 3.0V to 3.6V
CC
V+ (V)
VCC = 3.0V
V- (V)
T1IN (Logic
C1 (μF)
C2, C3, C4 (μF)
Load
State)
VCC = 3.6V
6.56
6.56
6.56
6.6
VCC = 3.0V
-5.6
VCC = 3.6V
-5.88
-5.88
-5.88
-5.92
-5.76
-5.96
-5.6
0.1
0.1
Open
H
5.8
5.8
L
-5.6
2.4kbps
5.8
-5.6
3kΩ // 1000pF
Open
H
5.88
5.76
6
-5.56
-5.56
-5.64
-5.6
L
6.36
6.64
6
2.4kbps
0.047
0.33
H
5.68
5.68
5.68
5.76
5.68
5.84
5.88
5.88
5.8
L
6
-5.6
-5.6
2.4kbps
6
-5.6
-5.6
3kΩ // 1000pF
Open
H
6.08
6.04
6.16
6.24
6.28
6.2
-5.64
-5.6
-5.64
-5.6
L
2.4kbps
-5.64
-5.6
-5.72
-5.6
1
1
H
L
2.4kbps
H
-5.6
-5.64
-5.6
-5.6
3kΩ // 1000pF
5.88
5.88
5.92
6.44
6.04
6.4
-5.64
-5.64
-5.64
-5.72
-5.64
-5.64
L
2.4kbps
FN4805 Rev.23.00
Apr.26.19
Page 13 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
4. Application Information
Table 3. V+ and V- Values for Vcc = 4.5V to 5.5V
V+ (V)
VCC = 4.5V
V- (V)
T1IN (Logic
C1 (μF)
C2, C3, C4 (μF)
Load
State)
VCC = 5.5V
8.48
8.48
8.48
8.88
8
VCC = 4.5V
-6.16
-6.16
-6.17
-6.36
-5.76
-6.4
VCC = 5.5V
-6.4
0.1
0.1
Open
H
7.44
7.44
7.44
7.76
7.08
7.76
6.44
6.48
6.44
6.64
6.24
6.72
6.84
6.88
6.92
7.28
6.44
7.08
L
-6.44
-6.44
-6.72
-5.76
-6.64
-5.88
-5.88
-5.88
-6.04
-5.52
-5.96
-5.76
-5.76
-5.76
-5.92
-6.84
-5.8
2.4kbps
3kΩ // 1000pF
Open
H
L
2.4kbps
8.84
6.88
6.88
6.88
7.28
6.6
0.047
0.33
H
-5.8
L
-5.84
-5.8
2.4kbps
3kΩ // 1000pF
Open
H
-5.92
-5.52
-5.92
-5.76
-5.76
-5.72
-5.8
L
2.4kbps
7.16
7.6
1
1
H
L
2.4kbps
H
7.6
7.56
8.16
6.84
7.76
3kΩ // 1000pF
L
-5.64
-5.8
2.4kbps
The resulting new maximum voltages at V+ and V- are listed in Table 4.
Table 4. New Measured Withstanding Voltages
V+, V- to Ground
V+ to V-
±13V
20V
4.2
Transmitters
The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232
output levels. These transmitters are coupled with the on-chip ± 5.5V supplies and deliver true RS-232 levels
across a wide range of single supply system voltages.
Except for the ICL3232, all transmitter outputs disable and assume a high impedance state when the device
enters the powerdown mode (See Table 5 on page 15). These outputs can be driven to ±12V when disabled.
All devices ensure a 250kbps data rate for full load conditions (3kΩ and 1000pF), V ≥ 3.0V, with one transmitter
CC
operating at full speed. Under more typical conditions of V ≥ 3.3V, R = 3kΩ, and C = 250pF, one transmitter
CC
L
L
easily operates at 900kbps.
Transmitter inputs float if left unconnected and may cause I increases. Connect unused inputs to GND for the
CC
best performance.
4.3
Receivers
All the ICL32xx devices contain standard inverting receivers that three-state (except for the ICL3232) using the
EN or FORCEOFF control lines. Additionally, the two ICL324X products include noninverting (monitor) receivers
(denoted by the R
label) that are always active, regardless of the state of any control lines. All the receivers
OUTB
convert RS-232 signals to CMOS output levels and accept inputs up to ±25V while presenting the required 3kΩ to
7kΩ input impedance (see Figure 7) even if the power is off (V = 0V). The receivers’ Schmitt trigger input stage
CC
uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions.
FN4805 Rev.23.00
Apr.26.19
Page 14 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
4. Application Information
V
CC
R
R
XOUT
XIN
GND ≤ V
≤ V
CC
-25V ≤ V
≤ +25V
5kΩ
ROUT
RIN
GND
Figure 7. Inverting Receiver Connections
The ICL3221/22/23/41 inverting receivers disable only when EN is driven high. ICL3243 receivers disable during
forced (manual) powerdown, but not during automatic powerdown (See Table 5).
ICL324X monitor receivers remain active even during manual powerdown and forced receiver disable, making
them extremely useful for Ring Indicator monitoring. Standard receivers driving powered down peripherals must
be disabled to prevent current flow through the peripheral’s protection diodes (See Figures 8 and 9). When
disabled, the receivers cannot be used for wake up functions, but the corresponding monitor receiver can be
dedicated to this task as shown in Figure 9 on page 17.
4.4
Low Power Operation
The 3V devices require a nominal supply current of 0.3mA, even at V = 5.5V, during normal operation (not in
CC
powerdown mode), which is considerably less than the 5mA to 11mA current required by comparable 5V RS-232
devices, allowing you to reduce system power simply by switching to this new family.
4.5
Powerdown Functionality (Except ICL3232)
The already low current requirement drops significantly when the device enters powerdown mode. In
power-down, supply current drops to 1µA, because the on-chip charge pump turns off (V+ collapses to V
V- collapses to GND), and the transmitter outputs three-state. Inverting receiver outputs may disable in
,
CC
power-down; see Table 5 for details. This micro-power mode makes these devices ideal for battery powered and
portable applications.
4.5.1 Software Controlled (Manual) Powerdown
Most devices in the ICL32xx family provide pins that allow you to force the IC into the low power, standby state.
On the ICL3222 and ICL3241, the powerdown control is using a simple shutdown (SHDN) pin. Driving this pin
high enables normal operation, and driving it low forces the IC into its powerdown state. Connect SHDN to V if
CC
the powerdown function is not needed. Note that all the receiver outputs remain enabled during shutdown (See
Table 5). For the lowest power consumption during powerdown, the receivers should also be disabled by driving
the EN input high (See next section, and Figures 8 and 9).
The ICL3221, ICL3223, and ICL3243 use a two pin approach where the FORCEON and FORCEOFF inputs
determine the IC’s mode. For always enabled operation, FORCEON and FORCEOFF are both strapped high.
Under logic or software control, only the FORCEOFF input needs to be driven to switch between active and
powerdown modes. The FORCEON state is not critical because FORCEOFF overrides FORCEON. However, if
strictly manual control over powerdown is needed, you must strap FORCEON high to disable the automatic
power-down circuitry. ICL3243 inverting (standard) receiver outputs also disable when the device is in manual
powerdown, thereby eliminating the possible current path through a shutdown peripheral’s input protection diode
(See Figures 8 and 9).
Table 5. Powerdown and Enable Logic Truth Table
RS-232
Signal Present at
Receiver Input?
FORCEOFF
or SHDN
Input
ROUTB
FORCEON EN Transmitter Receiver Outputs INVALID
Input
Input
Outputs
Outputs (Note 6) Output
Mode of Operation
ICL3222, ICL3241
N.A.
N.A.
L
L
N.A.
N.A.
L
High-Z
High-Z
Active
Active
Active
N.A.
N.A.
Manual Powerdown
H
High-Z
Manual Powerdown w/Rcvr.
Disabled
N.A.
H
N.A.
L
Active
Active
Active
N.A.
Normal Operation
FN4805 Rev.23.00
Apr.26.19
Page 15 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
4. Application Information
Table 5.
Powerdown and Enable Logic Truth Table (Continued)
FORCEOFF
RS-232
ROUTB
Signal Present at
Receiver Input?
or SHDN
Input
FORCEON EN Transmitter Receiver Outputs INVALID
Input
Input
Outputs
Outputs (Note 6) Output
Mode of Operation
ICL3222, ICL3241
N.A.
H
N.A.
H
Active
High-Z
Active
N.A.
Normal Operation w/Rcvr.
Disabled
ICL3221, ICL3223
No
No
H
H
H
H
H
H
L
H
H
L
L
H
L
Active
Active
Active
Active
High-Z
High-Z
High-Z
High-Z
Active
High-Z
Active
High-Z
Active
High-Z
Active
High-Z
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
N.A.
L
L
Normal Operation
(Auto Powerdown Disabled)
Yes
Yes
No
H
H
L
Normal Operation
(Auto Powerdown Enabled)
L
H
L
L
Powerdown Due to Auto
Power-Down Logic
No
L
H
L
L
Yes
Yes
X
X
H
H
Manual Powerdown
L
H
Manual Powerdown w/Rcvr.
Disabled
No
No
L
L
X
X
L
High-Z
High-Z
Active
N.A.
N.A.
L
L
Manual Powerdown
H
High-Z
Manual Powerdown w/Rcvr.
Disabled
ICL3243
No
H
H
H
H
L
L
N.A.
N.A.
N.A.
Active
Active
High-Z
Active
Active
Active
Active
Active
Active
L
H
L
Normal Operation
(Auto Powerdown Disabled)
Yes
No
Normal Operation
(Auto Powerdown Enabled)
Powerdown Due to Auto
Power-Down Logic
Yes
No
L
L
X
X
N.A.
N.A.
High-Z
High-Z
High-Z
High-Z
Active
Active
H
L
Manual Powerdown
Manual Powerdown
Note:
6. Applies only to the ICL3241 and ICL3243.
4.5.2 INVALID Output
The INVALID output always indicates whether a valid RS-232 signal is present at any of the receiver inputs (See
Table 5), giving you a way to determine when the interface block should power down. In the case of a
disconnected interface cable where all the receiver inputs are floating (but pulled to GND by the internal receiver
pull down resistors), the INVALID logic detects the invalid levels and drives the output low. The power
management logic then uses this indicator to power down the interface block. Reconnecting the cable restores
valid levels at the receiver inputs, INVALID switches high, and the power management logic wakes up the
interface block. INVALID can also be used to indicate the DTR or RING INDICATOR signal as long as the other
receiver inputs are floating or driven to GND (as in the case of a powered down driver). Connecting FORCEOFF
and FORCEON together disables the automatic powerdown feature, enabling them to function as a manual
SHUTDOWN input (See Figure 10).
FN4805 Rev.23.00
Apr.26.19
Page 16 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
4. Application Information
V
CC
V
CC
Current
Flow
V
CC
V
= V
CC
OUT
Rx
Powered
Down
UART
Tx
Old
RS-232 Chip
SHDN = GND
GND
Figure 8. Power Drain Through Powered Down Peripheral
V
CC
Transition
Detector
To
Wake-Up
Logic
ICL324X
V
CC
R2
OUTB
R
T
V
= HI-Z
X
OUT
R2
OUT
Powered
Down
UART
R2
IN
T1
X
IN
T1
OUT
FORCEOFF = GND
OR SHDN = GND, EN = V
CC
Figure 9. Disabled Receivers Prevent Power Drain
FORCEOFF
PWR
FORCEON
MGT
Logic
INVALID
ICL3221/23/43
I/O
UART
CPU
Figure 10. Connections for Manual Powerdown when No Valid Receiver Signals are Present
With any of the above control schemes, the time required to exit powerdown and resume transmission is only
100µs. A mouse or other application may need more time to wake up from shutdown. If automatic powerdown is
being used, the RS-232 device reenters powerdown if valid receiver levels are not re-established within 30µs of
the ICL32xx powering up. Figure 11 on page 18 shows a circuit that keeps the ICL32xx from initiating automatic
FN4805 Rev.23.00
Apr.26.19
Page 17 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
4. Application Information
power-down for 100ms after powering up, which gives the slow-to-wake peripheral circuit time to re-establish valid
RS-232 output levels.
Master Powerdown Line
0.1µF
Power
Management
Unit
1MΩ
FORCEOFF
FORCEON
ICL3221/23/43
Figure 11. Circuit to Prevent Auto Powerdown for 100ms After Forced Power-UP
4.5.3 Automatic Powerdown (ICL3221/23/43 Only)
Even greater power savings are available by using the ICL3221, ICL3223, or ICL3243's automatic powerdown
function. When no valid RS-232 voltages (See Figure 12) are sensed on any receiver input for 30μs, the
charge-pump and transmitters powerdown, thereby reducing supply current to 1µA. Invalid receiver levels occur
whenever the driving peripheral’s outputs are shut off (powered down) or when the RS-232 interface cable is
disconnected. The ICL32xx devices power back up whenever they detect a valid RS-232 voltage level on any
receiver input, which provides additional system power savings without changes to the existing operating system.
Valid RS-232 Level - ICL32xx is Active
2.7V
Indeterminate - Powerdown May or
May Not Occur
0.3V
Invalid Level - Powerdown Occurs After 30ms
-0.3V
Indeterminate - Powerdown May or
May Not Occur
-2.7V
Valid RS-232 Level - ICL32xx is Active
Figure 12. Definition of Valid RS-232 Receiver Levels
Automatic powerdown operates when the FORCEON input is low, and the FORCEOFF input is high. Tying
FORCEON high disables automatic powerdown, but manual powerdown is always available using the overriding
FORCEOFF input. Table 5 on page 15 summarizes the automatic powerdown functionality.
Devices with the automatic powerdown feature include an INVALID output signal, which switches low to indicate
that invalid levels have persisted on all of the receiver inputs for more than 30µs (See Figure 13). INVALID
switches high 1µs after detecting a valid RS-232 level on a receiver input. INVALID operates in all modes (forced
or automatic powerdown, or forced on), so it is also useful for systems employing manual powerdown circuitry.
When automatic powerdown is used, INVALID = 0 indicates that the ICL32xx is in powerdown mode.
FN4805 Rev.23.00
Apr.26.19
Page 18 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
4. Application Information
Receiver
Inputs
Invalid
Region
}
Transmitter
Outputs
V
CC
0
INVALID
Output
t
t
INVH
INVL
PWR UP
AUTOPWDN
V+
V
CC
0
V-
Figure 13. Automatic Powerdown and INVALID Timing Diagrams
The time to recover from automatic powerdown mode is typically 100µs.
4.6
Receiver ENABLE Control (ICL3221/22/23/41 Only)
ICL3221, ICL3222, ICL3223, and ICL3241 also feature an EN input to control the receiver outputs. Driving EN
high disables all the inverting (standard) receiver outputs placing them in a high impedance state, which is useful
to eliminate supply current, due to a receiver output forward biasing the protection diode, when driving the input of
a powered down (V = GND) peripheral (See Figure 8 on page 17). The enable input has no effect on
CC
transmitter nor monitor (R
) outputs.
OUTB
4.7
Capacitor Selection
The charge pumps require 0.1µF capacitors for 3.3V operation. For other supply voltages see Table 6 for
capacitor values. Do not use values smaller than those listed in Table 6. Increasing the capacitor values (by a
factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C , C , and C can
2
3
4
be increased without increasing C ’s value; however, do not increase C without also increasing C , C , and C to
1
1
2
3
4
maintain the proper ratios (C to the other capacitors).
1
When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with
temperature. If in doubt, use capacitors with a larger nominal value. The capacitor’s Equivalent Series Resistance
(ESR) usually rises at low temperatures and it influences the amount of ripple on V+ and V-.
Table 6. Required Capacitor Values
VCC (V)
3.0 to 3.6
4.5 to 5.5
3.0 to 5.5
C1 (µF)
0.1
C2, C3, C4 (µF)
0.1
0.047
0.1
0.33
0.47
4.8
Power Supply Decoupling
In most circumstances a 0.1µF bypass capacitor is adequate. In applications that are particularly sensitive to
power supply noise, decouple V to ground with a capacitor of the same value as the charge-pump capacitor C .
CC
1
Connect the bypass capacitor as close as possible to the IC.
4.9
Operation Down to 2.7V
ICL32xx transmitter outputs meet RS-562 levels (±3.7V), at full data rate, with V as low as 2.7V. RS-562 levels
CC
typically ensure interoperability with RS-232 devices.
FN4805 Rev.23.00
Apr.26.19
Page 19 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
4. Application Information
4.10 Transmitter Outputs when Exiting Powerdown
Figure 14 shows the response of two transmitter outputs when exiting powerdown mode. As they activate, the two
transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, nor undesirable transients.
Each transmitter is loaded with 3kΩ in parallel with 2500pF. Note that the transmitters enable only when the
magnitude of the supplies exceed approximately 3V.
5V/Div
2V/Div
FORCEOFF
T1
T2
V
= +3.3V
CC
C1 - C4 = 0.1µF
Time (20µs/Div)
Figure 14. Transmitter Outputs when Exiting Powerdown
4.11 Mouse Driveability
The ICL324X have been specifically designed to power a serial mouse while operating from low voltage supplies.
Figure 15 shows the transmitter output voltages under increasing load current. The on-chip switching regulator
ensures the transmitters will supply at least ±5V during worst case conditions (15mA for paralleled V+
transmitters, 7.3mA for single V- transmitter). The Automatic Powerdown feature does not work with a mouse, so
FORCEOFF and FORCEON should be connected to V
.
CC
6
5
4
3
V
+
OUT
V
= 3.0V
CC
2
1
T1
0
V
+
OUT
-1
-2
-3
-4
-5
-6
T2
T3
ICL3241/43
V
V
-
CC
OUT
V
-
OUT
8
0
1
2
3
4
5
6
7
9
10
Load Current per Transmitter (mA)
Figure 15. Transmitter Output Voltage vs Load Current (per Transmitter, Such as, Double Current Axis for Total VOUT+
Current)
4.12 High Data Rates
The ICL32xx maintain the RS-232 ±5V minimum transmitter output voltages even at high data rates. Figure 16
details a transmitter loopback test circuit, and Figure 17 illustrates the loopback test result at 120kbps. For this
test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF at 120kbps. Figure 18
shows the loopback results for a single transmitter driving 1000pF and an RS-232 load at 250kbps. The static
transmitters were also loaded with an RS-232 receiver.
FN4805 Rev.23.00
Apr.26.19
Page 20 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
4. Application Information
V
CC
+
0.1µF
V
CC
V+
V-
+
1
C1+
+
C
C
C
3
4
C1-
C2+
C2-
ICL32xx
+
2
C
+
T
T
IN
OUT
1000pF
R
IN
R
OUT
EN
5k
SHDN OR
FORCEOFF
V
CC
Figure 16. Transmitter Loopback Test Circuit
5V/Div
T1
5V/Div
T1
IN
IN
T1
T1
OUT
OUT
OUT
OUT
R1
R1
V
= +3.3V
V
= +3.3V
CC
CC
C1 - C4 = 0.1µF
C1 - C4 = 0.1μF
5µs/Div
2µs/Div
Figure 17. Loopback Test at 120kbps
Figure 18. Loopback Test at 250kbps
4.13 Interconnection with 3V and 5V Logic
The ICL32xx directly interface with 5V CMOS and TTL logic families. With the ICL32xx at 3.3V, and the logic
supply at 5V, AC, HC, and CD4000 outputs can drive ICL32xx inputs, but ICL32xx outputs do not reach the
minimum V for these logic families. See Table 7 for more information.
IH
Table 7. Logic Family Compatibility with Various Supply Voltages
System Power-Supply
Voltage (V)
VCC Supply
Voltage (V)
Compatibility
Compatible with all CMOS families.
3.3
5
3.3
5
Compatible with all TTL and CMOS logic families.
5
3.3
Compatible with ACT and HCT CMOS, and with TTL. ICL32xx outputs
are incompatible with AC, HC, and CD4000 CMOS inputs.
FN4805 Rev.23.00
Apr.26.19
Page 21 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
4. Application Information
4.14 Pin Compatible Replacements For 5V Devices
The ICL3221/22/32 are pin compatible with existing 5V RS-232 transceivers (see the “Features” on page 1 for
details), which coupled with the low I and wide operating supply range, make the ICL32xx potential lower
CC
power, higher performance, drop-in replacements for existing 5V applications. As long as the ±5V RS-232 output
swings are acceptable, and transmitter input pull-up resistors are not required, the ICL32xx should work in most
5V applications.
When replacing a device in an existing 5V application, it is acceptable to terminate C to V as shown on the
3
CC
“Typical Operating Circuits” on page 3. Terminate C to GND if possible, as slightly better performance results
3
from this configuration.
FN4805 Rev.23.00
Apr.26.19
Page 22 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
5. Die Characteristics
5. Die Characteristics
Substrate Potential (Powered Up)
Transistor Count
GND
ICL3221: 286
ICL3222: 338
ICL3223: 357
ICL3232: 296
ICL324X: 464
Process
Si Gate CMOS
FN4805 Rev.23.00
Apr.26.19
Page 23 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
6. Revision History
6. Revision History
Rev.
Date
Description
23
Apr 26, 2019
Updated to latest formatting.
Added Related Literature section.
Updated Ordering information table by adding active tape and reel information, updated notes, adding note 3,
removed retired parts, and stamped EOL parts.
Added “Charge Pump Absolute Maximum Ratings” on page 13.
Removed About Intersil section.
Updated M16.15 to the latest revision changes are as follows:
Update graphics to new standard layout, removing the dimension table.
Updated disclaimer.
22
Sep 1, 2015
- Ordering Information Table on page 2.
- Added Revision History.
- Added About Intersil Verbiage.
- Updated POD M16.173 to latest revision changes are as follow:
Convert to new POD format by moving dimensions from table onto drawing and adding land pattern. No
dimension changes.
- Updated POD M20.173 to most current version changes are as follow:
Convert to new POD format by moving dimensions from table onto drawing and adding land pattern. No
dimension changes.
- Updated POD M28.173 to most current version changes are as follow:
Convert to new POD format by moving dimensions from table onto drawing and adding land pattern. No
dimension changes.
-Updated POD M28.3 to most current version change is as follows:
Added land pattern.
FN4805 Rev.23.00
Apr.26.19
Page 24 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
For the most recent package outline drawing, see E16.3.
7. Package Outline Drawings
E16.3 (JEDEC MS-001-BB ISSUE D)
N
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE (PDIP)
E1
INDEX
AREA
INCHES
MILLIMETERS
1 2
3
N/2
SYMBOL
MIN
MAX
0.210
-
MIN
-
MAX
5.33
-
NOTES
-B-
-C-
A
A1
A2
B
-
4
-A-
0.015
0.115
0.014
0.045
0.008
0.735
0.005
0.300
0.240
0.39
2.93
0.356
1.15
0.204
18.66
0.13
7.62
6.10
4
D
E
BASE
PLANE
0.195
0.022
0.070
0.014
0.775
-
4.95
0.558
1.77
0.355
19.68
-
-
A2
A
-
SEATING
PLANE
B1
C
8, 10
L
C
L
-
D1
B1
eA
A1
A
D1
e
D
5
eC
C
B
D1
E
5
eB
0.010 (0.25) M
C
B S
0.325
0.280
8.25
7.11
6
Notes:
E1
e
5
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
-
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
eA
eB
L
6
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
-
0.430
0.150
-
10.92
3.81
7
0.115
2.93
4
9
4. Dimensions A, A1 and L are measured with the package seated in JE-
N
16
16
DEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
Rev. 0 12/93
eA
6. E and
ular to datum
7. eB and eC are measured at the lead tips with the leads unconstrained.
C must be zero or greater.
are measured with the leads constrained to be perpendic-
-C-
.
e
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
FN4805 Rev.23.00
Apr.26.19
Page 25 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
M16.15 (JEDEC MS-012-AC ISSUE C)
16 Lead Narrow Body Small Outline Plastic Package
Rev 2, 11/17
For the most recent package outline drawing, see M16.15.
FN4805 Rev.23.00
Apr.26.19
Page 26 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
M16.173
For the most recent package outline drawing, see M16.173.
16 Lead Thin Shrink Small Outline Package (TSSOP)
Rev 2, 5/10
A
1
3
5.00 ±0.10
SEE DETAIL "X"
9
16
6.40
PIN #1
I.D. MARK
4.40 ±0.10
2
3
0.20 C B A
1
8
B
0.09-0.20
0.65
END VIEW
TOP VIEW
1.00 REF
-
0.05
H
C
0.90 +0.15/-0.10
1.20 MAX
SEATING
PLANE
GAUGE
PLANE
0.25 +0.05/-0.06
0.25
5
0.10
C B A
M
0.10 C
0°-8°
0.60 ±0.15
0.05 MIN
0.15 MAX
SIDE VIEW
DETAIL "X"
(1.45)
NOTES:
1. Dimension does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
3. Dimensions are measured at datum plane H.
(5.65)
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.08mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead
is 0.07mm.
(0.65 TYP)
(0.35 TYP)
6. Dimension in ( ) are for reference only.
TYPICAL RECOMMENDED LAND PATTERN
7. Conforms to JEDEC MO-153.
FN4805 Rev.23.00
Apr.26.19
Page 27 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
For the most recent package outline drawing, see M16.209.
N
M16.209 (JEDEC MO-150-AC ISSUE B)
INDEX
AREA
0.25(0.010)
M
B M
H
16 Lead Shrink Small Outline Plastic Package (SSOP)
E
INCHES
MILLIMETERS
GAUGE
PLANE
-B-
SYMBOL
MIN
MAX
0.078
-
MIN
-
MAX
2.00
-
NOTES
A
A1
A2
B
-
-
1
2
3
0.002
0.065
0.009
0.004
0.233
0.197
0.05
1.65
0.22
0.09
5.90
5.00
-
L
0.25
0.010
0.072
0.014
0.009
0.255
0.220
1.85
0.38
0.25
6.50
5.60
-
SEATING PLANE
A
9
-A-
D
C
D
E
-
3
-C-
α
4
A2
e
A1
e
0.026 BSC
0.65 BSC
-
C
B
0.10(0.004)
H
L
0.292
0.022
0.322
0.037
7.40
0.55
8.20
0.95
-
0.25(0.010) M
C
A M B S
6
N
α
16
16
7
Notes:
0°
8°
0°
8°
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 3 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.13mm (0.005 inch) total in excess of “B”
dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4805 Rev.23.00
Apr.26.19
Page 28 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
For the most recent package outline drawing, see M16.3.
M16.3 (JEDEC MS-013-AA ISSUE C)
16 Lead Wide Body Small Outline Plastic Package (SOIC)
N
INCHES
MILLIMETERS
INDEX
0.25(0.010)
M
L
B M
SYMBOL
MIN
MAX
MIN
2.35
0.10
0.33
0.23
10.10
7.40
MAX
2.65
NOTES
H
AREA
E
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
0.1043
0.0118
0.0200
0.0125
0.4133
0.2992
-
-B-
0.30
-
0.51
9
1
2
3
0.0091
0.3977
0.2914
0.32
-
10.50
7.60
3
SEATING PLANE
A
4
-A-
h x 45°
D
0.050 BSC
1.27 BSC
-
H
h
0.394
0.010
0.016
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
-C-
α
5
e
A1
L
6
C
B
0.10(0.004)
N
α
16
16
7
0.25(0.010) M
C
A M B S
0°
8°
0°
8°
-
Rev. 1 6/05
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm (0.024
inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4805 Rev.23.00
Apr.26.19
Page 29 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
For the most recent package outline drawing, see M18.3.
M18.3 (JEDEC MS-013-AB ISSUE C)
18 Lead Wide Body Small Outline Plastic Package (SOIC)
N
INCHES
MIN
MILLIMETERS
INDEX
0.25(0.010)
M
L
B M
SYMBOL
MAX
0.1043
0.0118
0.0200
0.0125
0.4625
0.2992
MIN
2.35
0.10
0.33
0.23
11.35
7.40
MAX
2.65
NOTES
H
AREA
E
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
-
-B-
0.30
-
0.51
9
1
2
3
0.0091
0.4469
0.2914
0.32
-
11.75
7.60
3
SEATING PLANE
A
4
-A-
h x 45°
D
0.050 BSC
1.27 BSC
-
H
h
0.394
0.010
0.016
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
-C-
α
5
e
A1
L
6
C
B
0.10(0.004)
N
α
18
18
7
0.25(0.010) M
C
A M B S
0°
8°
0°
8°
-
Rev. 1 6/05
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Thelead width “B”, as measured 0.36mm(0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
FN4805 Rev.23.00
Apr.26.19
Page 30 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
M20.173
For the most recent package outline drawing, see M20.173.
20 Lead Thin Shrink Small Outline Package (TSSOP)
Rev 2, 5/10
A
1
3
6.50 ±0.10
SEE DETAIL "X"
10
20
6.40
PIN #1
I.D. MARK
4.40 ±0.10
2
3
0.20 C B A
1
9
B
0.65
0.09-0.20
TOP VIEW
END VIEW
1.00 REF
H
- 0.05
C
0.90 +0.15/-0.10
1.20 MAX
SEATING
PLANE
GAUGE
PLANE
0.25
0.25 +0.05/-0.06
5
0.10
C B A
M
0.10 C
0°-8°
0.05 MIN
0.15 MAX
0.60 ±0.15
SIDE VIEW
DETAIL "X"
(1.45)
NOTES:
1. Dimension does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
3. Dimensions are measured at datum plane H.
(5.65)
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.08mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead
is 0.07mm.
(0.65 TYP)
(0.35 TYP)
6. Dimension in ( ) are for reference only.
TYPICAL RECOMMENDED LAND PATTERN
7. Conforms to JEDEC MO-153.
FN4805 Rev.23.00
Apr.26.19
Page 31 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
For the most recent package outline drawing, see M20.209.
M20.209 (JEDEC MO-150-AE ISSUE B)
20 Lead Shrink Small Outline Plastic Package (SSOP)
N
INCHES
MIN
MILLIMETERS
INDEX
M
M
0.25(0.010)
B
SYMBOL
MAX
0.078
0.008’
0.070’
0.015
0.008
0.289
0.212
MIN
1.73
0.05
1.68
0.25
0.09
7.07
5.20’
MAX
1.99
0.21
1.78
0.38
0.20’
7.33
5.38
NOTES
H
AREA
E
A
A1
A2
B
0.068
0.002
0.066
0.010’
0.004
0.278
0.205
GAUGE
PLANE
-B-
1
2
3
9
L
C
D
E
0.25
0.010
SEATING PLANE
A
3
4
-A-
D
e
0.026 BSC
0.65 BSC
-C-
H
L
0.301
0.025
0.311
0.037
7.65
0.63
7.90’
0.95
α
A2
e
A1
6
7
C
B
0.10(0.004)
N
α
20
20
M
M
S
B
0.25(0.010)
C
A
0 deg.
8 deg.
0 deg.
8 deg.
Rev. 3 11/02
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess
of “B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
FN4805 Rev.23.00
Apr.26.19
Page 32 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
M28.173
For the most recent package outline drawing, see M28.173.
28 Lead Thin Shrink Small Outline Package (TSSOP)
Rev 1, 5/10
A
1
3
9.70± 0.10
SEE DETAIL "X"
15
28
6.40
PIN #1
I.D. MARK
4.40 ± 0.10
2
3
0.20 C B A
1
14
+0.05
0.15
-0.06
B
0.65
TOP VIEW
END VIEW
1.00 REF
H
-
0.05
+0.15
0.90
C
-0.10
GAUGE
PLANE
1.20 MAX
0.25
SEATING PLANE
0.10 C
+0.05
0.25
0°-8°
0.60 ±0.15
5
-0.06
0.05 MIN
0.15 MAX
0.10
C B A
M
SIDE VIEW
DETAIL "X"
(1.45)
NOTES:
1. Dimension does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
3. Dimensions are measured at datum plane H.
(5.65)
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.08mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead
is 0.07mm.
(0.35 TYP)
(0.65 TYP)
TYPICAL RECOMMENDED LAND PATTERN
6. Dimension in ( ) are for reference only.
7. Conforms to JEDEC MO-153.
FN4805 Rev.23.00
Apr.26.19
Page 33 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
For the most recent package outline drawing, see M28.209.
M28.209 (JEDEC MO-150-AH ISSUE B)
28 Lead Shrink Small Outline Plastic Package (SSOP)
N
INCHES
MILLIMETERS
INDEX
0.25(0.010)
M
B M
SYMBOL
MIN
MAX
0.078
-
MIN
-
MAX
2.00
-
NOTES
H
AREA
E
A
A1
A2
B
-
-
GAUGE
PLANE
-B-
0.002
0.065
0.009
0.004
0.390
0.197
0.05
1.65
0.22
0.09
9.90
5.00
-
0.072
0.014
0.009
0.413
0.220
1.85
0.38
0.25
10.50
5.60
-
1
2
3
9
L
C
D
E
-
0.25
0.010
SEATING PLANE
A
3
-A-
D
4
e
0.026 BSC
0.65 BSC
-
-C-
α
H
L
0.292
0.022
0.322
0.037
7.40
0.55
8.20
0.95
-
A2
e
A1
6
C
B
0.10(0.004)
N
α
28
28
7
0.25(0.010) M
C
A M B S
0°
8°
0°
8°
-
Rev. 2 6/05
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.20mm (0.0078 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.20mm (0.0078
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.13mm (0.005 inch) total in excess of
“B” dimension at maximum material condition.
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
FN4805 Rev.23.00
Apr.26.19
Page 34 of 36
ICL3221, ICL3222, ICL3223, ICL3232, ICL3241, ICL3243
7. Package Outline Drawings
For the most recent package outline drawing, see M28.3.
M28.3 (JEDEC MS-013-AE ISSUE C)
28 Lead Wide Body Small Outline Plastic Package (SOIC)
N
INCHES
MILLIMETERS
INDEX
SYMBOL
MIN
MAX
MIN
2.35
0.10
0.33
0.23
MAX
2.65
NOTES
0.25(0.010)
M
L
B M
H
AREA
E
A
A1
B
C
D
E
e
0.0926
0.0040
0.013
0.1043
0.0118
0.0200
0.0125
-
-B-
0.30
-
0.51
9
1
2
3
0.0091
0.6969
0.2914
0.32
-
0.7125 17.70
18.10
7.60
3
SEATING PLANE
A
0.2992
7.40
4
-A-
h x 45o
D
0.05 BSC
1.27 BSC
-
H
h
0.394
0.01
0.419
0.029
0.050
10.00
0.25
0.40
10.65
0.75
1.27
-
-C-
5
a
e
A1
L
0.016
6
C
B
N
α
28
28
7
0.10(0.004)
0o
8o
0o
8o
-
0.25(0.010) M
C
A M B S
Rev. 1, 1/13
Notes:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
TYPICAL RECOMMENDED LAND PATTERN
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
(1.50mm)
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
(9.38mm)
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
(1.27mm TYP)
(0.51mm TYP)
FN4805 Rev.23.00
Apr.26.19
Page 35 of 36
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相关型号：
ICL3241IBZ-T
1mA Supply-Current, +3V to +5.5V, 250kbps, RS-232 Transmitters/Receivers; SOIC28, SSOP28, TSSOP28; Temp Range: See Datasheet
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