HD74LS375FP-EL [RENESAS]
LS SERIES, D LATCH, PDSO16, FP-16DA;
| 型号： | HD74LS375FP-EL |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | LS SERIES, D LATCH, PDSO16, FP-16DA 锁存器 |
| 文件： | 总6页 (文件大小：69K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HD74LS375
Quadruple Bistable Latches
REJ03D0484–0200
Rev.2.00
Feb.18.2005
The HD74LS375 bistable latch is electrically and functionally identical to the HD74LS75, respectively. Only the
arrangement of the terminals has been changed in the HD74LS375. This latch is ideally suited for use as temporary
storage for binary information between processing units and input / output or indicator units. Information present at a
data (D) input is transferred to the Q output when the enable (G) is high and the Q output will follow the data input as
long as the enable remains high. When the enable goes low, the information (that was present at the data input at the
time the transition occurred) is retained at the Q output until the enable goes high.
Features
•
Ordering Information
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
Part Name
Package Type
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
HD74LS375P
HD74LS375FPEL
P
—
PRSP0016DH-B
(FP-16DAV)
SOP-16 pin (JEITA)
FP
EL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1D
1Q
1Q
VCC
Q D
4D
4Q
4Q
Q G
D Q
Enable
1-2
G Q
Enable
3-4
Q G
2Q
2Q
G Q
Q D
3Q
3Q
3D
D
Q
2D
GND
(Top view)
Rev.2.00, Feb.18.2005, page 1 of 5
HD74LS375
Function Table
Inputs
Outputs
D
L
G
H
H
L
Q
L
Q
H
H
X
H
L
Q0
Q0
Notes: H; high level, L; low level, X; irrelevant
Q0; level of Q before the indicated steady state input conditions were established
Q0; complement of Q0 or level of Q before the indicated steady state input conditions were established
Block Diagram (1/4)
Q
Data
Q
To Other
Latch
Enable
Absolute Maximum Ratings
Item
Supply voltage
Symbol
VCC
Ratings
Unit
V
7
Input voltage
VIN
7
V
Power dissipation
Storage temperature
PT
400
mW
°C
Tstg
–65 to +150
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item
Symbol
VCC
IOH
Min
4.75
—
Typ
5.00
—
Max
5.25
–400
8
Unit
Supply voltage
Output current
V
µA
mA
°C
ns
ns
ns
IOL
—
—
Operating temperature
Enable input pulse width
Setup time
Topr
tw
–20
20
25
75
—
—
tsu
20
—
—
Hold time
th
5
—
—
Rev.2.00, Feb.18.2005, page 2 of 5
HD74LS375
Electrical Characteristics
(Ta = –20 to +75 °C)
Item
Input voltage
Symbol
min.
2.0
—
typ.*
—
max.
—
Unit
V
Condition
VIH
VIL
—
0.8
V
VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V,
IOH = –400 µA
VOH
VOL
IIH
2.7
—
—
V
Output voltage
Input current
—
—
—
—
—
—
—
—
–20
—
—
—
—
—
—
—
—
—
—
—
6.3
—
0.4
0.5
IOL = 4 mA
IOL = 8 mA
D
VCC = 4.75 V,
VIH = 2 V, VIL = 0.8 V
V
20
µA
mA
mA
VCC = 5.25 V, VI = 2.7 V
VCC = 5.25 V, VI = 0.4 V
VCC = 5.25 V, VI = 7 V
80
G
D
G
D
G
–0.4
–1.6
0.1
IIL
II
0.4
Short-circuit output current
Supply current**
IOS
ICC
VIK
–100
12
mA
mA
V
VCC = 5.25 V
VCC = 5.25 V
Input clamp voltage
–1.5
VCC = 4.75 V, IIN = –18 mA
Notes: * VCC = 5 V, Ta = 25°C
** ICC is measured with all outputs open and all inputs grounded.
Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item
Symbol
tPLH
Inputs
Output
min.
—
typ.
15
9
max.
27
Unit
Condition
D
Q
tPHL
—
17
tPLH
—
12
7
20
D
G
G
Q
Q
Q
tPHL
—
15
CL = 15 pF,
RL = 2 kΩ
Propagation delay time
ns
tPLH
—
15
14
16
7
27
tPHL
—
25
tPLH
—
30
tPHL
—
15
Rev.2.00, Feb.18.2005, page 3 of 5
HD74LS375
Testing Method
Test Circuit
VCC
D
G
Q
Q
R
L
RL
P.G.
D
G
Q
Z
Z
out = 50Ω
Q
P.G.
out = 50Ω
CL
C
L
Notes:
1. Test is put into the each latch.
2. CL includes prove and jig capacitance.
3. All diodes are 1S2074(H).
Waveform
1µs
1µs
tTLH
tTHL
3V
0V
90%
1.3 V
90%
1.3 V
1.3 V
D
G
Q
Q
10%
10%
tsu
th
tsu
th
tTLH
tTHL
3V
0V
90%90%
1.3 V 1.3 V
10% 10%
1.3 V 1.3 V
tPHL
500ns
500ns
tPHL
tPLH
tPLH
VOH
1.3 V
1.3 V
VOL
tPLH
VOH
tPLH
1.3 V
1.3 V
tPHL
VOL
tPHL
Notes:
1. Input pulse; D input: PRR = 500 kHz, G input: PRR = 1 MHz, tTHL ≤ 10 ns, tTLH ≤ 10 ns.
2. When measuring propagation delay times from the D input, the corresponding G input must be
held high.
Rev.2.00, Feb.18.2005, page 4 of 5
HD74LS375
Package Dimensions
JEITA Package Code
P-DIP16-6.3x19.2-2.54
RENESAS Code
PRDP0016AE-B
Previous Code
DP-16FV
MASS[Typ.]
1.05g
D
16
9
1
8
b 3
0.89
Z
Dimension in Millimeters
Reference
Symbol
Min
Nom
7.62
19.2
6.3
Max
e
1
D
20.32
7.4
E
A
5.06
A 1
0.51
0.40
b
0.48
1.30
0.25
0.56
p
bp
e
c
b
3
c
θ
0.19
0.31
e 1
0
°
15°
e
Z
L
2.29
2.54
2.54
2.79
1.12
( Ni/Pd/Au plating )
JEITA Package Code
P-SOP16-5.5x10.06-1.27
RENESAS Code
PRSP0016DH-B
Previous Code
FP-16DAV
MASS[Typ.]
0.24g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
*1
D
F
16
9
bp
Index mark
Dimension in Millimeters
Reference
Symbol
Min
Nom
10.06
5.50
Max
10.5
Terminal cross section
( Ni/Pd/Au plating )
D
E
1
8
bp
A 2
A 1
A
*3
e
0.00
0.34
0.15
0.10
0.40
0.20
0.20
2.20
0.46
Z
x
M
L1
b p
b 1
c
0.25
c
1
θ
H E
e
0
°
8°
7.50
7.80
1.27
8.00
y
x
0.12
0.15
0.80
0.90
L
y
Z
Detail F
L
0.50
0.70
1.15
L
1
Rev.2.00, Feb.18.2005, page 5 of 5
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Colophon .2.0
相关型号：
HD74LS375P-E
LS SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, PDIP16, 6.30 X 19.20 MM, 2.54 MM PITCH, PLASTIC, DIP-16
RENESAS
HD74LS375RP
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