HD74HC77FP-EL [RENESAS]
HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDSO14, FP-14DA;型号: | HD74HC77FP-EL |
厂家: | RENESAS TECHNOLOGY CORP |
描述: | HC/UH SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDSO14, FP-14DA 锁存器 |
文件: | 总7页 (文件大小:96K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HD74HC77
4-bit Bistable Latch
REJ03D0552-0200
(Previous ADE-205-424)
Rev.2.00
Oct 06, 2005
Description
The HD74HC77 is ideally suited for use as temporary storage for binary information between processing units and
input/output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable
(G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low
the information (that was present at the data input at the time the transition occurred) is retained at the Q output until the
enable is permitted to go high.
Features
•
•
•
•
•
•
High Speed Operation: tpd (D to Q) = 12 ns typ (CL = 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Ordering Information
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
Part Name
Package Type
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
HD74HC77P
P
—
PRSP0014DF-B
(FP-14DAV)
HD74HC77FPEL
HD74HC77RPEL
SOP-14 pin (JEITA)
SOP-14 pin (JEDEC)
FP
RP
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
PRSP0014DE-A
(FP-14DNV)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
Output
Data
L
Enable G
Q
H
H
L
L
H
H
X
No change
H :
L :
X :
High level
Low level
Irrelevant
Rev.2.00, Oct 06, 2005 page 1 of 6
HD74HC77
Pin Arrangement
1D 1
2D 2
14 1Q
Q
G
13 2Q
D
D
Enable3-4 3
12 Enable1-2
11 GND
10 NC
G
Q
Q
VCC
4
3D 5
4D 6
NC 7
D
D
G
9
8
3Q
4Q
G
Q
(Top view)
Logic Diagram (1/4)
Data
Q
Enable
Absolute Maximum Ratings
Item
Supply voltage range
Input / Output voltage
Input / Output diode current
Output current
Symbol
Ratings
–0.5 to 7.0
Unit
V
VCC
Vin, Vout
IIK, IOK
IO
–0.5 to VCC +0.5
V
±20
±25
mA
mA
mA
mW
°C
VCC, GND current
ICC or IGND
PT
±50
Power dissipation
500
Storage temperature
Tstg
–65 to +150
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Rev.2.00, Oct 06, 2005 page 2 of 6
HD74HC77
Recommended Operating Conditions
Item
Supply voltage
Symbol
VCC
Ratings
2 to 6
Unit
V
Conditions
Input / Output voltage
Operating temperature
VIN, VOUT
Ta
0 to VCC
–40 to 85
0 to 1000
0 to 500
0 to 400
V
°C
VCC = 2.0 V
VCC = 4.5 V
Input rise / fall time*1
tr, tf
ns
VCC = 6.0 V
Note: 1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Ta = 25°C
Typ Max
Ta = –40 to+85°C
Item
Symbol VCC (V)
VIH
Unit
Test Conditions
Min
1.5
3.15
4.2
—
Min
1.5
3.15
4.2
—
Max
—
Input voltage
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
—
—
—
—
V
V
V
—
—
—
—
VIL
—
0.5
1.35
1.8
—
0.5
1.35
1.8
—
—
—
—
—
—
—
Output voltage
VOH
1.9
4.4
5.9
4.18
5.68
—
2.0
4.5
6.0
—
1.9
4.4
5.9
4.13
5.63
—
Vin = VIH or VIL IOH = –20 µA
—
—
—
—
—
—
IOH = –4 mA
IOH = –5.2 mA
—
—
—
VOL
0.0
0.0
0.0
—
0.1
0.1
0.1
0.26
0.26
±0.1
2.0
0.1
0.1
0.1
0.33
0.33
±1.0
20
V
Vin = VIH or VIL IOL = 20 µA
—
—
—
—
—
—
IOL = 4 mA
—
—
—
IOL = 5.2 mA
Input current
Iin
—
—
—
µA Vin = VCC or GND
Quiescent supply
current
ICC
—
—
—
µA Vin = VCC or GND, Iout = 0 µA
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Typ Max
Ta = –40 to +85°C
Item
Symbol VCC (V)
Unit
Test Conditions
Min
—
—
—
—
—
—
5
Min
—
—
—
—
—
—
5
Max
130
26
Propagation delay tPLH, tPHL
time
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
—
—
12
—
—
13
—
—
1
105
21
18
100
20
17
—
ns Data to Q
22
125
25
ns G to Q
21
Hold time
th
—
ns
ns
pF
5
—
5
—
5
—
—
5
—
5
—
Output rise/fall
time
tTLH, tTHL
—
—
—
—
75
15
13
10
—
—
—
—
95
19
—
5
16
Input capacitance
Cin
10
Rev.2.00, Oct 06, 2005 page 3 of 6
HD74HC77
Test Circuit
VCC
Input
Input
VCC
Output
Enable
Q
Pulse generator
Zout
CL = 50 pF
Ω
= 50
Output
Data
Q
Pulse generator
Zout
Ω
= 50
CL = 50 pF
Note: CL includes the probe and jig capacitance.
Waveforms
• Waveform − 1
tr
tf
tw
tw
VCC
0 V
90 %
50 %
90 %
50 %
D
50 %
10 %
10 %
tsu
th
tf
tsu
th
tr
VCC
0 V
90 % 90 %
Latch
Enable
50 %
10 %
50 %
10 %
50 %
50 %
tw
tw
tPHL
tPHL
tPLH
tPLH
VOH
90 %
90 %
Q
50 %
10 %
50 %
10 %
VOL
tTLH
tTHL
Note: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns
Rev.2.00, Oct 06, 2005 page 4 of 6
HD74HC77
Package Dimensions
JEITA Package Code
P-DIP14-6.3x19.2-2.54
RENESAS Code
PRDP0014AB-B
Previous Code
DP-14AV
MASS[Typ.]
0.97g
D
14
8
1
7
b 3
Z
Dimension in Millimeters
Reference
Symbol
Min
Nom
7.62
19.2
6.3
Max
e 1
D
20.32
7.4
E
A
5.06
A 1
b p
b 3
c
0.51
0.40
0.48
1.30
0.25
0.56
b p
e
c
0.19
0.31
e1
θ
0
°
15°
e
2.29
2.54
2.54
2.79
2.39
Z
( Ni/Pd/Au plating )
L
JEITA Package Code
RENESAS Code
PRSP0014DE-A
Previous Code
FP-14DNV
MASS[Typ.]
0.13g
P-SOP14-3.95x8.65-1.27
NOTE)
*1
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
F
D
14
8
bp
Index mark
Dimension in Millimeters
Reference
Symbol
Min
Nom
8.65
3.95
Max
9.05
Terminal cross section
( Ni/Pd/Au plating )
D
E
A 2
A 1
A
0.10
0.34
0.15
0.14
0.40
0.20
0.25
1.75
0.46
1
7
*3
e
bp
Z
x
M
b p
b 1
c
L 1
0.25
c
1
θ
H E
e
0
°
8°
5.80
6.10
1.27
6.20
x
0.25
0.15
L
y
y
Z
0.635
1.27
Detail F
L
0.40
0.60
1.08
L
1
Rev.2.00, Oct 06, 2005 page 5 of 6
HD74HC77
JEITA Package Code
P-SOP14-5.5x10.06-1.27
RENESAS Code
PRSP0014DF-B
Previous Code
FP-14DAV
MASS[Typ.]
0.23g
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
*1
D
F
14
8
bp
Index mark
Dimension in Millimeters
Reference
Symbol
Min
Nom
10.06
5.50
Max
10.5
Terminal cross section
( Ni/Pd/Au plating )
D
E
A 2
A 1
A
1
7
0.00
0.34
0.15
0.10
0.40
0.20
0.20
2.20
0.46
*3
e
bp
Z
x
M
L1
b p
b 1
c
0.25
c
1
θ
H E
e
0
°
8°
7.50
7.80
1.27
8.00
x
0.12
0.15
1.42
0.90
L
y
y
Z
Detail F
L
0.50
0.70
1.15
L
1
Rev.2.00, Oct 06, 2005 page 6 of 6
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