HAT2200R-EL-E [RENESAS]
Silicon N Channel Power MOS FET Power Switching; 硅N通道功率MOS FET电源开关
| 型号： | HAT2200R-EL-E |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Silicon N Channel Power MOS FET Power Switching |
| 文件： | 总8页 (文件大小：90K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HAT2200R
Silicon N Channel Power MOS FET
Power Switching
REJ03G0232-0200Z
Rev.2.00
Apr.05.2004
Features
•
•
•
•
Capable of 8 V gate drive
Low drive current
High density mounting
Low on-resistance
RDS(on) = 22 mΩ typ. (at VGS = 10 V)
Outline
SOP-8
5
6
7
8
4
3
2
1
5 6
7
8
D D
D
D
4
G
1, 2, 3
4
Source
Gate
5, 6, 7, 8 Drain
S
1
S
2
S
3
Rev.2.00, Apr.05.2004, page 1 of 7
HAT2200R
Absolute Maximum Ratings
(Ta = 25°C)
Item
Symbol
VDSS
VGSS
ID
Ratings
Unit
V
Drain to source voltage
Gate to source voltage
Drain current
100
±20
V
8
A
Note1
Drain peak current
ID(pulse)
64
A
Body-drain diode reverse drain current
Avalanche current
IDR
8
A
Note 2
IAP
8
A
Note 2
Avalanche energy
EAR
6.4
mJ
W
Channel dissipation
Pch Note3
θch-a Note3
Tch
2.5
Channel to Ambient Thermal Impedance
Channel temperature
50
°C/W
°C
°C
150
Storage temperature
Tstg
–55 to +150
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value at Tch = 25°C, Rg ≥ 50 Ω
3. When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s
Electrical Characteristics
(Ta = 25°C)
Item
Symbol Min
Typ
—
Max
—
Unit
V
Test Conditions
Drain to source breakdown voltage
Gate to source leak current
Zero gate voltage drain current
Gate to source cutoff voltage
Static drain to source on state
resistance
V(BR)DSS
IGSS
100
—
—
3.5
—
—
8
ID = 10 mA, VGS = 0
VGS = ±20 V, VDS = 0
VDS = 100 V, VGS = 0
VDS = 10 V, I D = 1 mA
ID = 4 A, VGS = 10 V Note4
ID = 4 A, VGS = 8 V Note4
ID = 4 A, VDS = 10 V Note4
VDS = 10 V
—
± 0.1
1
µA
µA
V
IDSS
—
VGS(off)
RDS(on)
RDS(on)
|yfs|
—
5.0
28
33
—
22
23
14
2300
280
90
1.3
32
12
8
mΩ
mΩ
S
Forward transfer admittance
Input capacitance
Ciss
Coss
Crss
Rg
—
—
—
—
—
—
—
—
—
—
—
—
—
—
pF
pF
pF
Ω
Output capacitance
—
VGS = 0
Reverse transfer capacitance
Gate Resistance
—
f = 1 MHz
—
Total gate charge
Qg
—
nC
nC
nC
ns
ns
ns
ns
V
VDD = 50 V
Gate to source charge
Gate to drain charge
Turn-on delay time
Qgs
Qgd
td(on)
tr
—
VGS = 10 V
—
ID = 8 A
16
4
—
VGS = 10 V, ID = 4 A
VDD 30 V
Rise time
—
Turn-off delay time
td(off)
tf
32
4.5
0.79
45
—
RL = 7.5 Ω
Fall time
—
Rg = 4.7 Ω
IF = 8 A, VGS = 0 Note4
Body–drain diode forward voltage
VDF
1.03
—
Body–drain diode reverse recovery time trr
ns
IF = 8 A, VGS = 0
diF/ dt = 100 A/ µs
Notes: 4. Pulse test
Rev.2.00, Apr.05.2004, page 2 of 7
HAT2200R
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
100
10
1
4.0
3.0
2.0
1.0
10 µs
Test Condition :
When using the glass epoxy board
(FR4 40x40x1.6 mm), PW < 10 s
100 µs
Operation in
this area is
limited by RDS(on)
1 ms
PW =
10 ms
0.1
DC Operation
(PW £ 10 s)Note 5
0.01
Ta = 25°C
1 shot Pulse
0.001
0
0.1
0.3
1
3
10 30 100 300 1000
50
100
150
200
Drain to Source Voltage VDS (V)
Ambient Temperature Ta (°C)
Note 5 :
When using the glass epoxy board
(FR4 40x40x1.6 mm)
Typical Output Characteristics
Typical Transfer Characteristics
20
16
12
8
20
16
12
8
5.8 V
VDS = 10 V
Pulse Test
10 V
6 V
5.6 V
Tc = 75°C
V
GS = 5.4 V
25°C
4
4
–25°C
Pulse Test
8 10
0
0
10
2
4
6
Gate to Source Voltage
8
2
4
6
V
(V)
Drain to Source Voltage VDS (V)
GS
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Static Drain to Source on State Resistance
vs. Drain Current
100
250
200
150
100
50
Pulse Test
Pulse Test
50
VGS = 8 V
10 V
20
10
5
ID = 5 A
2 A
1 A
2
1
0
5
10
15
Gate to Source Voltage VGS (V)
20
1
10
Drain Current ID (A)
100
Rev.2.00, Apr.05.2004, page 3 of 7
HAT2200R
Static Drain to Source on State Resistance
vs. Temperature
Forward Transfer Admittance vs.
Drain Current
50
100
10
1
Pulse Test
1 A, 2 A, 5 A
Tc = –25°C
40
30
20
25°C
ID = 1 A, 2 A, 5 A
VGS = 8 V
75°C
10 V
10
2
VDS = 10 V
Pulse Test
0.1 0.3
3
30
-25
0
25 50 75 100 125 150
1
10
100
Case Temperature Tc (°C)
Drain Current ID (A)
Body–Drain Diode Reverse
Recovery Time
Typical Capacitance vs.
Drain to Source Voltage
10000
100
50
Ciss
3000
1000
300
100
Coss
Crss
20
10
30
10
di/dt = 100 A/µs
VGS = 0
V
GS = 0, Ta = 25°C
f = 1 MHz
0.1
1
10 100
0
10
20
30
40
50
Reverse Drain Current IDR (A)
Drain to Source Voltage VDS (V)
Dynamic Input Characteristics
Switching Characteristics
250
200
150
100
50
20
16
12
8
1000
100
ID = 8 A
VGS = 10 V, VDS = 30 V
Rg = 4.7Ω, duty < 1 %
VDS = 100 V
50 V
25 V
VGS
t
d(off)
VDS
t
d(on)
10
1
t
f
4
0
VDS = 100 V
50 V
25 V
t
r
0.1
1
10
100
0
10
20
30
40
50
Drain Current ID (A)
Gate Charge Qg (nC)
Rev.2.00, Apr.05.2004, page 4 of 7
HAT2200R
Maximum Avalanche Energy vs.
Channel Temperature Derating
Reverse Drain Current vs.
Source to Drain Voltage
20
16
12
8
10
8
IAP = 8 A
VGS = 0 V, –5 V
10 V
VDD = 50 V
duty < 0.1 %
Rg > 50 Ω
6
4
4
2
0
Pulse Test
1.6 2.0
Source to Drain Voltage VSDF (V)
0
0.4
0.8
1.2
25
50
75
100
125
150
Channel Temperature Tch (°C)
Normalized Transient Thermal Impedance vs. Pulse Width
10
D = 1
0.5
1
0.1
0.1
θ
θ
γ
θ
ch - f(t) = s (t) x ch - f
ch - f = 83.3°C/W, Ta = 25°C
0.01
0.001
When using the glass epoxy board
(FR4 40 x 40 x 1.6 mm)
PW
T
P
DM
D =
PW
T
0.0001
100 µ
1 m
10 m
100 m
1
10
100
1000
10000
10 µ
Pulse Width PW (s)
Rev.2.00, Apr.05.2004, page 5 of 7
HAT2200R
Avalanche Test Circuit
Avalanche Waveform
V
DSS
1
2
EAR
=
L
•
IAP
•
V
- V
DD
DSS
2
L
V
DS
Monitor
I
AP
Monitor
V
(BR)DSS
I
AP
Rg
V
V
DD
D. U. T
DS
I
D
Vin
15 V
50Ω
V
DD
0
Switching Time Test Circuit
Vin Monitor
Switching Time Waveform
Vout
Monitor
90%
D.U.T.
Rg
10%
10%
Vin
R
L
Vout
10%
V
DS
= 30 V
Vin
10 V
90%
tr
90%
td(off)
td(on)
t
f
Rev.2.00, Apr.05.2004, page 6 of 7
HAT2200R
Package Dimensions
As of January, 2003
Unit: mm
4.90
5.3 Max
8
5
1
4
+ 0.10
– 0.30
6.10
0.75 Max
1.08
0˚ – 8˚
+ 0.67
– 0.20
0.60
1.27
*0.42 0.08
0.40 0.06
0.15
M
0.25
Package Code
JEDEC
JEITA
FP-8DA
Conforms
—
*Dimension including the plating thickness
Base material dimension
Mass (reference value)
0.085 g
Ordering Information
Part Name
Quantity
Shipping Container
HAT2200R-EL-E
2500pcs
Taping
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
Rev.2.00, Apr.05.2004, page 7 of 7
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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