EL5244CYZ-T13 [RENESAS]
1 CHANNEL, VIDEO AMPLIFIER, PDSO8, ROHS COMPLIANT, MSOP-8;
| 型号： | EL5244CYZ-T13 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | 1 CHANNEL, VIDEO AMPLIFIER, PDSO8, ROHS COMPLIANT, MSOP-8 放大器 光电二极管 商用集成电路 |
| 文件： | 总24页 (文件大小：1311K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
EL5144, 244, EL5246, EL5444
-Rail Amplifiers
FN7177
Rev 2.00
March 31, 2011
es amplifiers are voltage-feedback, high
d, rail-to-rail amplifiers designed to operate on a single
+5V supply. They offer unity gain stability with an unloaded
-3dB bandwidth of 100MHz. The input common-mode
voltage range extends from the negative rail to within 1.5V of
the positive rail. Driving a 75W double terminated coaxial
cable, the EL5144 series amplifiers drive to within 150mV of
either rail. The 200V/µs slew rate and 0.1%/0.1° differential
gain/differential phase makes these parts ideal for composite
and component video applications. With their voltage
feedback architecture, these amplifiers can accept reactive
feedback networks, allowing them to be used in analog
filtering applications These amplifiers will source 90mA and
sink 65mA.
Features
• Rail-to-rail output swing
• -3dB bandwidth = 100MHz
• Single-supply +5V operation
• Power-down to 2.6µA
• Large input common-mode range 0V < V
• Diff gain/phase = 0.1%/0.1°
< 3.5V
CM
• Low power 35mW per amplifier
• Space-saving SOT23-5, 8 Ld MSOP and 10 Ld MSOP,
and 16 Ld QSOP packages
• Pb-Free available (RoHS compliant)
The EL5146 and EL5246 have a power-savings disable
feature. Applying a standard TTL low logic level to the CE (Chip
Enable) pin reduces the supply current to 2.6µA within 10ns.
Turn-on time is 500ns, allowing true break-before-make
conditions for multiplexing applications. Allowing the CE pin to
float or applying a high logic level will enable the amplifier.
Applications
• Video amplifiers
• 5V analog signal processing
• Multiplexers
For applications where board space is critical, singles are
offered in a 5 Ld SOT-23 package, duals in 8 Ld and 10 Ld
MSOP packages, and quads in a 16 Ld QSOP package.
Singles, duals, and quads are also available in industry
standard pinouts in SO and PDIP packages. All parts operate
over the industrial temperature range of -40°C to +85°C.
• Line drivers
• Portable computers
• High speed communications
• Sample and hold amplifiers
• Comparators
FN7177 Rev 2.00
March 31, 2011
Page 1 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Ordering Information
PART NUMBER
PART MARKING
PACKAGE
5 Ld SOT-23**
PKG. DWG. #
EL5144CW
J
MDP0038
MDP0038
MDP0038
MDP0038
MDP0038
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0043
MDP0043
MDP0043
MDP0043
MDP0043
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
MDP0043
MDP0043
MDP0043
MDP0043
MDP0043
MDP0031
MDP0027
MDP0027
MDP0027
EL5144CW-T7*
J
5 Ld SOT-23**
5 Ld SOT-23**
5 Ld SOT-23** (Pb-free)
5 Ld SOT-23** (Pb-free)
8 Ld PDIP
EL5144CW-T7A*
EL5144CWZ-T7* (Note)
EL5144CWZ-T7A* (Note)
EL5146CN
J
BAHA
BAHA
EL5146CN
5146CS
5146CS
5146CS
5146CSZ
5146CSZ
5146CSZ
EL5244CN
5244CS
5244CS
5244CS
5244CSZ
5244CSZ
5244CSZ
H
EL5146CS
8 Ld SOIC
EL5146CS-T7*
8 Ld SOIC
EL5146CS-T13*
EL5146CSZ (Note)
EL5146CSZ-T7* (Note)
EL5146CSZ-T13* (Note)
EL5244CN
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free)
8 Ld PDIP
EL5244CS
8 Ld SOIC
EL5244CS-T7*
8 Ld SOIC
EL5244CS-T13*
EL5244CSZ (Note)
EL5244CSZ-T7* (Note)
EL5244CSZ-T13* (Note)
EL5244CY
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free)
8 Ld SOIC (Pb-free)
8 Ld MSOP
EL5244CY-T13*
EL5244CYZ (Note)
EL5244CYZ-T7* (Note)
EL5244CYZ-T13* (Note)
EL5246CN
H
8 Ld MSOP
BAVAA
BAVAA
BAVAA
EL5246CN
5246CS
5246CS
5246CS
5246CSZ
5246CSZ
5246CSZ
C
8 Ld MSOP (Pb-free)
8 Ld MSOP (Pb-free)
8 Ld MSOP (Pb-free)
14 Ld PDIP
EL5246CS
14 Ld SOIC
EL5246CS-T7*
14 Ld SOIC
EL5246CS-T13*
EL5246CSZ (Note)
EL5246CSZ-T7* (Note)
EL5246CSZ-T13* (Note)
EL5246CY
14 Ld SOIC
14 Ld SOIC (Pb-free)
14 Ld SOIC (Pb-free)
14 Ld SOIC (Pb-free)
10 Ld MSOP
EL5246CY-T13*
EL5246CYZ (Note)
EL5246CYZ-T7* (Note)
EL5246CYZ-T13* (Note)
EL5444CN
C
10 Ld MSOP
BAWAA
BAWAA
BAWAA
EL5444CN
5444CS
5444CS
5444CS
10 Ld MSOP (Pb-free)
10 Ld MSOP (Pb-free)
10 Ld MSOP (Pb-free)
14 Ld PDIP
EL5444CS
14 Ld SOIC
EL5444CS-T7*
14 Ld SOIC
EL5444CS-T13*
14 Ld SOIC
FN7177 Rev 2.00
March 31, 2011
Page 2 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Ordering Information (Continued)
PART NUMBER
PART MARKING
PACKAGE
14 Ld SOIC (Pb-free)
14 Ld SOIC (Pb-free)
14 Ld SOIC (Pb-free)
16 Ld QSOP
PKG. DWG. #
EL5444CSZ (Note)
5444CSZ
5444CSZ
5444CSZ
5444CU
MDP0027
MDP0027
MDP0027
MDP0040
MDP0040
MDP0040
MDP0040
MDP0040
EL5444CSZ-T7* (Note)
EL5444CSZ-T13* (Note)
EL5444CU
EL5444CU-T13*
5444CU
16 Ld QSOP
EL5444CUZ (Note)
EL5444CUZ-T7* (Note)
EL5444CUZ-T13* (Note)
5444CUZ
5444CUZ
5444CUZ
16 Ld QSOP (Pb-free)
16 Ld QSOP (Pb-free)
16 Ld QSOP (Pb-free)
*Please refer to TB347 for details on reel specifications.
**EL5144CW symbol is .Jxxx where xxx represents date
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
FN7177 Rev 2.00
March 31, 2011
Page 3 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
s
Pinouts
EL5144
(5 LD SOT-23)
TOP VIEW
EL5146
(8 LD SO, PDIP)
TOP VIEW
EL5244
(8 LD SOIC, PDIP, MSOP)
TOP VIEW
OUT
GND
IN+
1
2
3
5
4
VS
IN-
NC
IN-
1
2
3
4
8
7
6
5
CE
OUT
1
2
3
4
8
7
6
5
V
S
A
IN -
A
VS
-
OUT
B
-
+
+
-
+
IN +
A
IN -
B
IN+
OUT
NC
-
IN +
+
GND
GND
B
EL5246
(10 LD MSOP)
TOP VIEW
EL5246
(14 LD SOIC, PDIP)
TOP VIEW
EL5444
(14 LD SOIC, PDIP)
TOP VIEW
IN +
A
1
2
3
4
5
10 IN -
1
14
13
12
11
10
9
IN -
A
1
14
13
12
11
10
9
IN +
A
OUT
OUT
D
A
A
-
-
CEA
GND
CEB
9
8
7
6
OUT
2
3
4
5
6
7
NC
CEA
GND
CEB
NC
OUT
IN -
A
2
3
4
5
6
7
IN -
A
A
D
+
+
V
NC
IN +
A
S
IN +
D
+
-
OUT
V
S
B
V
S
GND
IN +
B
IN -
B
NC
IN +
B
IN +
C
+
-
OUT
B
IN -
B
IN -
C
8
IN +
B
IN -
B
OUT
8
OUT
B
C
EL5444
(16 LD QSOP)
TOP VIEW
1
16
15
OUT
OUT
D
A
2
3
4
5
6
7
8
IN -
A
IN -
D
14 IN +
D
IN +
A
13 GND
V
V
S
S
12
11
GND
IN +
B
IN +
C
IN -
B
10 IN -
C
9
OUT
C
OUT
B
FN7177 Rev 2.00
March 31, 2011
Page 4 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
Supply Voltage between V and GND. . . . . . . . . . . . . . . . . . . . .+6V
S
Pin Voltages. . . . . . . . . . . . . . . . . . . . . . . . . GND -0.5V to VS +0.5V
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications
V = +5V, GND = 0V, T = +25°C, CE = +2V, unless otherwise specified.
S A
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
d
d
Differential Gain Error (Note 1)
Differential Phase Error (Note 1)
Bandwidth
G = 2, R = 150 to 2.5V, R = 1k
0.1
0.1
100
60
%
G
P
L
F
G = 2, R = 150 to 2.5V, R = 1k
°
L
F
BW
-3dB, G = 1, R = 10k R = 0
MHz
MHz
MHz
MHz
V/µs
L
F
-3dB, G = 1, R = 150 R = 0
L
F
BW1
GBWP
SR
Bandwidth
±0.1dB, G = 1, R = 150 to GND, R = 0
8
L
F
Gain Bandwidth Product
Slew Rate
60
G = 1, R = 150 to GND, R = 0, V = 0.5V
150
200
L
F
O
to 3.5V
t
Settling Time
to 0.1%, V
= 0V to 3V
OUT
35
ns
S
DC PERFORMANCE
A
Open Loop Voltage Gain
R = no load, V
= 0.5V to 3V
54
40
65
50
dB
dB
VOL
L
OUT
R = 150 to GND, V
= 0.5V to 3V
L
OUT
V
Offset Voltage
V
V
= 1V, SOT23-5 and MSOP packages
25
15
mV
OS
CM
= 1V, All other packages
= 0V and 3.5V
mV
CM
T V
Input Offset Voltage Temperature
Coefficient
10
2
mV/°C
C
OS
I
Input Bias Current
V
100
3.5
nA
B
CM
INPUT CHARACTERISTICS
CMIR
Common Mode Input Range
CMRR 47dB
0
V
CMRR
Common Mode Rejection Ratio
DC, V
DC, V
= 0 to 3.0V
= 0 to 3.5V
50
47
60
60
dB
dB
G
pF
CM
CM
R
C
Input Resistance
Input Capacitance
1.5
1.5
IN
IN
OUTPUT CHARACTERISTICS
V
Positive Output Voltage Swing
R = 150 to 2.5V (Note 2)
4.70
4.20
4.95
4.85
4.65
4.97
0.15
0
V
V
V
V
V
V
OP
L
R = 150 to GND (Note 2)
L
R = 1k to 2.5V (Note 2)
L
V
Negative Output Voltage Swing
R = 150 to 2.5V (Note 2)
0.30
0.05
ON
L
R = 150 to GND (Note 2)
L
R = 1k to 2.5V (Note 2)
0.03
L
FN7177 Rev 2.00
March 31, 2011
Page 5 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Electrical Specifications
V
= +5V, GND = 0V, T = +25°C, CE = +2V, unless otherwise specified. (Continued)
A
S
PARAMETER
DESCRIPTION
Positive Output Current
Negative Output Current
CONDITIONS
R = 10 to 2.5V
MIN
60
TYP
90
MAX
150
UNIT
mA
+I
OUT
L
-I
R = 10 to 2.5V
-50
-65
-125
mA
OUT
L
ENABLE (EL5146 AND EL5246 ONLY)
t
t
I
I
Enable Time
EL5146, EL5246
500
10
ns
ns
EN
Disable Time
EL5146, EL5246
DIS
CE Pin Input High Current
CE Pin Input Low Current
CE = 5V, EL5146, EL5246
CE = 0V, EL5146, EL5246
EL5146, EL5246
0.003
-1.2
1
mA
mA
V
IHCE
ILCE
-3
V
CE Pin Input High Voltage for
Power-Up
2.0
IHCE
V
CE Pin Input Low Voltage for
Power-Down
EL5146, EL5246
0.8
V
ILCE
SUPPLY
Is
Supply Current - Enabled
(Per Amplifier)
No load, V = 0V, CE = 5V
IN
7
8.8
5
mA
mA
ON
Is
Supply Current - Disabled
(Per Amplifier)
No load, V = 0V, CE = 0V, EL5146 and
IN
EL5246 only
2.6
OFF
PSOR
PSRR
Power Supply Operating Range
Power Supply Rejection Ratio
4.75
50
5.0
60
5.25
V
DC, V = 4.75V to 5.25V
dB
S
NOTES:
1. Standard NTSC test, AC signal amplitude = 286mV , f = 3.8MHz, V
P-P OUT
is swept from 0.8V to 3.4V, R is DC-coupled.
L
2. R is total load resistance due to feedback resistor and load resistor.
L
Typical Performance Curves
2
A
= 1, R = 0
F
V
0
-45
A
= 1, R = 0
F
V
0
-2
-4
-6
-8
A
= 2,
= 1k
V
A
= 5.6,
= 1k
V
R
F
R
F
-90
A
= 2,
= 1k
A
= 5.6,
= 1k
V
V
R
R
F
F
-135
-180
V
R
= 1.5V
= 150
V
R
= 1.5V
CM
= 150
CM
L
L
1M
10M
FREQUENCY (Hz)
100M
1M
10M
FREQUENCY (Hz)
100M
FIGURE 1. NON-INVERTING FREQUENCY RESPONSE (GAIN)
FIGURE 2. NON-INVERTING FREQUENCY RESPONSE
(PHASE)
FN7177 Rev 2.00
March 31, 2011
Page 6 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Typical Performance Curves
2
180
135
90
A
= -1
V
A
= -1
0
-2
-4
-6
-8
V
A
= -2
A
= -2
V
V
A
= -5.6
A
= -5.6
V
V
45
V
R
R
= 1.5V
= 1k
= 150
V
R
R
= 1.5V
= 1k
= 150
CM
F
L
CM
F
L
0
1M
10M
FREQUENCY (Hz)
100M
1M
10M
100M
FREQUENCY (Hz)
FIGURE 3. INVERTING FREQUENCY RESPONSE (GAIN)
FIGURE 4. INVERTING FREQUENCY RESPONSE (PHASE)
150
100
R
= 150
R
= 10k
L
L
80
60
40
20
0
120
90
60
30
0
A
= 1, R = 0
F
V
A
= 1, R = 0
F
V
A
= 2, R = 1k
V
F
A
= 2, R = 1k
F
V
A
= 5.6, R = 1k
A
= 5.6, R = 1k
F
V
F
V
-55
-15
25
65
105
145
-55
-15
25
65
105
145
DIE TEMPERATURE (°C)
DIE TEMPERATURE (°C)
FIGURE 5. 3dB BANDWIDTH vs DIE TEMPERATURE FOR
VARIOUS GAINS
FIGURE 6. 3dB BANDWIDTH VS DIE TEMPERATURE FOR
VARIOUS GAINS
V
R
A
= 1.5V
= 0
= 1
V
R
A
= 1.5V
= 150
= 1
C =100pF
CM
F
V
CM
L
V
L
4
2
8
4
C = 47pF
L
R
= 10k
L
0
0
R
= 520
L
C
= 22pF
L
-2
-4
-4
-8
C
= 0pF
L
R = 150
L
1M
10M
FREQUENCY (Hz)
100M
1M
10M
FREQUENCY (Hz)
100M
FIGURE 7. FREQUENCY RESPONSE FOR VARIOUS R
FIGURE 8. FREQUENCY RESPONSE FOR VARIOUS C
L
L
FN7177 Rev 2.00
March 31, 2011
Page 7 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Typical Performance Curves
10
8
R
= R = 2k
G
F
2
0
A
= 2
= 1k
V
R
= R = 1k
G
F
R
F
6
-2
-4
-6
R
= R = 560
F
G
4
A
= 1
= 1
V
R
F
V
R
A
= 1.5V
= 150
= 2
CM
L
V
2
0
1M
1M
10M
100M
10M
FREQUENCY (Hz)
100M
FREQUENCY (Hz)
FIGURE 9. FREQUENCY RESPONSE FOR VARIOUS R AND
FIGURE 10. GROUP DELAY vs FREQUENCY
F
R
G
0
80
80
60
40
20
0
R
= 1k
45
70
L
PHASE
NO LOAD
90
60
50
R
= 150
L
135
180
225
GAIN
R
= 150
L
40
30
-55
1k
10k
100k
1M
10M
100M
-15
25
65
105
145
FREQUENCY (Hz)
DIE TEMPERATURE (°C)
FIGURE 11. OPEN LOOP GAIN AND PHASE vs FREQUENCY
FIGURE 12. OPEN LOOP VOLTAGE GAIN vs DIE
TEMPERATURE
10k
1k
200
R
A
= 0
= 2
F
V
20
2
100
0.2
10
10
100
1k
10k 100k 1M 10M 100M
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 13. VOLTAGE NOISE vs FREQUENCY - VIDEO AMP
FIGURE 14. CLOSED LOOP OUTPUT IMPEDANCE vs
FREQUENCY
FN7177 Rev 2.00
March 31, 2011
Page 8 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Typical Performance Curves
20
0
12
6
CMRR
-20
-40
-60
-80
PSRR-
0
-6
PSRR+
1M
-12
-55
-15
25
65
105
145
1k
10k
100k
10M
100M
DIE TEMPERATURE (°C)
FREQUENCY (Hz)
FIGURE 15. OFFSET VOLTAGE vs DIE TEMPERATURE
(6 TYPICAL SAMPLES)
FIGURE 16. PSRR AND CMRR vs FREQUENCY
5
5
R
A
= 1k
= 2
R
A
= 1k
= 2
F
V
F
V
4
3
2
1
0
4
3
2
1
0
R
= 500 TO 2.5V
L
R
= 500 TO 2.5V
L
R
= 150 TO 2.5V
L
R
= 150 TO 2.5V
L
1M
10M
FREQUENCY (Hz)
100M
1M
10M
FREQUENCY (Hz)
100M
FIGURE 17. OUTPUT VOLTAGE SWING vs FREQUENCY FOR
THD < 1%
FIGURE 18. OUTPUT VOLTAGE SWING vs FREQUENCY FOR
THD < 0.1%
4
1.9
V
= 5V
= 150 TO 0V
= 1k
V
= 5V
S
S
R
R
A
R
R
A
= 150 TO 0V
= 1k
= 2
L
F
V
L
F
V
3
2
1
0
1.7
1.5
1.3
1.1
= 2
TIME (20ns/div)
TIME (20ns/div)
FIGURE 19. LARGE SIGNAL PULSE RESPONSE (SINGLE
SUPPLY)
FIGURE 20. SMALL SIGNAL PULSE RESPONSE (SINGLE
SUPPLY)
FN7177 Rev 2.00
March 31, 2011
Page 9 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Typical Performance Curves
4
0.4
0.2
0
= ±2.5V
= 150 TO 0V
= 1k
V
= ±2.5V
= 150 TO 0V
= 1k
S
R
R
A
L
F
V
2
0
= 2
= 2
-2
-4
-0.2
-0.4
TIME (20ns/div)
TIME (20ns/div)
FIGURE 21. LARGE SIGNAL PULSE RESPONSE (SPLIT
SUPPLIES)
FIGURE 22. SMALL SIGNAL PULSE RESPONSE (SPLIT
SUPPLY)
100
250
200
150
R
R
A
= 1k
= 500
= -1
L
F
V
80
60
40
20
0
V
= 3V
STEP
0.01
0.1
SETTLING ACCURACY (%)
1
-55
-15
25
65
105
145
DIE TEMPERATURE (°C)
FIGURE 23. SETTLING TIME vs SETTLING ACCURACY
FIGURE 24. SLEW RATE vs DIE TEMPERATURE
R
A
= 0
= 1
R
A
= 0
= 1
F
V
F
V
0.08
0.04
0
0.2
0.1
0
R
= 10k
= 150
L
R
= 10k
L
R
= 150
L
R
L
-0.04
-0.08
-0.1
-0.2
0.25
1.75
(V)
3.25
0.25
1.75
(V)
3.25
V
V
OUT
OUT
FIGURE 25. DIFFERENTIAL GAIN FOR R TIED TO 0V
L
FIGURE 26. DIFFERENTIAL PHASE FOR R TIED TO 0V
L
FN7177 Rev 2.00
March 31, 2011
Page 10 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Typical Performance Curves
R
A
= 0
= 1
R
A
= 0
= 1
F
V
F
V
0.2
0.1
0
0.2
0.1
0
R
= 10k
L
R
= 10k
L
-0.1
-0.2
-0.1
-0.2
R
= 150
L
R
= 150
L
0.5
2.0
3.5
0.5
2.0
3.5
V
(V)
V
(V)
OUT
OUT
FIGURE 27. DIFFERENTIAL GAIN FOR R TIED TO 2.5V
FIGURE 28. DIFFERENTIAL PHASE FOR R TIED TO 2.5V
L
L
R
A
= 1k
= 2
R
A
= 1k
= 2
F
V
F
V
0.2
0.1
0
R =150
0.2
0.1
0
L
R
= 150
L
R =10k
L
R
= 10k
L
-0.1
-0.2
-0.1
-0.2
0.5
2.0
3.5
0.5
2.0
3.5
V
(V)
V
(V)
OUT
OUT
FIGURE 29. DIFFERENTIAL GAIN FOR R TIED TO 0V
FIGURE 30. DIFFERENTIAL PHASE FOR R TIED TO 0V
L
L
R
A
= 1k
= 2
R
A
= 1k
= 2
F
V
F
V
0.2
0.1
0
0.2
0.1
0
R
= 10k
L
R
= 150
L
R
= 150
-0.1
-0.2
-0.1
-0.2
L
R
= 10k
L
0.5
2.0
3.5
0.5
2.0
3.5
V
(V)
V
(V)
OUT
OUT
FIGURE 31. DIFFERENTIAL GAIN FOR R TIED TO 2.5V
L
FIGURE 32. DIFFERENTIAL PHASE FOR R TIED TO 2.5V
L
FN7177 Rev 2.00
March 31, 2011
Page 11 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Typical Performance Curves
-25
-35
-45
-55
-65
-75
-25
HD3
-35
HD3
-45
-55
-65
-75
HD2
HD2
V
R
= 0.5V TO 2.5V
= 100 TO 0V
OUT
L
V
R
= 0.25V TO 2.25V
= 100 TO 0V
OUT
L
1M
10M
FREQUENCY (Hz)
100M
1M
10M
FREQUENCY (Hz)
100M
FIGURE 33. 2nd AND 3rd HARMONIC DISTORTION vs
FREQUENCY
FIGURE 34. 2nd AND 3rd HARMONIC DISTORTION vs
FREQUENCY
-25
0
-20
HD3
-35
-45
-40
HD2
-55
-60
-65
-80
V
R
=1V TO3V
= 100 TO 0V
OUT
L
-75
1M
-100
100k
10M
FREQUENCY (Hz)
100M
1M
10M
100M
FREQUENCY (Hz)
FIGURE 35. 2nd AND 3rd HARMONIC DISTORTION vs
FREQUENCY
FIGURE 36. CHANNEL-TO-CHANNEL CROSSTALK - DUALS
AND QUADS (WORST CHANNEL)
120
R
= 10 TO 2.5V
L
8
6
4
2
0
100
80
60
SINK
25
40
20
-55
0
1
2
3
4
5
-15
65
105
145
SUPPLY VOLTAGE (V)
DIE TEMPERATURE (°C)
FIGURE 37. SUPPLY CURRENT (PER AMP) vs SUPPLY
VOLTAGE
FIGURE 38. OUTPUT CURRENT VS DIE TEMPERATURE
FN7177 Rev 2.00
March 31, 2011
Page 12 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Typical Performance Curves
9
5
4
3
2
1
0
8
7
6
5
4
-55
-15
25
65
105
145
-55
-15
25
65
105
145
DIE TEMPERATURE (°C)
DIE TEMPERATURE (°C)
FIGURE 39. SUPPLY CURRENT - ON (PER AMP) vs DIE
TEMPERATURE
FIGURE 40. SUPPLY CURRENT - OFF (PER AMP) vs DIE
TEMPERATURE
5.0
0.5
0.4
0.3
R =150
L
4.9
4.8
4.7
4.6
4.5
R
= 150 TO 2.5V
L
R
= 150 TO 2.5V
L
0.2
0.1
0
R
= 150 TO 0V
L
R
= 150 TO 0V
L
-55
-15
25
65
105
145
-55
-15
25
65
105
145
DIE TEMPERATURE (°C)
DIE TEMPERATURE (°C)
FIGURE 41. POSITIVE OUTPUT VOLTAGE SWING vs DIE
TEMPERATURE
FIGURE 42. NEGATIVE OUTPUT VOLTAGE SWING vs DIE
TEMPERATURE
-20
300
100
EL5146CS AND
EL5146CN
-40
-60
EL5246CS
-80
10
EL5246CN
-100
EFFECTIVE R
-15
= R //R TO V /2
LOAD
L
F
S
-120
1
-55
10k
100k
1M
10M
100M
25
65
105
145
FREQUENCY (Hz)
DIE TEMPERATURE (°C)
FIGURE 43. OUTPUT VOLTAGE FROM EITHER RAIL vs DIE
TEMPERATURE FOR VARIOUS EFFECTIVE
FIGURE 44. OFF ISOLATION - EL5146 AND EL5246
R
LOAD
FN7177 Rev 2.00
March 31, 2011
Page 13 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Typical Performance Curves
2.0
2.5
2.0
1.5
1.0
0.5
0
PDIP-14, JA = 87°C/W
PDIP, JA = 110°C/W
1.6
PDIP-8, JA = 107°C/W
SOIC-14, JA = 120°C/W
SOIC, JA = 161°C/W
1.2
0.8
0.4
SOIC-8, JA = 159°C/W
MSOP-8,10, JA = 206°C/W
SOT23-5, JA = 256°C/W
0
-50
-20
10
40
70
-50
-20
10
40
70
100
100
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 45. MAXIMUM POWER DISSIPATION vs AMBIENT
TEMPERATURE SINGLES (T = +150°C)
FIGURE 46. MAXIMUM POWER DISSIPATION vs AMBIENT
TEMPERATURE DUALS (T
= +150°C)
JMAX
JMAX
2.5
2.0
1.5
1.0
0.5
0
PDIP-14, JA = 83°C/W
SOIC-14, JA = 118°C/W
QSOP-16, JA = 158°C/W
-50
-20
10
40
70
100
AMBIENT TEMPERATURE (°C)
FIGURE 47. MAXIMUM POWER DISSIPATION vs AMBIENT TEMPERATURE QUADS (T
JMAX
= +150°C)
FN7177 Rev 2.00
March 31, 2011
Page 14 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Pin Descriptions
EL5144 EL5146
5 Ld 8 Ld
EL5244
8 Ld SO/
EL5246 EL5246 EL5444 EL5444
10 Ld 14 Ld 14 Ld 16 Ld
SOT23 SO/PDIP PDIP/MSOP MSOP SO/PDIP SO/PDIP QSOP NAME
FUNCTION
EQUIVALENT CIRCUIT
5
2
7
4
8
4
8
3
11
4
4
4, 5
VS
Positive Power Supply
11
12, 13
GND Ground or Negative
Power Supply
3
3
IN+ Non-inverting Input
V
S
GND
Circuit 1
4
1
2
6
IN-
Inverting Input
(Reference Circuit 1)
OUT Amplifier Output
V
S
GND
Circuit 2
3
2
1
1
3
2
3
2
INA+ Amplifier A
Non-inverting Input
(Reference Circuit 1)
10
14
INA- Amplifier A Inverting (Reference Circuit 1)
Input
1
5
9
5
13
7
1
5
1
6
OUTA Amplifier A Output
(Reference Circuit 2)
(Reference Circuit 1)
INB+ Amplifier B
Non-inverting Input
6
7
6
7
8
9
6
7
INB- Amplifier B Inverting (Reference Circuit 1)
Input
7
8
OUTB Amplifier B Output
(Reference Circuit 2)
(Reference Circuit 1)
10
11
INC+ Amplifier C
Non-inverting Input
9
10
INC- Amplifier C Inverting (Reference Circuit 1)
Input
8
9
OUTC Amplifier C Output
(Reference Circuit 2)
(Reference Circuit 1)
12
14
IND+ Amplifier D
Non-inverting Input
13
14
15
16
IND- Amplifier D Inverting (Reference Circuit 1)
Input
OUTD Amplifier D Output
(Reference Circuit 2)
f
8
CE
Enable
(Enabled when high)
V
S
+
–
1.4V
GND
Circuit 3
FN7177 Rev 2.00
March 31, 2011
Page 15 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Pin Descriptions (Continued)
EL5144 EL5146
5 Ld 8 Ld
EL5244
8 Ld SO/
EL5246 EL5246 EL5444 EL5444
10 Ld 14 Ld 14 Ld 16 Ld
SOT23 SO/PDIP PDIP/MSOP MSOP SO/PDIP SO/PDIP QSOP NAME
FUNCTION
EQUIVALENT CIRCUIT
(Reference Circuit 3)
2
3
CEA Enable Amplifier A
(Enabled when high)
4
5
CEB Enable Amplifier B
(Enabled when high)
(Reference Circuit 3)
1, 5
2, 6,
10, 12
NC
No Connect.
Not internally
connected.
Input, Output and Supply Voltage Range
Description of Operation and Applications
Information
The EL5144 series has been designed to operate with a
single supply voltage of 5V. Split supplies can be used so
long as their total range is 5V.
Product Description
The EL5144 series is a family of wide bandwidth, single
supply, low power, rail-to-rail output, voltage feedback
operational amplifiers. The family includes single, dual, and
quad configurations. The singles and duals are available
with a power-down pin to reduce power to 2.6µA typically. All
the amplifiers are internally compensated for closed loop
feedback gains of +1 or greater. Larger gains are acceptable
but bandwidth will be reduced according to the familiar Gain
Bandwidth Product.
The amplifiers have an input common mode voltage range
that includes the negative supply (GND pin) and extends to
within 1.5V of the positive supply (V pin). They are
S
specified over this range.
The output of the EL5144 series amplifiers can swing rail to
rail. As the load resistance becomes lower in value, the
ability to drive close to each rail is reduced. However, even
with an effective 150 load resistor connected to a voltage
halfway between the supply rails, the output will swing to
within 150mV of either rail.
Connected in voltage follower mode and driving a high
impedance load, the EL5144 series has a -3dB bandwidth of
100MHz. Driving a 150 load, they have a -3dB bandwidth
of 60MHz while maintaining a 200V/µs slew rate. The input
common mode voltage range includes ground while the
output can swing rail-to-rail.
Figure 48 shows the output of the EL5144 series amplifier
swinging rail to rail with R = 1k, A = +2 and R = 1M.
F
V
L
Figure 49 is with R = 150
L
5V
0V
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high-frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended. Lead lengths
should be as short as possible. The power supply pin must
be well bypassed to reduce the risk of oscillation For normal
single supply operation, where the GND pin is connected to
the ground plane, a single 4.7µF tantalum capacitor in
FIGURE 48.
parallel with a 0.1µF ceramic capacitor from V to GND will
S
suffice. This same capacitor combination should be placed
at each supply pin to ground if split supplies are to be used.
In this case, the GND pin becomes the negative supply rail.
For good AC performance, parasitic capacitance should be
kept to a minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets, particularly for the SO package, should be
avoided if possible. Sockets add parasitic inductance and
capacitance that can result in compromised performance.
5V
0V
FIGURE 49.
FN7177 Rev 2.00
March 31, 2011
Page 16 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Choice of Feedback Resistor, R
However, this will obviously reduce the gain slightly. If your
F
gain is greater than 1, the gain resistor (R ) can then be
G
These amplifiers are optimized for applications that require a
gain of +1. Hence, no feedback resistor is required.
However, for gains greater than +1, the feedback resistor
forms a pole with the input capacitance. As this pole
becomes larger, phase margin is reduced. This causes
ringing in the time domain and peaking in the frequency
chosen to make up for any gain loss, which may be created
by this additional resistor at the output. Another method of
reducing peaking is to add a “snubber” circuit at the output.
A snubber is a resistor in a series with a capacitor, 150and
100pF being typical values. The advantage of a snubber is
that it does not draw DC load current.
domain. Therefore, R has some maximum value that
F
should not be exceeded for optimum performance. If a large
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, the back-termination series resistor will de-couple
the EL5144 series amplifier from the cable and allow extensive
capacitive drive. However, other applications may have high
capacitive loads without a back-termination resistor. Again, a
small series resistor at the output can reduce peaking.
value of R must be used, a small capacitor in the few
F
picofarad range in parallel with R can help to reduce this
F
ringing and peaking at the expense of reducing the
bandwidth.
As far as the output stage of the amplifier is concerned, R +
F
R
appear in parallel with R for gains other than +1. As this
G
L
combination gets smaller, the bandwidth falls off.
Disable/Power-Down
Consequently, R also has a minimum value that should not
F
The EL5146 and EL5246 amplifiers can be disabled, placing
its output in a high-impedance state. Turn-off time is only
10ns and turn-on time is around 500ns. When disabled, the
amplifier’s supply current is reduced to 2.6µA typically,
thereby effectively eliminating power consumption. The
amplifier’s power-down can be controlled by standard TTL or
CMOS signal levels at the CE pin. The applied logic signal is
relative to the GND pin. Letting the CE pin float will enable
the amplifier. Hence, the 8 Ld PDIP and 8 Ld SOIC single
amps are pin compatible with standard amplifiers that don’t
have a power-down feature.
be exceeded for optimum performance.
For A = +1, R = 0 is optimum. For A = -1 or +2 (noise
V
F
V
gain of 2), optimum response is obtained with R between
F
300 and 1k. For A = -4 or +5 (noise gain of 5), keep R
V
F
between 300 and 15k.
Video Performance
For good video signal integrity, an amplifier is required to
maintain the same output impedance and the same
frequency response as DC levels are changed at the output.
This can be difficult when driving a standard video load of
150, because of the change in output current with DC level.
A look at Figures 25 through 32 beginning on page 10
(Differential Gain and Differential Phase curves for various
supply and loading conditions) will help you obtain optimal
Short Circuit Current Limit
The EL5144 series amplifiers do not have internal short
circuit protection circuitry. Short circuit current of 90mA
sourcing and 65mA sinking typically will flow if the output is
trying to drive high or low but is shorted to half way between
the rails. If an output is shorted indefinitely, the power
dissipation could easily increase such that the part will be
destroyed. Maximum reliability is maintained if the output
current never exceeds 50mA. This limit is set by internal
metal interconnect limitations. Obviously, short circuit
conditions must not remain or the internal metal connections
will be destroyed.
performance. Curves are provided for A = +1 and +2, and
V
R = 150and 10k tied both to ground as well as 2.5V. As
L
with all video amplifiers, there is a common mode sweet spot
for optimum differential gain/differential phase. For example,
with A = +2 and R = 150 tied to 2.5V, and the output
V
L
common mode voltage kept between 0.8V and 3.2V, dG/dP
is a very low 0.1%/0.1°. This condition corresponds to
driving an AC-coupled, double terminated 75 coaxial cable.
With A = +1, R = 150 tied to ground, and the video level
V
L
Power Dissipation
kept between 0.85V and 2.95V, these amplifiers provide
dG/dP performance of 0.05%/0.20°. This condition is
representative of using the EL5144 series amplifier as a
buffer driving a DC coupled, double terminated, 75 coaxial
cable. Driving high impedance loads, such as signals on
computer video cards, gives similar or better dG/dP
performance as driving cables.
With the high output drive capability of the EL5144 series
amplifiers, it is possible to exceed the +150°C Absolute
Maximum junction temperature under certain load current
conditions. Therefore, it is important to calculate the maximum
junction temperature for the application to determine if load
conditions or package type need to be modified for the
amplifier to remain in the safe operating area.
Driving Cables and Capacitive Loads
The maximum power dissipation allowed in a package is
determined according to Equation 1:
The EL5144 series amplifiers can drive 50pF loads in
parallel with 150 with 4dB of peaking and 100pF with 7dB
of peaking. If less peaking is desired in these applications, a
small series resistor (usually between 5 and 50) can be
placed in series with the output to eliminate most peaking.
T
- T
AMAX
JMAX
(EQ. 1)
--------------------------------------------
PD
=
MAX
JA
FN7177 Rev 2.00
March 31, 2011
Page 17 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
where:
EL5144 Series Comparator Application
The EL5144 series amplifier can be used as a very fast,
single supply comparator. Most op amps used as a
comparator allow only slow speed operation because of
output saturation issues. The EL5144 series amplifier
doesn’t suffer from output saturation issues. Figure 50
shows the amplifier implemented as a comparator. Figure 51
is a graph of propagation delay vs overdrive as a square
wave is presented at the input of the comparator.
T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
T
AMAX
= Thermal resistance of the package
JA
PD
= Maximum power dissipation in the package
MAX
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or
as expressed in Equation 2:
+5V
1
2
3
4
8
7
6
5
EL5146
0.1µF
V
OUT
R
L
+
–
---------------
PD
= N V I
+ V - V
(EQ. 2)
-
+
V
IN
MAX
S
SMAX
S
OUT
V
+2.5V
OUT
R
L
where:
N = Number of amplifiers in the package
V = Total supply voltage
FIGURE 50. EL5146 AMPLIFIER IMPLEMENTED AS A
COMPARATOR
S
I
= Maximum supply current per amplifier
SMAX
1000
V
= Maximum output voltage of the application
OUT
R = Load resistance tied to ground
L
NEGATIVE GOING
If we set the two PD
equations equal to each other, we
can solve for R using Equation 3:
SIGNAL
MAX
100
L
V
V - V
OUT
OUT
S
---------------------------------------------------------------------------------------------
=
(EQ. 3)
R
L
POSITIVEGOING
SIGNAL
T
- T
JMAX
AMAX
--------------------------------------------
- V I
SMAX
S
N
JA
10
0.01
0.1
1.0
Assuming worst case conditions of T = +85C, V
OUT
= V /2V,
S
OVERDRIVE (V)
A
V = 5.5V, and I
of all packages and the minimum RL allowed.
= 8.8mA per amplifier, following is a table
FIGURE 51. PROPAGATION DELAY vs OVERDRIVE FOR
AMPLIFIER USED AS A COMPARATOR
S
SMAX
Multiplexing with the EL5144 Series Amplifier
PART
PACKAGE
SOT23-5
SOIC-8
MINIMUM R
L
Besides normal power-down usage, the CE pin on the
EL5146 and EL5246 series amplifiers also allow for
multiplexing applications. Figure 52 shows an EL5246 with
its outputs tied together, driving a back terminated 75 video
EL5144CW
EL5146CS
EL5146CN
EL5244CS
EL5244CN
EL5244CY
EL5246CY
EL5246CS
EL5246CN
EL5444CU
EL5444CS
EL5444CN
37
21
14
48
30
69
69
34
23
139
85
51
PDIP-8
load. A 3V
10MHz sine wave is applied at Amp A input,
5MHz square wave to Amp B. Figure 53
P-P
and a 2.4V
SOIC-8
P-P
PDIP-8
shows the SELECT signal that is applied, and the resulting
output waveform at V . Observe the break-before-make
OUT
operation of the multiplexing. Amp A is on and V
MSOP-8
MSOP-10
SOIC-14
PDIP-14
QSOP-16
SOIC-14
PDIP-14
is being
IN1
passed through to the output of the amplifier. Then Amp A
turns off in about 10ns. The output decays to ground with an
R C time constants. 500ns later, Amp B turns on and V
IN2
L
L
is passed through to the output. This break-before-make
operation ensures that more than one amplifier isn’t trying to
drive the bus at the same time. Notice the outputs are tied
directly together. Isolation resistors at each output are not
necessary.
FN7177 Rev 2.00
March 31, 2011
Page 18 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
V
3V
1
IN
1
2
3
4
5
6
7
14
13
12
11
10
9
5V
PP
V
-
OUT
+
V
OUT
EL5246
+5V
Sele
4.7µ 0.1µ
0V
5V
0V
+
-
Selec
150
V
2.4V
2
IN
8
PP
FIGURE 52.
FIGURE 53.
5V
470K
+5V
1
5
470K
V
OUT
0.1µ
R
C
OS
OS
2
3
4
470K
0V
FIGURE 54.
FIGURE 55.
5V
0V
FIGURE 56.
Free Running Oscillator Application
Figure 54 is an EL5144 configured as a free running oscillator.
To first order, R and C determine the frequency of
OSC OSC
oscillation according to:
0.72
---------------------------------------
=
F
(EQ. 4)
OSC
R
C
OSC
OSC
For rail to rail output swings, maximum frequency of oscillation
is around 15MHz. If reduced output swings are acceptable,
25MHz can be achieved. Figure 55 shows the oscillator for
R
= 510, C
OSC
= 240pF and F = 6MHz.
OSC
OSC
FN7177 Rev 2.00
March 31, 2011
Page 19 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
SOT-23 Package Family
MDP0038
SOT-23 PACKAGE FAMILY
e1
D
A
6
SYMBOL
SOT23-5
1.45
0.10
1.14
0.40
0.14
2.90
2.80
1.60
0.95
1.90
0.45
0.60
5
SOT23-6
1.45
0.10
1.14
0.40
0.14
2.90
2.80
1.60
0.95
1.90
0.45
0.60
6
TOLERANCE
MAX
4
N
A
A1
A2
b
±0.05
±0.15
E1
E
±0.05
2
3
c
±0.06
0.15
2X
C
D
D
Basic
1
2
3
0.20
2X
C
E
Basic
5
e
E1
e
Basic
Basic
0.20
C
A-B
D
M
B
b
NX
e1
L
Basic
±0.10
L1
N
Reference
Reference
Rev. E 3/00
0.15
2X
C
A-B
1
3
NOTES:
D
1. Plastic or metal protrusions of 0.25mm maximum per side are
not included.
C
A2
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
SEATING
PLANE
3. This dimension is measured at Datum Plane “H”.
A1
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.10
NX
C
5. Index area - Pin #1 I.D. will be located within the indicated zone
(SOT23-6 only).
6. SOT23-5 version has no center lead (shown as a dashed line).
(L1)
H
A
GAUGE
PLANE
0.25
c
+3°
-0°
L
0°
FN7177 Rev 2.00
March 31, 2011
Page 20 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M
C A B
e
H
C
A2
A1
GAUGE
PLANE
SEATING
PLANE
0.010
L
4° ±4°
0.004 C
b
0.010 M
C
A
B
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
SO24
(SOL-24)
SO28
(SOL-28)
SYMBOL
SO-8
0.068
0.006
0.057
0.017
0.009
0.193
0.236
0.154
0.050
0.025
0.041
0.013
8
SO-14
0.068
0.006
0.057
0.017
0.009
0.341
0.236
0.154
0.050
0.025
0.041
0.013
14
(SOL-20)
0.104
0.007
0.092
0.017
0.011
0.504
0.406
0.295
0.050
0.030
0.056
0.020
20
TOLERANCE
MAX
NOTES
A
A1
A2
b
0.068
0.006
0.057
0.017
0.009
0.390
0.236
0.154
0.050
0.025
0.041
0.013
16
0.104
0.007
0.092
0.017
0.011
0.406
0.406
0.295
0.050
0.030
0.056
0.020
16
0.104
0.007
0.092
0.017
0.011
0.606
0.406
0.295
0.050
0.030
0.056
0.020
24
0.104
0.007
0.092
0.017
0.011
0.704
0.406
0.295
0.050
0.030
0.056
0.020
28
-
0.003
0.002
0.003
0.001
0.004
0.008
0.004
Basic
-
-
-
c
-
D
1, 3
E
-
E1
e
2, 3
-
L
0.009
Basic
-
L1
h
-
Reference
Reference
-
N
-
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
FN7177 Rev 2.00
March 31, 2011
Page 21 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Plastic Dual-In-Line Packages (PDIP)
E
N
1
D
PIN #1
INDEX
A2
A
E1
SEATING
PLANE
L
c
A1
NOTE 5
2
N/2
eA
eB
e
b
b2
MDP0031
PLASTIC DUAL-IN-LINE PACKAGE
INCHES
SYMBOL
PDIP8
0.210
0.015
0.130
0.018
0.060
0.010
0.375
0.310
0.250
0.100
0.300
0.345
0.125
8
PDIP14
0.210
0.015
0.130
0.018
0.060
0.010
0.750
0.310
0.250
0.100
0.300
0.345
0.125
14
PDIP16
0.210
0.015
0.130
0.018
0.060
0.010
0.750
0.310
0.250
0.100
0.300
0.345
0.125
16
PDIP18
PDIP20
0.210
0.015
0.130
0.018
0.060
0.010
1.020
0.310
0.250
0.100
0.300
0.345
0.125
20
TOLERANCE
MAX
NOTES
A
A1
A2
b
0.210
0.015
0.130
0.018
0.060
0.010
0.890
0.310
0.250
0.100
0.300
0.345
0.125
18
MIN
±0.005
±0.002
b2
c
+0.010/-0.015
+0.004/-0.002
±0.010
D
1
2
E
+0.015/-0.010
±0.005
E1
e
Basic
eA
eB
L
Basic
±0.025
±0.010
N
Reference
Rev. C 2/07
NOTES:
1. Plastic or metal protrusions of 0.010” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions E and eA are measured with the leads constrained perpendicular to the seating plane.
4. Dimension eB is measured with the lead tips unconstrained.
5. 8 and 16 lead packages have half end-leads as shown.
FN7177 Rev 2.00
March 31, 2011
Page 22 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Mini SO Package Family (MSOP)
MDP0043
0.25 M C A B
A
MINI SO PACKAGE FAMILY
D
(N/2)+1
MILLIMETERS
N
SYMBOL
MSOP8
1.10
0.10
0.86
0.33
0.18
3.00
4.90
3.00
0.65
0.55
0.95
8
MSOP10
1.10
0.10
0.86
0.23
0.18
3.00
4.90
3.00
0.50
0.55
0.95
10
TOLERANCE
Max.
NOTES
A
A1
A2
b
-
±0.05
-
E
E1
PIN #1
I.D.
±0.09
-
+0.07/-0.08
±0.05
-
c
-
D
±0.10
1, 3
1
B
(N/2)
E
±0.15
-
E1
e
±0.10
2, 3
Basic
-
e
H
C
L
±0.15
-
SEATING
PLANE
L1
N
Basic
-
Reference
-
M
C A B
b
0.08
0.10 C
Rev. D 2/07
N LEADS
NOTES:
1. Plastic or metal protrusions of 0.15mm maximum per side are not
included.
L1
2. Plastic interlead protrusions of 0.25mm maximum per side are
not included.
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
c
SEE DETAIL "X"
A2
GAUGE
PLANE
0.25
L
DETAIL X
A1
3° ±3°
FN7177 Rev 2.00
March 31, 2011
Page 23 of 24
EL5144, EL5146, EL5244, EL5246, EL5444
Quarter Size Outline Plastic Packages Family (QSOP)
A
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
INCHES
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
A
A1
A2
b
0.068
0.006
0.056
0.010
0.008
0.193
0.236
0.154
0.025
0.025
0.041
16
0.068
0.006
0.056
0.010
0.008
0.341
0.236
0.154
0.025
0.025
0.041
24
0.068
0.006
0.056
0.010
0.008
0.390
0.236
0.154
0.025
0.025
0.041
28
Max.
±0.002
±0.004
±0.002
±0.001
±0.004
±0.008
±0.004
Basic
-
PIN #1
I.D. MARK
E
E1
-
-
-
1
(N/2)
c
-
B
D
1, 3
0.010 C A B
E
-
e
E1
e
2, 3
H
-
C
SEATING
L
±0.009
Basic
-
PLANE
L1
N
-
0.007 C A B
b
0.004 C
Reference
-
Rev. F 2/07
L1
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
A
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
c
SEE DETAIL "X"
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
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FN7177 Rev 2.00
March 31, 2011
Page 24 of 24
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