EL5126CU [RENESAS]
SPECIALTY ANALOG CIRCUIT, PQCC32, LPP-32;
| 型号： | EL5126CU |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | SPECIALTY ANALOG CIRCUIT, PQCC32, LPP-32 |
| 文件： | 总8页 (文件大小：225K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EL5126C
®
8-Channel TFT-LCD Reference Voltage Generator
PRELIMINARY
®
Features
General Description
• 8-channel reference outputs
• Accuracy of ±0.1%
The EL5126C is designed to produce the reference voltages required
in TFT-LCD applications. Each output is programmed to the required
voltage with 10 bits of resolution. Reference pins determine the high
and low voltages of the output range, which are capable of swinging to
either supply rail. Programming of each output is performed using the
serial interface.
• Supply voltage of 4.5V to 18V
• Digital supply 3.3V to 5V
• Low supply current of 10mA
• Rail-to-rail capability
• I2C control interface
A number of the EL5126C can be stacked for applications requiring
more than 8 outputs. The reference inputs can be tied to the rails,
enabling each part to output the full voltage range, or alternatively,
they can be connected to external resistors to split the output range and
enable finer resolutions of the outputs.
Applications
• TFT-LCD drive circuits
• Reference voltage generators
The EL5126C has 8 outputs and is available in a 32-pin LPP package.
It is specified for operation over the full -40°C to +85°C temperature
range.
Ordering Information
Part No
Package
Tape & Reel
Outline #
EL5126CU
32-Pin LPP
MDP0046
Connection Diagram
VS
VSD
VS
1
2
3
4
5
6
7
8
9
25 OUTA
24 OUTB
23 OUTC
22 OUTD
21 DGND
20 OUTE
19 OUTF
18 OUTG
17 OUTH
REFH
REFL
AGND
CAP
NC
Thermal Pad
VS
32-Pin LPP Top View
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-ELANTEC or 408-945-1323 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Elantec ® is a registered trademark of Elantec Semiconductor, Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
EL5126C
8-Channel TFT-LCD Reference Voltage Generator
PRELIMINARY
Absolute Maximum Ratings (T = 25°C)
A
Values beyond absolute maximum ratings can cause the device to be per-
manently damaged. Absolute maximum ratings are stress ratings only
and functional device operation is not implied.
Maximum Die Temperature
+125°C
-65°C to +150°C
-40°C to +85°C
260°C
Storage Temperature
Operating Temperature
Lead Temperature
Power Dissipation
ESD Voltage
Supply Voltage between VS and GND
Supply Voltage between VSD and GND
Maximum Continuous Output Current
+18V
VS and +7V (min)
30mA
See Curves
2kV
Important Note:
All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified
temperature and are pulsed tests, therefore: T = T = T
J
C
A
Electrical Characteristics
V
= 10V, V = 5V, V
= 8V, V
= 2V, R = 1.5kΩ and C = 200pF to 0V, T = 25°C unless otherwise specified.
S
SD
REFH
REFL
L
L
A
Parameter
Description
Condition
Min
Typ
Max
Unit
Supply
IS
Supply Current
No load
7.6
9
mA
mA
ISD
Digital Supply Current
0.17
0.35
Analog
VOL
VOH
ISC
Output Swing Low
Output Swing High
Short Circuit Current
Power Supply Rejection Ratio
Program to Out Delay
Accuracy
Sinking 5mA
Sourcing 5mA
RL = 10Ω
50
9.95
180
68
4
150
mV
V
9.85
100
45
mA
PSRR
tD
VS+ is moved from 14V to 16V
dB
ms
VAC
VDROOP
RINH
REG
Digital
VIH
20
1
mV
Droop Voltage
FCLOCK = 25kHz
2
mV/ms
kΩ
Input Resistance @ VREFH, VREFL
Load Regulation
32
0.5
I
OUT = 5mA step
1.5
mV/mA
Logic 1 Input Voltage
Logic 0 Input Voltage
Clock Frequency
SDIN Input Resistance
Setup Time
VSD-20%
V
V
VIL
20%*VSD
400
FCLK
RSDIN
tS
kHz
GΩ
ns
1
40
40
20
20
tH
Hold Time
ns
tR
Rise Time
ns
tF
Fall Time
ns
2
EL5126C
8-Channel TFT-LCD Reference Voltage Generator
PRELIMINARY
Pin Descriptions
Pin Number
Pin Name
Pin Type
Power
Pin Description
Positive power supply for analog circuits
Positive power supply for digital circuits
High reference voltage
1, 3, 9
VS
VSD
2
Power
4
REFH
REFL
GND
Analog Input
Analog Input
Power
5
Low reference voltage
6, 21, 11, 13
Ground
7
CAP
Analog
Decoupling capacitor for internal reference generator
8, 12, 14, 15, 16, 26
NC
10
17
18
19
20
22
23
24
25
27
28
29
30
31
32
A0
Logic Input
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Analog Output
Logic Input
Development I2C address input, bit 0
OUTH
OUTG
OUTF
OUTE
OUTD
OUTC
OUTB
OUTA
FILTER
STD/REG
SCL
Channel H programmable output voltage
Channel G programmable output voltage
Channel F programmable output voltage
Channel E programmable output voltage
Channel D programmable output voltage
Channel C programmable output voltage
Channel B programmable output voltage
Channel A programmable output voltage
Activates internal I2C data filter, high = enable, low = disable
Selects mode, high = standard, low = register mode
I2C clock
Logic Input
Logic Input
SDA
Logic Input
I2C data input
OSC
IP/OP
Oscillator pin for synchronizing multiple chips
Selects internal/external OSC source, high = external, low = internal
OSC_SEL
Logic Input
General Description
The EL5126C provides a versatile method of providing
the reference voltages that are used in setting the transfer
characteristics of LCD display panels.
As all of the output buffers are identical, it is also possi-
ble to use the EL5126C for applications other than LCDs
where 8 voltage references are required that can be set to
a 10 bit accuracy.
The V/T (Voltage/Transmission) curve of the LCD
panel requires that a correction is applied to make it lin-
ear; however, if the panel is to be used in more than one
application, the final curve may differ for different
applications.
Program Control
The following timing diagrams show the sequence of
bytes on the I2C interface. Refer to the I2C timing dia-
grams for details. Two addresses are available:
By using the EL5126C, this curve can be changed to
optimize its characteristics according to the required
application of the display product.
H74 - When A0 is tied low.
H75 - When A0 is tied high.
Each of the reference voltage outputs can be set with a
10 bit resolution. These outputs are available to within
100mV of the power rails of the EL5126C.
3
EL5126C
8-Channel TFT-LCD Reference Voltage Generator
PRELIMINARY
2
I C Timing Diagram 1
= don’t care
4
EL5126C
8-Channel TFT-LCD Reference Voltage Generator
PRELIMINARY
2
I C Timing Diagram 2
Start Condition
t
t
Stop Condition
R
F
DATA
CLOCK
t
t
t
t
F
S
H
R
t
S
t
H
2
Start, stop & timing details of I C interface
Internal Refresh Clock Oscillator
Reference High and Reference Low Inputs
The EL5126C requires a clock internally for its correct
operation. This is provided for by an internal oscillator
running at approximately 25kHz. This clock may be
input or output via the clock pin labeled OSC. In a mul-
tiple chip system, one chip may be programmed to use
the internal oscillator; then the OSC pin will output the
clock from the internal oscillator. Subsequent chips may
have the OSC pin connected to this clock source, in
these chips the programming will set this pin to be an
input. See the control bits logic table and serial program-
ming example for details. The Application Drawing 1
shows this configuration in use.
The output voltages from the EL5126C will be derived
from the reference voltages present at the VREFH and
VREFL pins. The input impedance of these pins remains
constant.
At a channel data setting of 0, the channel output voltage
will be equal to the VREFL pin.
Generally, VOUT = VREFL + d / 1024 * (VREFH
-
VREFL), where d is the decimal value of the data pro-
grammed into the channel.
In some LCD applications that require more than 8 chan-
nels, the system can be designed such that one EL5126C
will provide the Gamma correction voltages that are
more positive than the VCOM potential. The second
EL5126C can provide the Gamma correction voltages
more negative than the VCOM potential.
After power on, the chip will start with the internal oscil-
lator active. At this time the OSC pin will be in a high
impedance condition to prevent contention.
This OSC pin may also be supplied by an external clock
from the application circuit to ensure all functions are
synchronized together. Application drawing 1 shows the
LCD H rate signal used, here the positive clock edge is
timed to avoid the transient load of the column driver
circuits.
The Application Drawing 1 shows a system connected in
this way.
Care should be taken that the system design holds these
reference voltages within the limits of the power rails of
the EL5126C. i.e. GND < REFH, REFL < VS.
5
EL5126C
8-Channel TFT-LCD Reference Voltage Generator
PRELIMINARY
Block Diagram
Reference High
Out
Out
Out
Out
Out
Out
Out
Out
Eight
Channel
Memory
Voltage
Sources
Reference Low
Reference Decouple
2
I C Data In
Control IF
2
I C Clock In
Filter
Std/Reg
A0
Oscillator
Select
Oscillator
Input/Output
scenario this will be 320µs, when the data has just
missed the cycle.
Channel Outputs
Each of the channel outputs has a rail-to-rail buffer. This
enables all channels to have the capability to drive to
within 100mV of the power rails, (see Electrical Charac-
teristics for details).
When a large change in output voltage is required, the
change will occur in 2V steps, thus the requisite number
of timing cycles will be added to the overall update time.
This means that a large change of 16V can take between
2.56ms and 3ms depending on the absolute timing rela-
tive to the update cycle.
When driving large capacitive loads, a series resistor
should be placed in series with the output. (Usually
between 5Ω and 50Ω).
Application Using the EL5126C
Each of the channels is updated on a continuous cycle,
the time for the new data to appear at a specific output
will depend on the exact timing relationship of the
incoming data to this cycle.
In the first application drawing, the schematic shows the
interconnect of a pair of EL5126C chips connected to
give 8 gamma corrected voltages above the VCOM volt-
age, and 8 gamma corrected voltages below the VCOM
voltage.
The best-case scenario is when the data has just been
captured and then passed on to the output stage immedi-
ately; this can be as short as 40µs. In the worst-case
6
EL5126C
8-Channel TFT-LCD Reference Voltage Generator
PRELIMINARY
Application Drawing
High Reference
Voltage
+10V
REFH
VS
OUTA
OUTB
OUTC
OUTD
OUTE
OUTF
Column (source)
Driver
1nF
1nF
+12V
+5V
LCD Panel
VSD
Microcontroller
1nF
FILTER
AO
2
I C Data In
SDA
address = H74
2
I C Clock
SCL
OSC
OSC_SEL
CAP
LCD
Timing
Controller
Horizontal Rate
+5V
1nF
OUT
REFL
STD
GND
OUTH
EL5126C
Middle Reference Voltage
+5.5V
REFH
OSC
OSC_SEL
VS
OUTA
OUTB
OUTC
OUTD
OUTE
OUTF
+5V
+12V
1nF
+5V
VSD
1nF
FILTER
AO
SDA
2
I C Data In
2
I C Clock
address = H75
SCL
CAP
0.1nF
1nF
Low Reference
Voltage
+1V
REFL
OUT
STD
GND
OUTH
EL5126C
7
EL5126C
8-Channel TFT-LCD Reference Voltage Generator
PRELIMINARY
Effective May 15, 2002, Elantec, a leader in high performance analog products, is now a part of Intersil Corporation.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications
at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by
Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any
infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any
patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
®
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8
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