ACS541D/SAMPLE [RENESAS]

AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, SIDE BRAZED, CERAMIC, DIP-20;
ACS541D/SAMPLE
型号: ACS541D/SAMPLE
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, SIDE BRAZED, CERAMIC, DIP-20

驱动 CD 输出元件 逻辑集成电路
文件: 总3页 (文件大小:235K)
中文:  中文翻译
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ACS541MS  
Radiation Hardened Octal Buffer/  
Line Driver Three-State  
January 1996  
Features  
Pinouts  
20 LEAD CERAMIC DUAL-IN-LINE  
MIL-STD-1835 DESIGNATOR,  
CDIP2-T20, LEAD FINISH C  
TOP VIEW  
• Devices QML Qualified in Accordance with MIL-PRF-38535  
• Detailed Electrical and Screening Requirements are Contained in  
SMD# 5962-96710 and Intersil’s QM Plan  
• 1.25 Micron Radiation Hardened SOS CMOS  
1
2
3
4
5
6
7
8
9
VCC  
OE2  
OE1  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
20  
19  
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)  
• Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day  
(Typ)  
18 Y0  
17 Y1  
16 Y2  
15 Y3  
14 Y4  
13 Y5  
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg  
• Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse  
• Dose Rate Survivability. . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse  
• Latch-Up Free Under Any Conditions  
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC  
• Significant Power Reduction Compared to ALSTTL Logic  
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V  
• Input Logic Levels  
12  
Y6  
GND 10  
11 Y7  
- VIL = 30% of VCC Max  
- VIH = 70% of VCC Min  
20 LEAD CERAMIC FLATPACK  
MIL-STD-1835 DESIGNATOR,  
CDFP4-F20, LEAD FINISH C  
TOP VIEW  
• Input Current 1µA at VOL, VOH  
• Fast Propagation Delay . . . . . . . . . . . . . . . . 17ns (Max), 12ns (Typ)  
VCC  
OE2  
Y0  
OE1  
A0  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Description  
The Intersil ACS541MS is a Radiation Hardened Octal Buffer/Line  
Driver, with three-state outputs. The output enable pins OE1, OE2 con-  
trol the Three-State outputs. If either enable is high the output will be in a  
high impedance state. For data output both enables must be low.  
A1  
Y1  
A2  
A3  
Y2  
A4  
Y3  
The ACS541MS utilizes advanced CMOS/SOS technology to achieve  
high-speed operation. This device is a member of a radiation hardened,  
high-speed, CMOS/SOS Logic family.  
A5  
Y4  
A6  
Y5  
A7  
Y6  
Y7  
The ACS541MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or a  
Ceramic Dual-In-Line package (D suffix).  
GND  
Ordering Information  
PART NUMBER  
5962F9671001VRC  
5962F9671001VXC  
ACS541D/Sample  
ACS541K/Sample  
ACS541HMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
PACKAGE  
o
o
-55 C to +125 C  
MIL-PRF-38535 Class V  
20 Lead SBDIP  
o
o
-55 C to +125 C  
MIL-PRF-38535 Class V  
20 Lead Ceramic Flatpack  
20 Lead SBDIP  
o
25 C  
Sample  
Sample  
Die  
o
25 C  
20 Lead Ceramic Flatpack  
Die  
o
25 C  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518856  
File Number 4085  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
1
ACS541MS  
Functional Diagram  
VCC  
2
3
4
5
18  
17  
16  
15  
A0  
A1  
A2  
A3  
Y0  
Y1  
Y2  
Y3  
1
OE1  
GND  
VCC  
19  
OE2  
GND  
VCC  
GND  
VCC  
GND  
VCC  
6
7
14  
13  
A4  
A5  
Y4  
Y5  
GND  
VCC  
GND  
VCC  
8
9
12  
11  
A6  
A7  
Y6  
Y7  
GND  
VCC  
GND VCC  
10  
20  
GND  
TRUTH TABLE  
INPUTS  
OUTPUTS  
OE1  
L
OE2  
L
An  
H
L
Yn  
H
L
L
L
H
X
X
Z
X
H
X
Z
NOTE: L = Low Logic Level, H = High Logic Level, Z = High Impedance  
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate  
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which  
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com  
Spec Number 518856  
2
ACS541MS  
Die Characteristics  
DIE DIMENSIONS:  
102 mils x 102 mils  
2,600mm x 2,600mm  
METALLIZATION:  
Type: AlSi  
Metal 1 Thickness: 7.125kÅ ±1.125kÅ  
Metal 2 Thickness: 9kÅ ±1kÅ  
GLASSIVATION:  
Type: SiO2  
Thickness: 8kÅ ±1kÅ  
WORST CASE CURRENT DENSITY:  
<2.0 x 105 A/cm2  
BOND PAD SIZE:  
> 4.3 mils x 4.3 mils  
> 110µm x 110µm  
Metallization Mask Layout  
ACS541MS  
(17) Y1  
A2 (4)  
A3 (5)  
NC  
(16) Y2  
NC  
NC  
NC  
(15) Y3  
A4 (6)  
A5 (7)  
(14) Y4  
Spec Number 518856  
3

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