ACS04D/SAMPLE-03 [RENESAS]
AC SERIES, HEX 1-INPUT INVERT GATE, CDIP14;
| 型号： | ACS04D/SAMPLE-03 |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | AC SERIES, HEX 1-INPUT INVERT GATE, CDIP14 CD 输入元件 逻辑集成电路 |
| 文件： | 总2页 (文件大小：49K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ACS04MS
Data Sheet
November 1998
File Number 4541
Radiation Hardened Hex Inverter
Features
The Radiation Hardened ACS04MS is a Hex Inverter. This
device simply inverts the level present on each input. All
inputs are buffered and the outputs are designed for
balanced propagation delay and transition times.
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25 Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-Up Free Under Any Conditions
The ACS04MS is fabricated on a CMOS Silicon on Sapphire
(SOS) process, which provides an immunity to Single Event
Latch-up and the capability of highly reliable performance in
any radiation environment. These devices offer significant
power reduction and faster performance when compared to
ALSTTL types.
5
- Total Dose. . . . . . . . . . . . . . . . . . . . . . 3 x 10 RAD(Si)
-10
- SEU Immunity. . . . . . . . . . . . <1 x 10
Errors/Bit/Day
2
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm )
• Input Logic Levels. . . . V = (0.3)(V ), V = (0.7)(V
IL CC IH
)
CC
• Output Current . . . . . . . . . . . . . . . . . . . . . . . . ±8mA (Min)
• Quiescent Supply Current . . . . . . . . . . . . . . 100µA (Max)
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . .15ns (Max)
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS04MS are
contained in SMD 5962-98603. A “hot-link” is provided
on our homepage with instructions for downloading.
www.intersil.com/data/sm/index.asp
Applications
• High Speed Control Circuits
• Sensor Monitoring
• Low Power Designs
Ordering Information
o
ORDERING NUMBER
5962F9860301VCC
ACS04D/SAMPLE-03
5962F9860301VXC
ACS04K/SAMPLE-03
5962F9860301V9A
INTERNAL MKT. NUMBER
TEMP. RANGE ( C)
PACKAGE
14 Ld SBDIP
DESIGNATOR
CDIP2-T14
ACS04DMSR-03
-55 to 125
ACS04D/SAMPLE-03
ACS04KMSR-03
25
-55 to 125
25
14 Ld SBDIP
14 Ld Flatpack
14 Ld Flatpack
Die
CDIP2-T14
CDFP4-F14
CDFP4-F14
N/A
ACS04K/SAMPLE-03
ACS04HMSR-03
25
Pinouts
ACS04MS
(SBDIP)
TOP VIEW
ACS04MS
(FLATPACK)
TOP VIEW
A1
Y1
1
2
3
4
5
6
7
14 V
CC
A1
Y1
1
2
3
4
5
6
7
14
13
12
11
10
9
V
CC
13 A6
12 Y6
11 A5
10 Y5
A6
Y6
A5
Y5
A4
Y4
A2
A2
Y2
Y2
A3
A3
Y3
Y3
9
8
A4
Y4
GND
8
GND
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
ACS04MS
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
Size: 2390µm x 2390µm (94 mils x 94 mils)
Thickness: 525µm ±25µm (20.6 mils ±1 mil)
Bond Pad: 110µm x 110µm (4.3 x 4.3 mils)
Type: Phosphorous Silicon Glass (PSG)
Thickness: 1.30µm ±0.15µm
SPECIAL INSTRUCTIONS:
METALLIZATION: AI
Bond V
First
ADDITIONAL INFORMATION:
CC
Metal 1 Thickness: 0.7µm ±0.1µm
Metal 2 Thickness: 1.0µm ±0.1µm
5
2
Worst Case Current Density: <2.0 x 10 A/cm
Transistor Count: 82
SUBSTRATE POTENTIAL:
Unbiased Insulator
Metallization Mask Layout
ACS04MS
Y1
(2)
A1
(1)
V
A6
(13)
CC
(14)
A2 (3)
(12) Y6
(11) A5
NC
Y2 (4)
NC
A3 (5)
(10) Y5
(6)
Y3
(7)
GND
(8)
Y4
(9)
A4
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out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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2
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