5962R9574401TRX [RENESAS]

HCT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20;
5962R9574401TRX
型号: 5962R9574401TRX
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

HCT SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, CDIP20

驱动 CD 输出元件 逻辑集成电路
文件: 总3页 (文件大小:105K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HCTS244T  
Data Sheet  
July 1999  
File Number 4618.1  
Radiation Hardened Octal Buffer/Line  
Driver, Three-State  
Features  
• QML Class T, Per MIL-PRF-38535  
Intersil‘s Satellite Applications FlowTM (SAF) devices are  
fully tested and guaranteed to 100kRAD total dose. These  
QML Class T devices are processed to a standard flow  
intended to meet the cost and shorter lead-time needs of  
large volume satellite manufacturers, while maintaining a  
high level of reliability.  
• Radiation Performance  
5
- Gamma Dose (γ) 1 x 10 RAD(Si)  
- Latch-Up Free Under Any Conditions  
2
- SEP Effective LET No Upsets: >100 MEV-cm /mg  
-9  
- Single Event Upset (SEU) Immunity < 2 x 10  
Errors/Bit-Day (Typ)  
The Intersil HCTS244T is a Radiation Hardened Non-  
Inverting Octal Buffer/Line Driver, Three-State, with two  
active-low output enables.  
• 3 Micron Radiation Hardened CMOS SOS  
• Fanout (Over Temperature Range)  
- Bus Driver Outputs - 15 LSTTL Loads  
Specifications  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
• LSTTL Input Compatibility  
Specifications for Rad Hard QML devices are controlled by  
the Defense Supply Center in Columbus (DSCC). The SMD  
numbers listed below must be used when ordering.  
- V = 0.8V Max  
IL  
Detailed Electrical Specifications for the HCTS244T are  
contained in SMD 5962-95744. A “hot-link” is provided from  
our website for downloading.  
- VI = V  
Min  
H
CC/2  
• Input Current Levels Ii 5mA at V , V  
OL OH  
www.intersil.com/spacedefense/newsafclasst.asp  
Pinouts  
Intersil‘s Quality Management Plan (QM Plan), listing all  
Class T screening operations, is also available on our  
website.  
HCTS244DTR (SBDIP), CDIP2-T20  
TOP VIEW  
www.intersil.com/quality/manuals.asp  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
V
OE  
A0  
1
1
2
1
2
1
2
1
2
CC  
2
1
2
1
2
1
2
OE  
Y0  
A3  
Y1  
A2  
Y2  
A1  
3
Y3  
Ordering Information  
4
A1  
TEMP.  
5
Y2  
ORDERING  
NUMBER  
PART  
NUMBER  
RANGE  
o
6
A2  
( C)  
7
Y1  
5962R9574401TRC  
5962R9574401TXC  
HCTS244DTR  
HCTS244KTR  
-55 to 125  
-55 to 125  
8
A3  
9
Y0  
1
2
Y3  
A0  
10  
GND  
NOTE: Minimum order quantity for -T is 150 units through  
distribution, or 450 units direct.  
HCTS244KTR (FLATPACK), CDFP4-F20  
TOP VIEW  
V
OE  
A0  
1
1
2
1
2
1
2
1
2
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
CC  
2
1
2
1
2
1
2
OE  
Y0  
A3  
Y1  
A2  
Y2  
A1  
Y3  
A1  
Y2  
A2  
Y1  
A3  
Y0  
1
2
Y3  
A0  
GND  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
1
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.  
HCTS244T  
Functional Diagram  
1Y0  
18  
1Y1  
16  
1Y2  
14  
1Y3  
12  
2Y0  
9
2Y1  
2Y2  
5
2Y3  
3
7
N
P
N
P
N
P
N
P
P
N
P
N
P
N
P
N
19  
2OE  
1
1OE  
2
1A0  
4
1A1  
6
1A2  
8
1A3  
11  
2A0  
13  
2A1  
15  
2A2  
17  
2A3  
TRUTH TABLE  
INPUTS  
OUTPUT  
1OE, 2OE  
A
L
Y
L
L
L
H
X
H
Z
H
H = High Voltage Level.  
L = Low Voltage Level.  
X = Immaterial.  
Z = High Impedance.  
2
HCTS244T  
Die Characteristics  
DIE DIMENSIONS:  
PASSIVATION:  
Type: Silox (S O )  
(2743µm x 2692µm x 533µm ±51µm)  
108 x 106 x 21mils ±2mil  
i
2
Thickness: 13.0kÅ ±2.6kÅ  
METALLIZATION:  
Type: Al Si  
WORST CASE CURRENT DENSITY:  
2
< 2.0e5 A/cm  
Thickness: 11.0kÅ ±1kÅ  
TRANSISTOR COUNT:  
SUBSTRATE POTENTIAL:  
264  
Unbiased Silicon on Sapphire  
PROCESS:  
BACKSIDE FINISH:  
CMOS SOS  
Sapphire  
Metallization Mask Layout  
HCTS244T  
2Y3  
(3)  
1A0  
(2)  
1OE  
(1)  
V
2OE  
(19)  
CC  
(20)  
(18) 1Y0  
(17) 2A3  
1A1 (4)  
2Y2 (5)  
(16) 1Y1  
(15) 2A2  
1A2 (6)  
2Y1 (7)  
(14) 1Y2  
(8)  
(9)  
(10)  
GND  
(11)  
2A0  
(12)  
1Y3  
(13)  
2A1  
1A3  
2Y0  
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location. The mask  
series for the HCTS244 is TA14402A.  
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.  
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-  
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com  
3

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