2SK1859-E [RENESAS]

Silicon N Channel MOS FET; 硅N沟道MOS FET
2SK1859-E
型号: 2SK1859-E
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

Silicon N Channel MOS FET
硅N沟道MOS FET

晶体 晶体管 功率场效应晶体管 开关 脉冲 局域网
文件: 总7页 (文件大小:82K)
中文:  中文翻译
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2SK1859  
Silicon N Channel MOS FET  
REJ03G0981-0200  
(Previous: ADE-208-1328)  
Rev.2.00  
Sep 07, 2005  
Application  
High speed power switching  
Features  
Low on-resistance  
High speed switching  
Low drive current  
No secondary breakdown  
Suitable for switching regulator  
Outline  
RENESAS Package code: PRSS0003ZA-A  
(Package name: TO-3PFM)  
D
1. Gate  
G
2. Drain  
3. Source  
S
1
2
3
Rev.2.00 Sep 07, 2005 page 1 of 6  
2SK1859  
Absolute Maximum Ratings  
(Ta = 25°C)  
Unit  
Item  
Drain to source voltage  
Gate to source voltage  
Drain current  
Symbol  
VDSS  
VGSS  
ID  
Ratings  
900  
V
V
±30  
6
A
*1  
Drain peak current  
ID(pulse)  
15  
A
Body to drain diode reverse drain current  
Channel dissipation  
IDR  
Pch*2  
Tch  
6
60  
A
W
°C  
°C  
Channel temperature  
150  
Storage temperature  
Tstg  
–55 to +150  
Notes: 1. PW 10 µs, duty cycle 1 %  
2. Value at Tc = 25°C  
Electrical Characteristics  
(Ta = 25°C)  
Item  
Symbol  
Min  
900  
±30  
Typ  
Max  
Unit  
V
Test conditions  
ID = 10 mA, VGS = 0  
IG = ±100 µA, VDS = 0  
VGS = ±25 V, VDS = 0  
VDS = 720 V, VGS = 0  
ID = 1 mA, VDS = 10 V  
ID = 3 A, VGS = 10 V*3  
Drain to source breakdown voltage  
Gate to source breakdown voltage  
Gate to source leak current  
Zero gate voltage drain current  
Gate to source cutoff voltage  
V(BR)DSS  
V(BR)GSS  
IGSS  
V
±10  
250  
3.0  
3.0  
µA  
µA  
V
IDSS  
VGS(off)  
RDS(on)  
2.0  
Static drain to source on state  
resistance  
2.0  
Forward transfer admittance  
Input capacitance  
|yfs|  
Ciss  
Coss  
Crss  
td(on)  
tr  
2.3  
3.7  
980  
400  
195  
20  
S
ID = 3 A, VDS = 20 V*3  
pF  
pF  
pF  
ns  
ns  
ns  
ns  
V
VDS = 10 V, VGS = 0,  
f = 1 MHz  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
ID = 3 A, VGS = 10 V,  
RL = 10 Ω  
80  
Turn-off delay time  
Fall time  
td(off)  
tf  
125  
100  
0.9  
Body to drain diode forward voltage  
VDF  
trr  
IF = 6 A, VGS = 0  
Body to drain diode reverse  
recovery time  
1000  
ns  
IF = 6 A, VGS = 0,  
diF/dt = 100 A/µs  
Note: 3. Pulse Test  
Rev.2.00 Sep 07, 2005 page 2 of 6  
2SK1859  
Main Characteristics  
Power vs. Temperature Derating  
Maximum Safe Operation Area  
90  
50  
30  
10  
60  
30  
3
1
0.3  
0.1  
Ta = 25°C  
0.05  
0
50  
100  
150  
1
3
10  
30  
100 300 1000  
Case Temperature TC (°C)  
Drain to Source Voltage VDS (V)  
Typical Output Characteristics  
10 V  
6 V  
Typical Transfer Characteristics  
10  
8
5
4
3
2
1
VDS = 20 V  
Pulse Test  
Pulse Test  
5.5 V  
6
5 V  
4
75  
°
°
C
C
4.5 V  
Ta = 25  
2
–25  
6
°C  
VGS = 4 V  
0
10  
20  
30  
40  
50  
0
2
4
8
10  
Drain to Source Voltage VDS (V)  
Gate to Source Voltage VGS (V)  
Drain to Source Saturation Voltage  
vs. Gate to Source Voltage  
Static Drain to Source on State  
Resistance vs. Drain Current  
20  
16  
12  
8
50  
Pulse Test  
ID = 5 A  
Pulse Test  
20  
10  
5
VGS = 10 V  
15 V  
2
1
2 A  
1 A  
4
0.5  
0
4
8
12  
16  
20  
0.2  
0.5  
1
2
5
10  
20  
Gate to Source Voltage VGS (V)  
Drain Current ID (A)  
Rev.2.00 Sep 07, 2005 page 3 of 6  
2SK1859  
Static Drain to Source on State  
Resistance vs. Temperature  
Forward Transfer Admittance  
vs. Drain Current  
10  
8
10  
5
VGS = 10 V  
Pulse Test  
–25°C  
TC = 25°C  
75°C  
2
1
6
2 A  
ID = 5 A  
4
0.5  
1 A  
2
VDS = 20 V  
Pulse Test  
0.2  
0.1  
0
–40  
0
40  
80  
120  
160  
0.05 0.1 0.2  
0.5  
1
2
5
Case Temperature TC (°C)  
Drain Current ID (A)  
Body to Drain Diode Reverse  
Recovery Time  
Typical Capacitance vs.  
Drain to Source Voltage  
10,000  
1,000  
100  
5,000  
VGS = 0  
f = 1 MHz  
di/dt = 100 A/µs, Ta = 25°C  
VGS = 0  
Pulse Test  
2,000  
1,000  
500  
Ciss  
Coss  
Crss  
200  
100  
50  
10  
0
10  
20  
30  
40  
50  
0.1 0.2  
0.5  
1
2
5
10  
Reverse Drain Current IDR (A)  
Drain to Source Voltage VDS (V)  
Dynamic Input Characteristics  
Switching Characteristics  
1,000  
800  
600  
400  
200  
20  
16  
12  
8
500  
.
VGS = 10 V, VDD =. 30 V  
PW = 2 µs, duty < 1%  
td (off)  
VDD = 250 V  
400 V  
600 V  
200  
100  
50  
tf  
tr  
VDS  
VGS  
td (on)  
20  
10  
5
ID = 6 A  
600 V  
400 V  
4
VDD = 250 V  
0
0
20  
40  
60  
80  
100  
0.1 0.2  
0.5  
1
2
5
10  
Drain Current ID (A)  
Gate Charge Qg (nc)  
Rev.2.00 Sep 07, 2005 page 4 of 6  
2SK1859  
Reverse Drain Current vs.  
Source to Drain Voltage  
10  
8
Pulse Test  
6
4
2
5 V, 10 V  
VGS = 0, –5 V  
0
0.4  
0.8  
1.2  
1.6  
2.0  
Source to Drain Voltage VSD (V)  
Normalized Transient Thermal Impedance vs. Pulse Width  
3
1
D = 1  
0.5  
0.3  
0.1  
0.2  
0.1  
θch – c(t) = γs(t) • θch – c  
θch – c = 2.08°C/W, Tc = 25°C  
PDM  
0.05  
0.02  
PW  
D =  
0.03  
0.01  
PW  
T
T
10 µ  
100 µ  
1 m  
10 m  
100 m  
1
10  
Pulse Width PW (S)  
Waveforms  
Switching Time Test Circuit  
Vin Monitor  
90%  
Vout Monitor  
Vin  
D.U.T  
10%  
10%  
RL  
10%  
Vout  
50  
VDD  
= 30 V  
Vin  
10 V  
90%  
tr  
90%  
td (off)  
td (on)  
tf  
Rev.2.00 Sep 07, 2005 page 5 of 6  
2SK1859  
Package Dimensions  
JEITA Package Code  
SC-93  
RENESAS Code  
PRSS0003ZA-A  
Package Name  
MASS[Typ.]  
5.2g  
TO-3PFM / TO-3PFMV  
Unit: mm  
5.5 0.3  
15.6 0.3  
+ 0.4  
– 0.2  
φ3.2  
3.2 0.3  
4.0 0.3  
2.6  
1.6  
0.86  
0.86  
+ 0.2  
– 0.1  
+ 0.2  
0.9  
– 0.1  
0.66  
5.45 0.5  
5.45 0.5  
Ordering Information  
Part Name  
Quantity  
Shipping Container  
2SK1859-E  
360 pcs  
Box (Tube)  
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of  
production before ordering the product.  
Rev.2.00 Sep 07, 2005 page 6 of 6  
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan  
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Refer to "http://www.renesas.com/en/network" for the latest and detailed information.  
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