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2SK1318

更新时间：2024-09-18 08:04:14
品牌：RENESAS
描述：Silicon N Channel MOS FET High Speed Power Switching

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2SK1318 概述

Silicon N Channel MOS FET High Speed Power Switching 硅N沟道MOS FET高速电源开关 功率场效应晶体管

2SK1318 规格参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Obsolete零件包装代码：TO-220AB
包装说明：FLANGE MOUNT, R-PSFM-T3针数：3
Reach Compliance Code：compliantECCN代码：EAR99
风险等级：5.37Is Samacsys：N
外壳连接：ISOLATED配置：SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：120 V最大漏极电流 (Abs) (ID)：20 A
最大漏极电流 (ID)：20 A最大漏源导通电阻：0.16 Ω
FET 技术：METAL-OXIDE SEMICONDUCTORJEDEC-95代码：TO-220AB
JESD-30 代码：R-PSFM-T3JESD-609代码：e0
元件数量：1端子数量：3
工作模式：ENHANCEMENT MODE最高工作温度：150 °C
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：FLANGE MOUNT峰值回流温度（摄氏度）：NOT SPECIFIED
极性/信道类型：N-CHANNEL最大功率耗散 (Abs)：350 W
最大脉冲漏极电流 (IDM)：80 A认证状态：Not Qualified
子类别：FET General Purpose Power表面贴装：NO
端子面层：TIN LEAD端子形式：THROUGH-HOLE
端子位置：SINGLE处于峰值回流温度下的最长时间：NOT SPECIFIED
晶体管应用：SWITCHING晶体管元件材料：SILICON
Base Number Matches：1

2SK1318 数据手册

通过下载2SK1318数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。

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2SK1318  
Silicon N Channel MOS FET  
High Speed Power Switching  
REJ03G0930-0200  
(Previous: ADE-208-1269)  
Rev.2.00  
Sep 07, 2005  
Features  
•
•
•
•
•
Low on-resistance  
High speed switching  
Low drive current  
4 V gate drive device can be driven from 5 V source  
Suitable for motor drive, DC-DC converter, power switch and solenoid drive  
Outline  
RENESAS Package code: PRSS0003AD-A  
(Package name: TO-220FM)  
D
G
1. Gate  
2. Drain  
3. Source  
1
2
3
S
Rev.2.00 Sep 07, 2005 page 1 of 6  
2SK1318  
Absolute Maximum Ratings  
(Ta = 25°C)  
Unit  
Item  
Drain to source voltage  
Gate to source voltage  
Drain current  
Symbol  
VDSS  
VGSS  
ID  
Ratings  
120  
V
V
±20  
20  
A
*1  
Drain peak current  
ID (peak)  
80  
20  
A
Body to drain diode reverse drain current  
Channel dissipation  
IDR  
Pch*2  
Tch  
A
35  
W
°C  
°C  
Channel temperature  
150  
Storage temperature  
Tstg  
–55 to +150  
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%  
2. Value at Tc = 25°C  
Electrical Characteristics  
(Ta = 25°C)  
Item  
Symbol  
Min  
Typ  
—
Max  
Unit  
V
Test Conditions  
ID = 10 mA, VGS = 0  
Drain to source breakdown voltage  
Gate to source breakdown voltage  
Gate to source leak current  
Zero gate voltage drain current  
Gate to source cutoff voltage  
V(BR)DSS  
V(BR)GSS  
IGSS  
120  
±20  
—
—
—
—
V
IG = ±100 µA, VDS = 0  
VGS = ±16 V, VDS = 0  
VDS = 100 V, VGS = 0  
ID = 1 mA, VDS = 10 V  
ID = 10 A, VGS = 10 V*3  
ID = 10 A, VGS = 4 V*3  
ID = 10 A, VDS = 10 V*3  
—
±10  
250  
2.0  
0.12  
0.16  
—
µA  
µA  
V
IDSS  
—
—
VGS(off)  
RDS(on)  
1.0  
—
—
Static drain to source on state  
resistance  
0.095  
0.11  
17  
Ω
—
Ω
Forward transfer admittance  
Input capacitance  
|yfs|  
Ciss  
Coss  
Crss  
td (on)  
tr  
10  
—
S
1300  
430  
60  
—
pF  
pF  
pF  
ns  
ns  
ns  
ns  
V
VDS = 10 V, VGS = 0,  
f = 1 MHz  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
—
—
—
—
—
14  
—
ID = 10 A, VGS = 10 V,  
RL = 3 Ω  
—
70  
—
Turn-off delay time  
Fall time  
td (off)  
tf  
—
210  
90  
—
—
—
Body to drain diode forward voltage  
VDF  
trr  
—
1.4  
280  
—
IF = 20 A, VGS = 0  
Body to drain diode reverse recovery  
time  
—
—
ns  
IF = 20 A, VGS = 0,  
diF / dt = 50 A / µs  
Note: 3. Pulse test  
Rev.2.00 Sep 07, 2005 page 2 of 6  
2SK1318  
Main Characteristics  
Power vs. Temperature Derating  
Maximum Safe Operation Area  
60  
40  
20  
100  
30  
10  
3
Operation in this Area  
Limited by RDS (on)  
1
0.3  
0.1  
Ta = 25°C  
0
50  
100  
150  
1
3
10  
30  
100 300 1,000  
Case Temperature TC (°C)  
Drain to Source Voltage VDS (V)  
Typical Output Characteristics  
Typical Transfer Characteristics  
20  
16  
12  
8
20  
16  
12  
8
10 V  
4 V  
3 V  
VDS = 10 V  
Pulse Test  
Pulse Test  
2.5 V  
TC = 25°C  
4
4
75°C  
VGS = 2.0 V  
–25°C  
0
2
4
6
8
10  
0
1
2
3
4
5
Drain to Source Voltage VDS (V)  
Gate to Source Voltage VGS (V)  
Drain to Source Saturation Voltage  
vs. Gate to Source Voltage  
Static Drain to Source on State  
Resistance vs. Drain Current  
1
5
4
3
2
1
Pulse Test  
0.5  
Pulse Test  
VGS = 4 V  
0.2  
0.1  
ID = 20 A  
10 V  
0.05  
10 A  
5 A  
0.02  
0.01  
0
4
8
12  
16  
20  
0.5  
1
2
5
10  
20  
50  
Gate to Source Voltage VGS (V)  
Drain Current ID (A)  
Rev.2.00 Sep 07, 2005 page 3 of 6  
2SK1318  
Static Drain to Source on State  
Resistance vs. Temperature  
Forward Transfer Admittance  
vs. Drain Current  
0.25  
0.2  
100  
50  
ID = 20 A  
VDS = 10 V  
Pulse Test  
Pulse Test  
10 A  
25°C  
5 A  
20  
Tc = –25°C  
0.15  
0.1  
VGS = 4 V  
75°C  
10  
5
10 A  
5 A  
VGS = 10 V  
0.05  
0
2
1
0.5  
1
2
5
10  
20  
50  
–40  
0
40  
80  
120  
160  
Case Temperature TC (°C)  
Drain Current ID (A)  
Body to Drain Diode Reverse  
Recovery Time  
Typical Capacitance vs.  
Drain to Source Voltage  
10,000  
1,000  
100  
500  
200  
100  
50  
Ciss  
Coss  
20  
10  
5
di/dt = 50 A/µs  
VGS = 0, Ta = 25°C  
Pulse Test  
Crss  
VGS = 0  
f = 1 MHz  
10  
0
10  
20  
30  
40  
50  
0.2  
0.5  
1
2
5
10 20  
Reverse Drain Current IDR (A)  
Drain to Source Voltage VDS (V)  
Dynamic Input Characteristics  
VDD = 100 V  
Switching Characteristics  
20  
16  
12  
8
200  
160  
120  
80  
500  
200  
td (off)  
50 V  
25 V  
VGS = 10 V, PW = 2 µs  
.
<
duty 1%, V  
=.  
30 V  
=
DD  
100  
50  
VGS  
VDS  
tf  
tr  
20  
td (on)  
40  
4
VDD = 100 V  
50 V  
25 V  
ID = 20 A  
10  
5
0
0
20  
40  
60  
80  
100  
0.2  
0.5  
1
2
5
10 20  
Gate Charge Qg (nc)  
Drain Current ID (A)  
Rev.2.00 Sep 07, 2005 page 4 of 6  
2SK1318  
Reverse Drain Current vs.  
Source to Drain Voltage  
20  
16  
12  
8
Pulse Test  
VGS = 10 V  
15 V  
VGS = 0, –5 V  
4
0
0.5  
1
1.5  
2
2.5  
Source to Drain Voltage VSD (V)  
Normalized Transient Thermal Impedance vs. Pulse Width  
3
TC = 25°C  
D = 1  
0.5  
1.0  
0.3  
0.1  
0.2  
0.1  
θch–c (t) = γS (t) • θch–c  
θch–c = 3.57°C/W, TC = 25°C  
PDM  
PW  
D =  
0.03  
0.01  
T
PW  
T
10 µ  
100 µ  
1 m  
10 m  
100 m  
1
10  
Pulse Width PW (S)  
Switching Time Test Circuit  
Vin Monitor  
Waveforms  
90%  
Vout Monitor  
Vin  
10%  
10%  
D.U.T  
RL  
10%  
Vout  
50 Ω  
VDD  
= 30 V  
90%  
tr  
90%  
td (off)  
Vin  
10 V  
td (on)  
tf  
Rev.2.00 Sep 07, 2005 page 5 of 6  
2SK1318  
Package Dimensions  
JEITA Package Code  
SC-67  
RENESAS Code  
Package Name  
MASS[Typ.]  
1.8g  
Unit: mm  
PRSS0003AD-A  
TO-220FM / TO-220FMV  
10.0 0.3  
7.0 0.3  
2.8 0.2  
2.5 0.2  
φ 3.2 0.2  
1.2 0.2  
1.4 0.2  
4.45 0.3  
2.5  
0.7 0.1  
2.54 0.5  
2.54 0.5  
0.5 0.1  
Ordering Information  
Part Name  
Quantity  
Shipping Container  
2SK1318-E  
500 pcs  
Box (Sack)  
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of  
production before ordering the product.  
Rev.2.00 Sep 07, 2005 page 6 of 6  
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan  
Keep safety first in your circuit designs!  
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble  
may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.  
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary  
circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.  
Notes regarding these materials  
1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's  
application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party.  
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data,  
diagrams, charts, programs, algorithms, or circuit application examples contained in these materials.  
3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of  
publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is  
therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product  
information before purchasing a product listed herein.  
The information described here may contain technical inaccuracies or typographical errors.  
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.  
Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor  
home page (http://www.renesas.com).  
4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to  
evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes  
no responsibility for any damage, liability or other loss resulting from the information contained herein.  
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life  
is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a  
product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater  
use.  
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials.  
7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and  
cannot be imported into a country other than the approved destination.  
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.  
8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.  
RENESAS SALES OFFICES  
http://www.renesas.com  
Refer to "http://www.renesas.com/en/network" for the latest and detailed information.  
Renesas Technology America, Inc.  
450 Holger Way, San Jose, CA 95134-1368, U.S.A  
Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501  
Renesas Technology Europe Limited  
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.  
Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900  
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7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong  
Tel: <852> 2265-6688, Fax: <852> 2730-6071  
Renesas Technology Taiwan Co., Ltd.  
10th Floor, No.99, Fushing North Road, Taipei, Taiwan  
Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999  
Renesas Technology (Shanghai) Co., Ltd.  
Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China  
Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952  
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1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632  
Tel: <65> 6213-0200, Fax: <65> 6278-8001  
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Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea  
Tel: <82> 2-796-3115, Fax: <82> 2-796-2145  
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Tel: <603> 7955-9390, Fax: <603> 7955-9510  
© 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.  
Colophon .3.0  

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