CLDPLASI-150.000 [RALTRON]
LVDS Output Clock Oscillator, 150MHz Min, 700MHz Max, 150MHz Nom;型号: | CLDPLASI-150.000 |
厂家: | Raltron Electronics Corporation |
描述: | LVDS Output Clock Oscillator, 150MHz Min, 700MHz Max, 150MHz Nom |
文件: | 总3页 (文件大小:54K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
CLOCK
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CLDL/CLDPL SERIES: ULTRA HF CLOCK OSCILLATOR, LVDS, +3.3 VDC or +2.5VDC
DESCRIPTION: A crystal controlled, high frequency, highly stable oscillator, adhering to Low Voltage Differential Signaling
(LVDS) Standards. The output can be Tri-stated to facilitate testing or combined multiple clocks. The device is contained in a
sub-miniature, very low profile, leadless ceramic SMD package with 6 gold contact pads. This miniature oscillator is ideal for
today's automated assembly environments.
APPLICATIONS AND FEATURES:
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Infiniband; Fiber Channel; SATA; 10GbE; Network Processors; SOHO Routing; Switches;
Common Frequencies: 150 MHz; 156.25 MHz; 155.52 MHz; 161.1328 MHz; 212.5MHz; 312.5MHz
+3.3 VDC or +2.5VDC LVDS
Frequency Range from 150.000 to 320 MHz
Analog multiplication
Miniature Ceramic SMD Package Available on Tape and Reel
Lead Free and ROHS Compliant
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ABSOLUTE MAXIMUM RATINGS:
PARAMETER
SYMBOL
VALUE
UNIT
Operating temperature range Ta
-40…+85
-55…+90
°C
Storage temperature range
Supply voltage
T(stg)
°C
Vcc
Vi
+4.6
VDC
VDC
VDC
Maximum Input Voltage
Maximum Output Voltage
Vss-0.5…Vcc+0.5
Vss-0.5…Vcc+0.5
Vo
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ELECTRICAL PARAMETERS:
PARAMETER
SYMBOL
TEST CONDITIONS*1
VALUE
UNIT
Nominal Frequency
Supply Voltage
Supply Current
Output Logic Type
Load
fo
150.000 ~ 320.00**
+3.3 or +2.5 ±5%
80.0 MAX
MHz
VDC
mA
Vcc
Is
LVDS
Connected between Out and Complementary Out
100
Ω
Voh
Vol
Vod
Output logic high
Output logic low
Differential output
Differential output error
Offset Voltage
1.43 Typ, 1.6 Max
0.9 Min, 1.10 Typ
247 Min, 330 Typ, 454 Max
50 Max
1.125 Min, 1.25 Typ, 1.375 Max
25 Max
VDC
VDC
mV
mV
VDC
mVDC
Output Voltage Levels
VOS
OS
Offset error
Duty Cycle
DC
Measured at 50% of Vcc
40/60 to 60/40 or 45/55 to 55/45
0.7 TYP 1.0 MAX*2
0.3 TYP**
%
ns
ps
Rise / Fall Time
tr / tf
Measured at 20/80% and 80/20% Vcc Levels
Integrated Phase tji RMS, Fj = 12 kHz…20 MHz5
Integrated Phase RMS tii offset frequency 50KHz to
0.5 TYP**
1 TYP **
ps
ps
ps
ps
80MHz5
Deterministic period Jitter Dj using wavecrest
Jitter
analyzer 4
J
Random period Jitter Rj using wavecrest analyzer 4
2.5 TYP **
25 TYP**
Acumm. Peak to Peak Jitter Tp-p using wavecrest
analyzer*4
∆f=10 Hz
∆f=100 Hz
-65
-95
-125
-140
-145
-148
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
∆f=1 KHz
typ. @212.5MHz6
Phase Noise
£(∆f)
∆f=10 KHz
∆f=100 KHz
∆f>1M Hz
2X Multip.
4X Multip.
-50
-35
Sub Harmonics
f_sub
Load, nom, Supply nom
dBc
∆f/fc
±20, ±25, ±50, or ±100 MAX*3
Overall Frequency Stability
Op. Temp., Aging, Load, Supply and Cal. Variations
ppm
Pin 1
Output Enabled
Output Disabled
En
Dis
High Voltage or No Connect
Ground
0.7•Vcc MIN
0.3•Vcc MAX
VDC
VDC
RALTRON ELECTRONICS CORP. ꢀ10651 N.W . 19t h St ꢀMiami, Florida 33172 ꢀU.S.A.
phone: (305) 593-6033 ꢀfax: (305) 594-3973 ꢀe-mail: sales@raltron.com ꢀWEB: http://www.raltron.com
CLOCK
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*1 Test Conditions Unless Stated Otherwise: Nominal Vcc, Nominal Load, +25 ±3°C
*2 Frequency Dependent
*3 Not All Stabilities Available With All Temperature Ranges—Please Consult Factory For Availability
*4 Measured with Wavecrest SIA-3000A 1,000,000 Hits no filtering
*5 Calculated from Agilent 5500 phase noise measurements
*6 Measured with Agilent 5500
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PART NUMBERING SYSTEM:
FREQUENCY
STABILITY
(Overall)
TEMPERATURE
RANGE (°C)
FREQUENCY
(MHz)
SERIES
SYMMETRY
CLDL: UHF +3.3Vdc Clock with LVDS Comp. Output
CLDPL: UHF +2.5Vdc Clock with LVDS Comp. Output
A: 40/60 to 60/40%
T: 45/55 to 55/45% S: 0…+70
U: -20…+70
R: 0…+50
150.000…320.000
K: ±20 ppm**
I: ±25 ppm**
H: ±50 ppm
J: ±100 ppm
V: -40…+85**
EXAMPLE: CLDLASH-155.520
Clock Oscillator, 7x5mm Package, +3.3 VDC Supply Voltage, LVDS Output, Standard Symmetry, 0…+70°C Operating
Temperature Range, ±50 ppm Total Frequency Stability, 155.520 MHz
**Above 300MHz extended temp range and ±25ppm stability may not be available, jitter may vary upon spec requirements.
Please consult the factory for any custom requirements.
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MECHANICAL PARAMETERS:
OUTLINE TOLERANCE:
±0.006” / 0.15mm
INDICATES PIN 1.
(Unless otherwise specified)
PIN FUNCTIONS:
[1] ENABLE/ DISABLE
[2] NO CONNECT
[3] CASE GROUND
[4] OUTPUT
.276 ±.008
7.0 ±0.2
.079 MAX.
2.00 MAX.
[5] COMP. OUTPUT
[6] SUPPLY VOLTAGE
MARKING:
CLDLASH
155.52
.200
5.08
.100
2.54
.079 TYP.
2.00 TYP.
RAL D/C
1
2
3
4
.087
2.20
*0.01µF external by-pass
filter is recommended as seen on solder
pattern.
6
5
.055
1.40
TYP.
.071
1.80
.100
2.54
SOLDER PATTERN
RALTRON ELECTRONICS CORP. ꢀ10651 N.W . 19t h St ꢀMiami, Florida 33172 ꢀU.S.A.
phone: (305) 593-6033 ꢀfax: (305) 594-3973 ꢀe-mail: sales@raltron.com ꢀWEB: http://www.raltron.com
CLOCK
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REFLOW PROFILE:
**ROHS COMPLIANT**
RALTRON ELECTRONICS CORP. ꢀ10651 N.W . 19t h St ꢀMiami, Florida 33172 ꢀU.S.A.
phone: (305) 593-6033 ꢀfax: (305) 594-3973 ꢀe-mail: sales@raltron.com ꢀWEB: http://www.raltron.com
相关型号:
CLDPLASI-FREQ
LVDS Output Clock Oscillator, 150MHz Min, 320MHz Max, LEAD FREE, MINIATURE, CERAMIC, SMD, 6 PIN
RALTRON
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