P4C1682-12PC [PYRAMID]
Standard SRAM, 4KX4, 12ns, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24;
| 型号： | P4C1682-12PC |
| 厂家： | 
PYRAMID SEMICONDUCTOR CORPORATION |
| 描述： | Standard SRAM, 4KX4, 12ns, CMOS, PDIP24, 0.300 INCH, PLASTIC, DIP-24 静态存储器 光电二极管 内存集成电路 |
| 文件： | 总10页 (文件大小：121K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
P4C1681, P4C1682
ULTRA HIGH SPEED 4K x 4
STATIC CMOS RAMS
FEATURES
Fully TTL Compatible Inputs and Outputs
Full CMOS, 6T Cell
StandardPinout(JEDECApproved)
– 24-Pin 300 mil DIP
– 24-Pin 300 mil SOIC
– 24-Pin 300 mil SOJ
– 24-Pin Solder Seal Flat Pack
– 28-Pin LCC (450 mil x 450 mil)
High Speed (Equal Access and Cycle Times)
– 12/15/20/25 ns (Commercial)
–20/25/35ns(Military)
Low Power Operation
Single 5V ± 10%Power Supply
Separate Inputs and Outputs
– P4C1681 Input Data at Outputs during Write
– P4C1682 Outputs in High Z during Write
DESCRIPTION
Access times as fast as 12 nanoseconds are available,
permitting greatly enhanced system operating speeds.
The P4C1681 and P4C1682are16,384-bit(4Kx4)ultra
high speed static RAMs similar to theP4C168,but with
separate data I/O pins. The P4C1681 features a
transparent write operation; the outputs of the P4C1682
are in high impedance during the write cycle. All devices
have low power standby modes. The RAMs operate
from a single 5V ± 10% tolerance power supply.
.
CMOS is used to reduce power consumption.
TheP4C1681andP4C1682areavailablein24-pin300mil
DIP, SOIC, SolderSealFlatpack, andSOJpackages, as
well as a 28-pin LCC package, providing excellent board
leveldensities.
FUNCTIONALBLOCKDIAGRAM
PINCONFIGURATIONS
LCC (L5-1)
DIP (P4,C4), SOIC (S4), SOJ (J4)
SOLDER SEAL FLAT PACK (FS-1)
Do c um e nt # SRAM109 REV B
Re vise d No ve m b e r 2005
1
P4C1681, P4C1682
MAXIMUM RATINGS1
Symbol
Parameter
Value
Unit
Symbol
Parameter
Value
Unit
VCC
Power Supply Pin with
Respect to GND
–0.5 to +7
V
TBIAS
Temperature Under
Bias
–55 to +125
°C
Terminal Voltage with
Respect to GND
(up to 7.0V)
–0.5 to
VCC +0.5
TSTG
PT
Storage Temperature
Power Dissipation
DC Output Current
–65 to +150
°C
W
VTERM
TA
V
1.0
50
IOUT
mA
Operating Temperature –55 to +125 °C
CAPACITANCES(4)
RECOMMENDED OPERATING
VCC = 5.0V, TA = 25°C, f = 1.0MHz
TEMPERATURE AND SUPPLY VOLTAGE
Ambient
Symbol
Parameter
Conditions Typ. Unit
VCC
Grade(2)
GND
Temperature
–55°C to +125°C
0°C to +70°C
CIN
VIN = 0V
OUT = 0V
pF
pF
Military
5.0V ± 10%
5.0V ± 10%
0V
0V
Input Capacitance
Output Capacitance
5
7
Commercial
COUT
V
DC ELECTRICAL CHARACTERISTICS
Over Recommended operating temperature and supply voltages(2)
P4C1681
P4C1682
Sym.
Parameter
Test Conditions
Unit
Min
Max
CC +0.5
0.8
Input High Voltage
V
V
VIH
VIL
2.2
Input Low Voltage
–0.5(3)
V
V
V
V
V
CMOS Input High Voltage
CMOS Input Low Voltage
Input Clamp Diode Voltage
VCC –0.2 VCC +0.5
VHC
VLC
–0.5(3)
0.2
–1.2
0.4
VCD
VOL
VCC = Min., IIN = –18 mA
IOL = +8 mA, VCC = Min.
Output Low Voltage
(TTL Load)
VOLC Output Low Voltage
(CMOS Load)
I
OLC = +100 µA, VCC = Min.
V
V
V
0.2
VOH
Output High Voltage
(TTL Load)
IOH = –4 mA, VCC = Min.
2.4
VOHC
IOHC = –100 µA, VCC = Min.
VCC –0.2
Output High Voltage
(CMOS Load)
VCC = Max.
VIN = GND to VCC
Mil.
Comm'l
ILI
Input Leakage Current
+10
+5
–10
–5
µA
µA
VCC = Max.
CE = VIH
Mil.
Comm'l
–10
–5
ILO
Output Leakage Current
+10
+5
µA
µA
VOUT = GND to VCC
Notes:
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with VIL and IIL not more negative than –3.0V and
–100mA, respectively, are permissible for pulse widths up to 20ns.
4. This parameter is sampled and not 100% tested.
1. Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAXIMUM rating conditions for extended
periods may affect reliability.
Do c um e nt # SRAM109 REV B
Pa g e 2 o f 10
P4C1681, P4C1682
POWERDISSIPATIONCHARACTERISTICS
Over recommended operating temperature and supply voltage(2)
P4C1681
P4C1682
Symbol
Parameter
Test Conditions
Unit
Min
Max
ICC
Dynamic Operating
Current – 12, 15
VCC = Max., f = Max.,
Outputs Open
Comm'l
—
130
mA
ICC
ISB
DynamicOperating
Current – 20, 25, 35
VCC = Max., f = Max.,
Outputs Open
Mil.
Comm'l
—
—
130
100
mA
mA
Standby Power Supply
Current (TTL Input Levels) VCC = Max.,
CE ≥ VIH,
—
—
35
15
mA
mA
f = Max., Outputs Open
ISB1
Standby Power Supply
Current
CE≥ VHC,
VCC = Max.,
(CMOS Input Levels)
f = 0, Outputs Open,
VIN ≤ VLC or VIN ≥ VHC
Do c um e nt # SRAM109 REV B
Pa g e 3 o f 10
P4C1681, P4C1682
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
-12
-15
-20
-25
-35
Symbol
Parameter
Unit
Min Max Min Max Min Max Min Max Min Max
tRC
tAA
ReadCycleTime
12
15
20
25
35
ns
ns
Address Access
Time
12
12
15
15
20
20
25
25
35
35
tAC
ChipEnable
Access Time
ns
ns
ns
ns
ns
ns
ns
tOH
tLZ
OutputHoldfrom
AddressChange
2
2
2
2
3
3
3
3
3
3
Chip Enable to
Output in Low Z
tHZ
tRCS
tRCH
tPU
Chip Disable to
Output in High Z
6
7
9
10
15
ReadCommand
SetupTime
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ReadCommand
HoldTime
Chip Enable to
PowerUpTime
tPD
Chip Disable to
12
15
20
25
25
ns
PowerDownTime
1
READ CYCLE NO. 1 (ADDRESS controlled)(5, 6)
READ CYCLE NO. 2 (CE controlled)(5, 7)
Notes:
8. Transition is measured ±200mV from steady state voltage prior to
change, with loading as specified in Figure 1.
9. Read Cycle Time is measured from the last valid address to the first
transitioning address.
5. WE is HIGH for READ cycle.
6. CE is LOW for READ cycle.
7. ADDRESS must be valid prior to, or coincident with, CE
transition LOW.
Do c um e nt # SRAM109 REV B
Pa g e 4 o f 10
P4C1681, P4C1682
AC ELECTRICAL CHARACTERISTICS—WRITE CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
-12
-15
-20
-25
-35
Symbol
Parameter
Unit
Min Max Min Max Min Max Min Max Min Max
tWC
tCW
Write Cycle Time
12
12
15
15
18
18
20
20
30
25
ns
ns
Chip Enable Time
to End of Write
tAW
tAS
Address Valid to
End of Write
12
0
15
0
18
0
20
0
25
0
ns
ns
Address Set-up
Time
tWP
tAH
Write Pulse Width
12
0
15
0
18
0
20
0
25
0
ns
ns
Address Hold
Time
tDW
Data Valid to
End of Write
7
0
8
0
10
0
10
0
15
0
ns
tDH
tWZ
Data Hold Time
ns
ns
Write Enable to
4
5
7
7
13
Output in High Z†
tOW
Output Active to
End of Write
0
0
0
0
0
ns
ns
ns
tAWE
tADV
Write Enable to
Data-out Valid£
12
12
15
15
20
20
25
25
30
30
Data-in Valid to
Data-out Valid
† P4C1682 only.
£ P4C1681 only.
WRITE CYCLE NO. 1 (WE controlled)(10)
Notes:
12.Write Cycle Time is measured from the last valid address to the
first transitioning address.
10.CE and WE must be LOW for WRITE cycle.
11.If CE goes HIGH simultaneously with WE HIGH, the output
remains in a high impedance state.
Do c um e nt # SRAM109 REV B
Pa g e 5 o f 10
P4C1681, P4C1682
ORDERING INFORMATION
SELECTION GUIDE
The P4C1681 and P4C1682 are available in the following temperature, speed and package options.
Speed
Temperature
Range
Package
Plastic DIP
12
-12PC
-12SC
-12JC
N/A
15
-15PC
-15SC
-15JC
N/A
20
25
35
N/A
-20PC
-25PC
Commercial
Temperature
Plastic SOIC
Plastic SOJ
-20SC
-25SC
N/A
-20JC
-25JC
N/A
Side Brazed DIP
Solder Seal Flatpack
LCC
-20CM
-20FSM
-20LM
-25CM
-25FSM
-25LM
-35CM
-35FSM
-35LM
-35CMB
-35FSMB
-35LMB
Military
Temperature
N/A
N/A
N/A
N/A
Side Brazed DIP
Solder Seal Flatpack
LCC
N/A
N/A
-20CMB
-20FSMB
-20LMB
-25CMB
-25FSMB
-25LMB
Military
Processed*
N/A
N/A
N/A
N/A
* Military temperature range with MIL-STD-883, Class B processing in accordance with current revision..
N/A = Not available
Do c um e nt # SRAM109 REV B
Pa g e 6 o f 10
P4C1681, P4C1682
SIDE BRAZED DUAL IN-LINE PACKAGE
Pkg #
C4
# Pins
24 (300 mil)
Symbol
Min
-
0.014
0.045
0.008
-
Max
A
b
b2
C
D
E
0.200
0.026
0.065
0.018
1.280
0.310
0.220
eA
e
0.300 BSC
0.100 BSC
L
0.125
0.200
Q
S1
S2
0.015
0.005
0.005
0.060
-
-
SOLDER SEAL FLAT PACK
Pkg #
FS-1
# Pins
24
Symbol
Min
0.045
0.015
0.015
0.004
0.004
-
0.350
-
0.180
0.030
Max
0.115
0.022
0.019
0.009
0.006
0.640
0.420
0.450
-
A
b
b1
c
c1
D
E
E1
E2
E3
e
-
0.050 BSC
k
L
Q
S1
M
N
0.008
0.015
0.370
0.045
-
0.250
0.026
0.000
-
0.0015
24
Do c um e nt # SRAM109 REV B
Pa g e 7 o f 10
P4C1681, P4C1682
SOJ SMALL OUTLINE IC PACKAGE
Pkg #
J4
# Pins
24 (300 mil)
Symbol
Min
Max
0.148
-
0.020
0.010
0.630
A
A1
b
C
D
0.128
0.082
0.016
0.007
0.620
e
E
E1
E2
Q
0.050 BSC
0.335 BSC
0.292 0.300
0.267 BSC
0.025
-
SQUARE LEADLESS CHIP CARRIER
Pkg #
# Pins
Symbol
A
L5-1
28
Min
Max
0.060
0.050
0.022
0.442
0.075
0.065
0.028
0.460
A1
B1
D/E
D1/E1
D2/E2
D3/E3
e
0.300 BSC
0.150 BSC
-
0.460
0.050 BSC
0.040 REF
0.020 REF
h
j
L
L1
L2
0.045
0.045
0.075
0.055
0.055
0.095
ND
NE
7
7
Do c um e nt # SRAM109 REV B
Pa g e 8 o f 10
P4C1681, P4C1682
PLASTIC DUAL IN-LINE PACKAGE
Pkg #
P4
# Pins
24 (300 Mil)
Symbol
Min
-
Max
0.210
-
0.022
0.070
0.014
1.280
0.280
0.325
A
A1
b
b2
C
D
E1
E
0.015
0.014
0.045
0.008
1.230
0.240
0.300
e
0.100 BSC
eB
L
α
-
0.430
0.150
15°
0.115
0°
SOIC/SOP SMALL OUTLINE IC PACKAGE
Pkg #
S4
# Pins
24 (300 Mil)
Symbol
Min
Max
A
A1
b2
C
D
e
0.093
0.004
0.013
0.009
0.598
0.104
0.012
0.020
0.012
0.614
0.050 BSC
E
H
h
L
α
0.291
0.394
0.010
0.016
0°
0.299
0.419
0.029
0.050
8°
Do c um e nt # SRAM109 REV B
Pa g e 9 o f 10
P4C1681, P4C1682
REVISIONS
DOCUMENTNUMBER:
DOCUMENTTITLE:
SRAM109
P4C1681 / P4C1682 ULTRA HIGH SPEED 4K x 4 STATIC CMOS RAMS
ORIG. OF
CHANGE
ISSUE
DATE
REV.
DESCRIPTIONOFCHANGE
OR
1997
DAB
NewDataSheet
A
B
Oct-05
JDB
JDB
Change logo to Pyramid
11/16/05
ChangedreferencetoMIL-STD-883onpage6toreflectcurrentrevision.
Do c um e nt # SRAM109 REV B
Pa g e 10 o f 10
相关型号：
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P4C1682-20CMB
Standard SRAM, 4KX4, 20ns, CMOS, CDIP24, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-24
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