P4C164-10JI [PYRAMID]
Standard SRAM, 8KX8, 10ns, CMOS, PDSO28, 0.300 INCH, SOJ-28;
| 型号： | P4C164-10JI |
| 厂家： | 
PYRAMID SEMICONDUCTOR CORPORATION |
| 描述： | Standard SRAM, 8KX8, 10ns, CMOS, PDSO28, 0.300 INCH, SOJ-28 静态存储器 光电二极管 内存集成电路 |
| 文件： | 总8页 (文件大小：80K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
P4C164/P4C164L
ULTRA HIGH SPEED 8K x 8
STATIC CMOS RAMS
FEATURES
Full CMOS, 6T Cell
Output Enable and Dual Chip Enable Control
Functions
High Speed (Equal Access and Cycle Times)
– 8/10/12/15/20/25 ns (Commercial)
– 10/12/15/20/25/35 (Industrial)
Single 5V±10% Power Supply
Data Retention with 2.0V Supply, 10 µA Typical
Current (P4C164L Military)
– 12/15/20/25/35/45 ns (Military)
Low Power Operation
– 770mW Active –15
Common Data I/O
– 660/743 mW Active – 20
Fully TTL Compatible Inputs and Outputs
– 495/575 mW Active – 25, 35, 45
– 193/220 mW Standby (TTL Input)
– 5.5mW Standby (CMOS Input) P4C164L (Military)
Standard Pinout (JEDEC Approved)
– 28-Pin 300 mil DIP, SOJ
– 28-Pin 600 mil Ceramic DIP
– 28-Pin 350 x 550 mil LCC
– 28-Pin CERPACK
DESCRIPTION
The P4C164 and P4C164L are 65,536-bit ultra high-speed
static RAMs organized as 8K x 8. The CMOS memories
require no clocks or refreshing and have equal access and
cycle times. Inputs are fully TTL-compatible. The RAMs
operate from a single 5V±10% tolerance power supply.
With battery backup, data integrity is maintained with
supply voltages down to 2.0V. Current drain is typically 10
µA from a 2.0V supply.
Access times as fast as 10 nanoseconds are available,
permitting greatly enhanced system operating speeds. In
full standby mode with CMOS inputs, power consumption
is only 5.5 mW for the P4C164L.
The P4C164 and P4C164L are available in 28-pin 300 mil
DIP and SOJ, 28-pin 600 mil ceramic DIP, and 28-pin 350
x 550 mil LCC packages providing excellent board level
densities.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
NC
V
CC
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A0
A
0
2
WE
CE
3
27
26
65,536-BIT
ROW
A
1
NC
4
5
6
7
8
9
CE
A
3
MEMORY
SELECT
ARRAY
2
2
28
2
A
2
A
3
4
1
25
24
23
22
21
20
19
18
A
A
A
12
12
A7
A
3
A
4
A
A
5
11
10
11
10
A
4
A
5
6
A
5
A
6
7
OE
I/O1
OE
A
6
8
A
9
A
7
A
9
INPUT
DATA
COLUMN I/O
A
7
9
A
8
10
11
12
CE
CE
1
1
CONTROL
A
8
10
11
12
13
14
I/O
I/O
I/O
I/O
I/O
8
8
7
I/O8
1
2
I/O
14 15 16
1
I/O
7
I/O
13
17
2
I/O
I/O
I/O
6
5
4
I/O
3
COLUMN
SELECT
GND
CE1
CE2
DIP (P5, D5-2, D5-1), SOJ (J5)
CERPACK (F4) SIMILAR
TOP VIEW
LCC (L5)
TOP VIEW
WE
• • • • • •
A8
A12
OE
Means Quality, Service and Speed
1Q97
91
P4C164/164L
MAXIMUM RATINGS(1)
Symbol
Parameter
Value
Unit
Symbol
Parameter
Value
Unit
VCC
Power Supply Pin with
Respect to GND
–0.5 to +7
V
TBIAS
Temperature Under
Bias
–55 to +125
°C
Terminal Voltage with
Respect to GND
(up to 7.0V)
–0.5 to
VCC +0.5
TSTG
PT
Storage Temperature
Power Dissipation
DC Output Current
–65 to +150
°C
W
VTERM
TA
V
1.0
50
IOUT
mA
Operating Temperature –55 to +125 °C
CAPACITANCES(4)
RECOMMENDED OPERATING
VCC = 5.0V, TA = 25°C, f = 1.0MHz
TEMPERATURE AND SUPPLY VOLTAGE
Ambient
Symbol
Parameter
Conditions Typ. Unit
VCC
Grade(2)
GND
Temperature
–55°C to +125°C
–40°C to +85°C
0°C to +70°C
Military
CIN
VIN = 0V
pF
pF
0V
0V
0V
5.0V ± 10%
5.0V ± 10%
5.0V ± 10%
Input Capacitance
Output Capacitance
5
7
Industrial
COUT
V
OUT = 0V
Commercial
DC ELECTRICAL CHARACTERISTICS
Over recommended operating temperature and supply voltage(2)
P4C164
P4C164L
Symbol
Parameter
Test Conditions
Unit
Min
Max
Min
Max
VIH
VIL
Input High Voltage
2.2
VCC +0.5
2.2
VCC +0.5
0.8
V
Input Low Voltage
–0.5(3)
0.8
–0.5(3)
V
V
V
V
V
VHC
VLC
CMOS Input High Voltage
CMOS Input Low Voltage
Input Clamp Diode Voltage
VCC –0.2 VCC +0.5 VCC –0.2 VCC +0.5
–0.5(3)
0.2
–1.2
0.4
–0.5(3)
0.2
–1.2
0.4
VCD
VOL
VCC = Min., IIN = 18 mA
Output Low Voltage
(TTL Load)
IOL = +8 mA, VCC = Min.
VOH
ILI
Output High Voltage
(TTL Load)
IOH = –4 mA, VCC = Min.
2.4
2.4
V
VCC = Max.
Mil.
Input Leakage Current
–10
–5
+10
+5
–5
n/a
+5
n/a
µA
VIN = GND to VCC
VCC = Max., CE = VIH,
VOUT = GND to VCC
Com’l.
ILO
Output Leakage Current
Mil. –10
–5
+10
+5
–5
n/a
+5
n/a
µA
Com’l.
___
___
___
___
Standby Power Supply
Current (TTL Input Levels)
ISB
CE ≥ VIH or
CE2 ≤VIL, VCC= Max Ind./Com’l.
f = Max., Outputs Open
Mil.
40
30
40
n/a
mA
___
___
___
___
ISB1
Standby Power Supply
Current
(CMOS Input Levels)
25
15
1
n/a
mA
CE ≥ VHC or
CE2 ≤VLC, VCC= Max Ind./Com’l.
f = 0, Outputs Open
Mil.
VIN ≤ VLC or VIN ≥ VHC
n/a = Not Applicable
Notes:
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with VIL and IIL not more negative than –3.0V and
–100mA, respectively, are permissible for pulse widths up to 20ns.
4. This parameter is sampled and not 100% tested.
1. Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAXIMUM rating conditions for extended
periods may affect reliability.
92
P4C164/164L
POWER DISSIPATION CHARACTERISTICS VS. SPEED
Temperature
Symbol
Parameter
Unit
Range
–8
–10 –12 –15 –20 –25 –35 –45
mA
Commercial
200 180 170 160 155 150 N/A N/A
ICC
Dynamic Operating Current*
N/A 190 180 170 160 155 150 N/A mA
N/A N/A 180 170 160 155 150 145 mA
Industrial
Military
*VCC = 5.5V. Tested with outputs open. f = Max. Switching inputs are 0V and 3V. CE1 = VIL, CE2 = VIH, OE = VIH
DATA RETENTION CHARACTERISTICS (P4C164L, Military Temperature Only)
Typ.*
VCC=
Max
VCC=
Symbol
Parameter
Test Condition
Min
Unit
2.0V
3.0V
2.0V
3.0V
VDR
VCC for Data Retention
Data Retention Current
2.0
V
ICCDR
10
15
200
300
µA
CE1 ≥ VCC – 0.2V or
CE2 ≤ 0.2V, VIN ≥ VCC – 0.2V
or VIN ≤ 0.2V
tCDR
Chip Deselect to
Data Retention Time
0
ns
ns
†
§
tR
Operation Recovery Time
tRC
*TA = +25°C
§
tRC = Read Cycle Time
†
This parameter is guaranteed but not tested.
DATA RETENTION WAVEFORM
DATA RETENTION MODE
V
4.5V
4.5V
CC
V
≥ 2V
DR
t
t
CDR
R
V
CE
CE
DR
1
2
V
V
HC
HC
V
V
LC
LC
93
P4C164/164L
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
-8
-10
-12
-15
-20
-25
-35
-45
Parameter
Unit
Sym.
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max
tRC
tAA
12
15
20
35
Read Cycle Time
8
10
25
45
ns
25
25
Address Access
Time
8
8
10
10
12
12
15
15
20
20
35
35
45 ns
tAC
45 ns
Chip Enable
Access Time
Output Hold from
Address Change
ns
ns
3
2
3
2
3
2
3
2
3
2
3
2
3
2
tOH
tLZ
tHZ
tOE
3
2
Chip Enable to
Output in Low Z
20 ns
20 ns
Chip Disable to
Output in High Z
5
5
6
6
7
7
8
9
8
10
13
15
18
Output Enable
Low to Data
Valid
10
tOLZ
tOHZ
tPU
tPD
2
0
2
0
2
0
ns
Output Enable
Low to Low Z
2
0
2
0
2
0
2
0
2
0
20 ns
Output Enable
High to High Z
5
8
6
7
9
9
12
20
15
20
Chip Enable to
Power Up Time
ns
Chip Disable to
Power Down
Time
10
12
15
20
25 ns
READ CYCLE NO. 1 (OE CONTROLLED)(5)
(9)
t
RC
ADDRESS
t
AA
OE
t
t
OH
OE
(8)
t
OLZ
CE
CE
1
2
(8)
OHZ
t
AC
(8)
t
(8)
t
t
HZ
LZ
DATA OUT
Notes:
5. WE is HIGH for READ cycle.
6. CE1 is LOW, CE2 is HIGH and OE is LOW for READ cycle.
7. ADDRESS must be valid prior to, or coincident with CE1 transition
LOW and CE2 transition HIGH.
8. Transition is measured ± 200 mV from steady state voltage prior to
change, with loading as specified in Figure 1. This parameter is
sampled and not 100% tested.
94
P4C164/164L
READ CYCLE NO. 2 (ADDRESS CONTROLLED)(5,6)
(9)
t
RC
ADDRESS
t
AA
t
OH
PREVIOUS DATA VALID
DATA VALID
DATA OUT
READ CYCLE NO. 3 (CE1, CE2 CONTROLLED)(5,7,10)
t
RC
CE
1
CE
2
(8,10)
(10)
t
HZ
t
AC
(8,10)
t
LZ
DATA VALID
DATA OUT
SUPPLY
HIGH IMPEDANCE
(10)
(10)
t
t
PD
PU
I
I
CC
SB
V
CC
CURRENT
Notes:
10. Transitions caused by a chip enable control have similar delays
9. READ Cycle Time is measured from the last valid address to the first
transitioning address.
irrespective of whether CE1 or CE2 causes them.
95
P4C164/164L
AC CHARACTERISTICS—WRITE CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
-8
-10
-12
-15
-20
-25
-35
-45
Parameter
Unit
Sym.
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max
tWC
tCW
8
6
10
7
12
8
15
12
20
15
25
18
35
25
45
33
Write Cycle Time
ns
ns
Chip Enable
Time to End of
Write
tAW
tAS
Address Valid to
End of Write
8
10
12
15
18
25
33
ns
7
0
7
0
6
Address Set-up
Time
0
8
0
7
0
9
0
8
0
15
0
0
18
0
0
20
0
0
25
0
ns
ns
ns
ns
0
12
0
tWP
tAH
tDW
Write Pulse
Width
Address Hold
Time
Data Valid to
End of Write
9
11
15
13
20
tDH
tWZ
0
0
0
3
Date Hold Time
0
3
0
3
0
0
3
0
ns
Write Enable to
Output in High Z
6
7
7
7
8
10
14
18 ns
tOW
Output Active
3
3
3
3
ns
from End of Write
WRITE CYCLE NO. 1 (WE CONTROLLED)(11)
(14)
t
WC
ADDRESS
t
CW
CE
CE
1
2
t
t
t
AW
WR
AH
t
WP
WE
t
t
t
DH
AS
DW
DATA VALID
DATA IN
(8,13)
OW
(8)
WZ
t
t
DATA OUT(12)
DATA UNDEFINED
HIGH IMPEDANCE
Notes:
11. CE1 and WE must be LOW, and CE2 HIGH for WRITE cycle.
12. OE is LOW for this WRITE cycle to show tWZ and tOW
14. Write Cycle Time is measured from the last valid address to the first
transitioning address.
.
13. IfCE1 goesHIGH, orCE2 goesLOW, simultaneouslywithWE HIGH,
the output remains in a high impedance state.
96
P4C164/164L
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE CONTROLLED)(11)
(14)
t
WC
ADDRESS
t
t
CW
AS
CE
CE
1
2
t
AH
t
AW
t
WP
WE
t
t
DH
DW
DATA IN
DATA VALID
(12)
DATA OUT
HIGH IMPEDANCE
AC TEST CONDITIONS
TRUTH TABLE
Mode
CE1 CE2 OE WE
I/O
Power
Input Pulse Levels
GND to 3.0V
Standby
Standby
H
X
X
L
X
X
X
X
High Z Standby
High Z Standby
Input Rise and Fall Times
Input Timing Reference Level
Output Timing Reference Level
Output Load
3ns
1.5V
DOUT
Disabled
1.5V
L
L
L
H
H
H
H
L
H
H
L
High Z Active
See Figures 1 and 2
Read
Write
DOUT
Active
X
High Z Active
+5V
R
= 166.5 Ω
TH
480Ω
V
= 1.73 V
D
TH
OUT
D
OUT
30pF* (5pF* for t , t , t
,
HZ LZ OHZ
255Ω
,
30pF* (5pF* for t , t
t
,
HZ LZ OHZ
,
)
t
t
and t
OLZ WZ OW
,
)
t
t
and t
OLZ WZ OW
Figure 1. Output Load
Figure 2. Thevenin Equivalent
* including scope and test fixture.
Note:
Because of the ultra-high speed of the P4C164/L, care must be taken
when testing this device; an inadequate setup can cause a normal
functioningparttoberejectedasfaulty. Longhigh-inductanceleadsthat
cause supply bounce must be avoided by bringing the VCC and ground
planes directly up to the contactor fingers. A 0.01 µF high frequency
capacitor is also required between VCC and ground. To avoid signal
reflections, proper termination must be used; for example, a 50Ω test
environment should be terminated into a 50Ω load with 1.73V (Thevenin
Voltage) at the comparator input, and a 116Ω resistor must be used in
series with DOUT to match 166Ω (Thevenin Resistance).
97
P4C164/164L
PACKAGE SUFFIX
TEMPERATURE RANGE SUFFIX
Package
Description
Suffix
Temperature
Description
Range Suffix
P
J
D
DW
L
F
Plastic DIP, 300 mil wide standard
C
Commercial Temperature Range,
0°C to +70°C.
Industrial Temperature Range,
–40˚C to +85˚C.
Military Temperature Range,
–55°C to +125°C.
Plastic SOJ, 300 mil wide standard
CERDIP, 300 mil wide
CERDIP, 600 mil wide
Leadless Chip Carrier (ceramic)
CERPACK
I
M
MB
Mil. Temp. with MIL-STD-883
Class B compliance.
ORDERING INFORMATION
Performance Semiconductor's part numbering scheme is as follows:
P4C 164 ss
I
–
p
t
Temperature Range: C, I, M
Package Code: P, J, D, DW, L
Speed (Access /Cycle Time):
10,12, etc.
Low Power Designation:
Blank = None, L = Low
Device Number: 164
Static RAM Prefix
The P4C164 is also available to SMD-5962-38294
SELECTION GUIDE
The P4C164 is available in the following temperature, speed and package options. The P4C164L is available only over
the military temperature range.
Temp.
Speed
Range Package
8
10
12
15
20
25
35
45
Com'l
Plastic DIP
Plastic SOJ
-8PC
-8JC
-10PC
-10JC
-12PC
-12JC
-15PC
-15JC
-20PC
-20JC
-25PC
-25JC
N/A
N/A
N/A
N/A
Ind.
Mil.
Plastic DIP
Plastic SOJ
N/A
N/A
-10PI
-10JI
-12PI
-12JI
-15PI
-15JI
-20PI
-20JI
-25PI
-25JI
-35PI
-35JI
N/A
N/A
CERDIP (300 mil)
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
-12DM
-12DWM -15DWM
-12LM
-12FM
-15DM
-20DM
-20DWM
-20LM
-25DM
-25DWM -35DWM
-25LM
-25FM
-35DM
-45DM
-45DWM
-45LM
Temp. CERDIP (600 mil)
LCC
CERPACK
-15LM
-15FM
-35LM
-35FM
-20FM
-45FM
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
-12DMB
-15DMB
-20DDMB
-35DMB
-35DWMB
-35LMB
CERDIP (300 mil)
CERDIP (600 mil)
LCC
-25DMB
-25DWMB
-25LMB
-45DMB
-45DWMB
-45LMB
Military
Proc'd*
-12DWMB -15DWMB -20DWMB
-12LMB
-12FMB
-15LMB
-15FMB
-20LMB
-20FMB
-35FMB
CERPACK
-25FMB
-45FMB
* Military temperature range with MIL-STD-883, Class B processing.
N/A = Not available
98
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