PT6523-HQ [PTC]
1/3 Duty General Purpose LCD Driver IC; 1/3占空比通用LCD驱动IC型号: | PT6523-HQ |
厂家: | PRINCETON TECHNOLOGY CORP |
描述: | 1/3 Duty General Purpose LCD Driver IC |
文件: | 总23页 (文件大小:739K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Tel:886-2-66296288
Fax:886-2-29174598
URL:http://www.princeton.com.tw
1/3 Duty General Purpose LCD Driver IC
PT6523
DESCRIPTION
PT6523 is an LCD Driver IC which can drive up to 156 segments. It can be used for frequency display
in microprocessor-controlled radio receiver and in other display applications. PT6523 supports both
1/2 bias, 1/3 duty and 1/3 duty, 1/3 bias. Pin assignments and application circuit are optimized for easy
PCB layout and cost saving advantages.
FEATURES
• Up to 156 Segments Outputs
• 1/3 Duty - 1/2 Bias and 1/3 Duty - 1/3 Bias Drive Techniques
• Power Saving Mode and all Segments OFF Function
• Direct Display of Display Data without using a Decoder
• RC Oscillation Circuit
• Power Supply Voltage: 4.5 to 6V
• LCD Drive Bias Voltage can be provided internally or externally
• Available in 64 pins LQFP
APPLICATIONS
• Electronic Dictionary / Translator
• P.O.S.
• Caller ID
• Pager
• Mini Compo
• Electronic Equipment with LCD Display
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
BLOCK DIAGRAM
COM1 COM2 COM3
SG52
SG5 SG4 SG3 SG2 SG1
VDD1
VDD2
COMMON
DRIVER
SEGMENT DRIVER & LATCH
/INH
CLOCK
GENERATOR
OSC
SHIFT REGISTER
DI
ADDRESS
DETECTOR
CLK
CE
VDD
VSS
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
INPUT/OUTPUT CONFIGURATIONS
The schematic diagrams of the input and output circuits of the logic section are shown below:
INPUT PIN: CLK, CE, DI
VDD
VSS
OUTPUT PIN: COM1 TO COM3, SG1 TO SG52
VDD
VDD1
VDD2
VSS
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
PIN CONFIGURATION
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
PIN DESCRIPTION
Pin Name
SG1 to SG52
COM1 to COM3
VDD
I/O
O
-
Description
Pin No.
1 to 52
53 to 55
56
Segment Output Pins
Common Driver Output Pins
Power Supply
Display OFF Control Input Pin
/INH
VDD1
VDD2
I
I
When this pin is Low, the display is forcibly turned off.
(SG1~SG52, COM1~COM3 are set to Low) (see Note)
Used for the 2/3 Bias Voltage when the Bias Voltages are
provided externally. Connect to VDD2 when 1/2 bias is
used.
Used for 1/3 Bias Voltage when the Bias Voltage are
provided externally. Connect to VDD1 when 1/2 Bias is
used.
57
58
59
I
VSS
OSC
CE
CLK
DI
-
Ground Pin
60
61
62
63
64
I/O Oscillation Input/Output Pin
I
I
I
Chip Enable Pin
Synchronization Clock
Transfer Data Pin
Note: When /INH = Low: Serial data transfers can be performed when the display is forcibly off.
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
FUNCTION DESCRIPTION
SERIAL DATA TRANSFER
CONDITION 1: CLK IS TERMINATED AT THE “LOW” LEVEL
CONDITION 2: CLK IS TERMINATED AT THE “HIGH” LEVEL
Notes:
1. Address: 41H
2. D1 to D156 = Display Data
When D1 to D156 are set to “1”, Display is turned ON.
When D1 to D156 are set to “0”, Display is turned OFF.
3. DR = 1/2 Bias Drive or 1/3 Bias Drive Switching Control Data
4. SC = Segment ON/OFF Control Data
5. BU = Normal Mode/Power-Saving Control Data
6. x = Not Relevant
For example, there are 63 segments that are being used, the 63 bits of display data (D94 to D156)
must be sent. Please refer to the diagram below.
8 BITS
67 BITS
1
0
0
0
0
0
1
0
D94 D95 D96
D154 D155 D156
DR SC BU
X
ADDRESS
←------------
------------→
Note: x = Not Relevant
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
CONTROL DATA
DR: 1/2 BIAS DRIVE OR 1/3 BIAS DRIVE SWITCHING CONTROL DATA.
DR is the 1/2 bias drive or 1/3 bias drive switching control data bit. It is used to select either 1/2 bias
drive or 1/3 bias drive. When this pin is set to “0” the 1/2 bias drive is selected. When this pin is set to “1’,
the 1/3 bias drive is selected. Please refer to the table below for the DR settings.
DR
“0”
“1”
Drive Type
1/2 Bias Drive
1/3 Bias Drive
SC: SEGMENT ON/OFF CONTROL DATA
SC is the Segment ON/OFF Control Data Bit. It is used to select the state of the segments. If the SC is
set to “0”, then the Segment Display are turned ON, however, if the SC is set to “1”, the Display State is
OFF. Please refer to the table below.
SC Display State
“0”
“1”
ON
OFF
It should be noted that when the segments are turned off via the SC setting (SC=”1”), the segments are
turned off the outputting of the segment OFF waveforms from the Segment Output Pins.
BU: NORMAL MODE/POWER SAVING MODE CONTROL DATA BIT
BU is the Normal Mode/Power Saving Mode Control Data Bit. It is used to select either the Normal
Mode or the Power saving Mode. When the BU is set to “0”, the Normal Mode is enabled, however, if
the BU is set to “1”, the Power saving Mode is active. It should be noted that under the Power Saving
Mode, the Oscillation (OSC Pin) is stopped and the Common and Segment Pins output Vss levels.
BU
Mode Selected
“0”
Normal Mode
“1” Power Saving Mode
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
/INH AND DISPLAY CONTROL
When power is first applied, the PT6523 internal data are not defined (D1 to D156, DR, SC and BU).
The display is turned off (SG1 to SG52, COM1 to COM3 are all set to “Low” Level) by setting the /INH
pin to “Low” at the same time the power is applied. (Please note that when the /INH Pin is set to “LOW”,
the OSC Pin is not active.) As a result of this, irrelevant display at the time of the power ON can be
eliminated if not prevented by transferring the serial data from the controller while the display is OFF
and by setting the /INH pin after the transfer is completed. Please refer to figures below.
VDD
VDD
/INH
VIL
R
t1
t2
/INH
CE
VIL
DISPLAY & CONTRO L
DATA TRANSF ER
C
INTERN AL
UNDEF INED
DEF INED
DATA
Figure 1
where:
1. t1 is determined by the value of C and R.
2. t2=10µs (minimum)
3. Vcc=4.5V to 6.0V
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
DISPLAY DATA TO SEGMENT OUTPUT PIN CORRESPONDENCE
Segment Output Pin COM3 COM2 COM1
SG1
SG2
D1
D4
D2
D5
D3
D6
SG3
D7
D8
D9
SG4
SG5
SG6
SG7
SG8
SG9
D10
D13
D16
D19
D22
D25
D28
D31
D34
D37
D40
D43
D46
D49
D52
D55
D58
D61
D64
D67
D70
D73
D76
D79
D82
D85
D88
D91
D94
D97
D100
D103
D106
D109
D112
D115
D118
D121
D11
D14
D17
D20
D23
D26
D29
D32
D35
D38
D41
D44
D47
D50
D53
D56
D59
D62
D65
D68
D71
D74
D77
D80
D83
D86
D89
D92
D95
D98
D101
D104
D107
D110
D113
D116
D119
D122
D12
D15
D18
D21
D24
D27
D30
D33
D36
D39
D42
D45
D48
D51
D54
D57
D60
D63
D66
D69
D72
D75
D78
D81
D84
D87
D90
D93
D96
D99
D102
D105
D108
D111
D114
D117
D120
D123
SG10
SG11
SG12
SG13
SG14
SG15
SG16
SG17
SG18
SG19
SG20
SG21
SG22
SG23
SG24
SG25
SG26
SG27
SG28
SG29
SG30
SG31
SG32
SG33
SG34
SG35
SG36
SG37
SG38
SG39
SG40
SG41
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
Segment Output Pin COM3 COM2 COM1
SG42
SG43
SG44
SG45
SG46
SG47
SG48
SG49
SG50
SG51
SG52
D124
D127
D130
D133
D136
D139
D142
D145
D148
D151
D154
D125
D128
D131
D134
D137
D140
D143
D146
D149
D152
D155
D126
D129
D132
D135
D138
D141
D144
D147
D150
D153
D156
For clarity, the table below gives an example of the segment output states for the SG11 Output Pins
Display Data
D32
0
Segment Output Pin (SG11)
State Correspondence
COM1 to COM3=OFF
COM1=ON
D31
0
0
D33
0
1
0
0
1
0
COM2=ON
0
1
1
0
1
0
COM1=COM2=ON
COM3=ON
1
1
1
0
1
1
1
0
1
COM1=COM3=ON
COM2=COM3=ON
COM1 to COM3=ON
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
1/3 DUTY, 1/2 BIAS DRIVE WAVEFORMS
The 1/3 duty, 1/2 bias waveforms are shown below.
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
1/3 DUTY, 1/3 BIAS DRIVE WAVEFORMS
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
ABSOLUTE MAXIMUM RATING
(Unless otherwise stated, Ta=25
℃
, Vss=0V)
Parameter
Maximum Supply Voltage
Symbol
VDDmax
VIN1
Condition
Ratings
-0.3 to +6.5
Unit
V
V
V
V
uA
mA
mW
℃
VDD
CE, CLK, DI , /INH -0.3 to VDD+0.3
Input Voltage
Output Voltage
Output Current
VIN2
OSC
OSC
SG1 to SG52
COM1 to COM3
-0.3 to VDD+0.3
-0.3 to VDD+0.3
VOUT
IOUT1
IOUT2
Pd max
Topr
Tstg
300
3
200
Ta=85℃
Allowable Power Dissipation
Operating Temperature
Storage Temperature
-40 to +85
-65 to +150
℃
ALLOWABLE OPERATING RANGE
(Unless otherwise stated, Ta=25
Parameter
Supply Voltage
℃, Vss=0V)
Symbol
VDD
Conditions
VDD
Min.
4.5
-
Typ.
Max.
6.0
Unit
V
V
V
V
-
Input Voltage
Input Voltage
VDD1
VDD2
VIH
VDD1
VDD2
2/3VDD VDD
1/3VDD VDD
-
High Level Input Voltage
Low Level Input Voltage
Recommended External
Resistance
Recommended External
Capacitance
CE, CLK, DI, /INH
CE, CLK, DI, /INH
4.0
0
-
-
VDD
0.7
VIL
V
Rosc
Cosc
fosc
OSC
OSC
OSC
-
-
47
1000
38
-
-
KΩ
pF
Guaranteed Oscillator
Range
19
76
KHz
Data Setup Time *
Data Hold Time *
CE Wait Time *
CE Setup Time *
CE Hold Time *
High Level Clock Pulse
Width *
tds
tdh
tcp
tcs
tch
CLK, DI: Figure 2
CLK, DI: Figure 2
CE, CLK: Figure 2
CE, CLK: Figure 2
CE, CLK: Figure 2
100
100
100
100
100
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
toH
toL
CLK: Figure 2
CLK: Figure 2
100
100
-
-
-
-
ns
ns
Low Level Clock Pulse
Width *
Rise Time *
Fall Time*
/INH, Switching Time
tr
tf
t2
CE, CLK, DI: Figure 2
CE, CLK, DI: Figure 2
/INH, CE: Figure 1
-
-
10
100
100
-
-
-
-
ns
ns
µs
Note: * = Refer to the diagrams below.
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1/3 Duty General Purpose LCD Driver IC
PT6523
CONDITION 1: CLK IS TERMINATED AT “LOW” LEVEL
VIH
CE
VIL
toH
toL
VIH
50%
VIL
VIH
VIH
tcH
CLK
DI
VIL
tr
tf
tcp
tcs
VIH
VIH
VIL
VIL
tds
tdh
CONDITION 2: WHEN CLK IS TERMINATED AT “HIGH” LEVEL
VIH
CE
VIL
toL
toH
VIH
50%
VIL
VIH
VIH
CLK
DI
VIL
tr
tf
tcp
tcs
tcH
VIH
VIL
VIH
VIL
tds
tdh
Figure 2
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1/3 Duty General Purpose LCD Driver IC
PT6523
ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, Ta=25℃, VSS=0V)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
CE, CLK, DI,
/INH, VI=6V
CE, CLK, DI,
/INH, VI=0V
OSC
Rosc=47KΩ
CE, CLK, DI,
/INH,VDD=5V
SG1 to SG52
Io=-20µA
SG1 to SG52
Io=20µA
COM1 to COM3
Io=-100µA
COM1 to COM3
Io=100µA
High level input current
I
IH
-
-
5
µA
Low level input current
Oscillator frequency
Hysteresis width
I
IL
-5
-
38
-
-
µA
KHz
V
fosc
VH
-
-
-
0.3
High level output
voltage
Low level output
voltage
High level output
voltage
Low level output
voltage
VOH1
VOL1
VOH2
VOL2
VDD-1.0
-
-
V
-
-
1.0
-
V
VDD-1.0
-
-
V
-
1.0
V
1/2 Bias,
COM1 to COM3
VMID1
VMID2
VMID3
VMID4
VMID5
1/2VDD-1.0
2/3VDD -1.0
1/3VDD-1.0
2/3VDD-1.0
1/3VDD-1.0
-
-
-
-
-
1/2VDD+1.0
2/3VDD +1.0
1/3VDD+1.0
2/3VDD+1.0
1/3VDD+1.0
V
V
V
V
V
Io=±100µA
1/3 Bias
COM1 to COM3
Io=±100µA
1/3 Bias
COM1 to COM3
Io=±100µA
1/3 Bias
SG1 to SG52
Io=±20µA
1/3 Bias
SG1 to SG52
Intermediate level
voltage *
Io=±20µA
IDD1
IDD2
Power Saving Mode
f=38KHz, 1/2 Bias
VDD=5V
-
-
-
5
µA
µA
400
800
f=38KHz, 1/3 Bias
VDD=5V
f=38KHz, 1/2Bias
VDD=6V
f=38KHz, 1/3 Bias
VDD=6V
IDD3
IDD2
IDD3
-
-
-
300
650
580
600
1300
1200
µA
µA
µA
Supply current
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
Note: * = Except the Bias Voltage Generation Divider Resistors that are built-into the VDD1 and VDD2
(Please refer to the figures below)
VDD
VDD1
TO COMMON
& SEGMENT DRIVERS
VDD2
EXCEPT THESE
RESISTORS
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
APPLICATION CIRCUITS
1/3 BIAS (FOR SMALL DISPLAY PANEL)
SG49
49
32
31
30
SG32
50 SG50
51 SG51
52 SG52
SG31
SG30
SG29 29
SG28
28
53
54
COM1
COM2
27
26
25
SG27
55 COM3
56 VDD
57 /INH
SG26
SG25
VDD
PT6523
R1
0.1
SG24 24
SG23
23
58
VDD1
Open
MCU
20p
µF
59 VDD2
60 VSS
SG22
SG21
22
21
61
OSC
SG20 20
SG19
SG18
SG17
62 CE
19
18
17
1000pF
63 CLK
47K
64
DI
Note: 39KΩ ≥ R1
≥
10KΩ
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
1/3 BIAS (FOR NORMAL SIZE DISPLAY PANELS)
SG49
49
32
31
30
SG32
50 SG50
51 SG51
52 SG52
SG31
SG30
SG29 29
SG28
28
53
54
COM1
COM2
27
26
25
SG27
55 COM3
56 VDD
57 /INH
SG26
SG25
VDD
PT6523
R1
SG24 24
SG23
23
58
VDD1
20p
0.1
µ
F
C
59 VDD2
60 VSS
SG22
SG21
22
21
C
61
OSC
SG20 20
SG19
SG18
SG17
62 CE
19
18
17
1000pF
63 CLK
MCU
47K
64
DI
Notes:
1. 39KΩ ≥ R1
2. C 0.047µF
≥
10KΩ
≥
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1/3 Duty General Purpose LCD Driver IC
PT6523
1/3 BIAS (FOR LARGE PANELS)
SG49
49
32
31
30
SG32
50 SG50
51 SG51
52 SG52
SG31
SG30
SG29 29
SG28
28
53
54
COM1
COM2
27
26
25
SG27
55 COM3
56 VDD
57 /INH
SG26
SG25
VDD
PT6523
R1
SG24 24
R
R
R
SG23
23
58
VDD1
20p
0.1
µ
F
C
59 VDD2
60 VSS
SG22
SG21
22
21
C
61
OSC
SG20 20
SG19
SG18
62 CE
19
18
1000pF
63 CLK
MCU
47K
64
SG17 17
DI
Notes:
1. 39KΩ ≥ R1
2. C 0.047µF
3. 10KΩ ≥ 1KΩ
≥
10KΩ
≥
R
≥
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
ORDER INFORMATION
Valid Part Number
PT6523-HQ
Package Type
64 Pins, LQFP(14x14mm)
64 Pins, LQFP(10x10mm)
Top Code
PT6523-HQ
PT6523-LQ
PT6523-LQ
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
PACKAGE INFORMATION
64 PINS, LQFP PACKAGE (BODY SIZE: 14MM X 14MM, PITCH: 0.80MM)
Symbol
Min.
-
0.05
Max.
2.45
A
A1
A2
b
c
D
D1
E
E1
e
0.250
2.200
0.420
0.230
14.100
17.350
14.100
17.350
1.80
0.300
0.110
13.900
17.050
13.900
17.050
0.80BSC.
1.030
L
0.730
θ
0°
7°
PT6523 V1.8
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1/3 Duty General Purpose LCD Driver IC
PT6523
64 PINS, LQFP PACKAGE (BODY SIZE: 10MM X 10MM, PITCH:0.50MM,
THK BODY: 1.40MM)
D
D1
A
A2
-D-
A1
-A-
-B-
c
e
b
θ
1
C SEATING PLANE
θ
ccc
C
θ
2
R1
R2
-H-
GAUGE PLANE
0.25mm
S
L
θ
3
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1/3 Duty General Purpose LCD Driver IC
PT6523
Symbol
Min.
0.09
0.45
Nom.
Max.
0.20
0.75
c
L
-
0.60
L1
A
A1
A2
b
1.00 REF.
-
-
-
1.60
0.15
1.45
0.27
0.05
1.35
0.17
1.40
0.22
D
12.00 BSC.
D1
E
10.00 BSC.
12.00 BSC.
E1
e
10.00 BSC.
0.50 BSC.
R1
R2
S
0.08
0.08
0.20
-
-
-
-
0.20
-
θ
0
0
11
11
°
°
°
°
3.5
-
°
7°
-
θ1
θ2
θ3
12°
13
13
°
°
12°
ccc
0.08
Notes:
1. All dimensioning and tolerancing conform to ASME Y14.5M - 1994.
2. Datums A-B and D to be determined at datum plane H.
3. Dimensions D1 and E1 do not include mold prortrusion. Allowable protrusion is 0.25mm per side.
Dimensions D1 and E1 do include mold mismatch and are determined at the datum plane H.
4. Controlling Dimension: MILLIMETERS.
5. Dimension b does not include dambar protrusion. The dambar protrusion (s) shall not cause the
lead width to exceed b maximum by more than 0.08 mm. Dambar cannot be located on the lower
radius or the lead foot. minimum space between protrusion and as adjacent lead is 0.07 mm for
0.4mm and 0.5mm pitch packages.
6. A1 is defined as the distance from the seating plane to the lowest point of the package body.
7. Refer to JEDEC MS-026 Variation BCD.
JEDEC is the TRADEMARK OF JEDEC SOLID STATE TECHNOLOGY ASSOCIATION.
PT6523 V1.8
- 23 -
July, 2007
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