PT2303-S [PTC]
2W × 2 Class AB Audio Power Amplifier; 2W × 2 AB类音频功率放大器![PT2303-S](http://pdffile.icpdf.com/pdf1/p00145/img/icpdf/PT230_803090_icpdf.jpg)
型号: | PT2303-S |
厂家: | ![]() |
描述: | 2W × 2 Class AB Audio Power Amplifier |
文件: | 总17页 (文件大小:421K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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Tel: 886-2-66296288
Fax: 886-2-29174598
URL: http://www.princeton.com.tw
2W × 2 Class AB Audio Power Amplifier
PT2303
DESCRIPTION
The PT2303 is a power amplifier utilizing CMOS Technology specially designed for audio purpose. It
can deliver 2W × 2 power output to the 5V power voltage. The power consumption is very low in
stand-by. Total harmonic distortion is lower than 0.03%. The output mode can be switched between
the SE (Single-Ended) or BTL (Bridge-Tied Load) mode. Built-in over-temperature protection, package
size is not occupies PCB space. It is suitable for small or portable products.
FEATURES
• CMOS Technology
• Stereo input
• Output power 2W × 2 (4Ω)
• Low harmonics distortion (0.03%)
• SE and BTL modes operation
• Suppress the pop and click noise when mode changed
• Shutdown function, turn on can into save mode (Icc<0.5µA)
• Built-in overheat protect
APPLICATIONS
• LCD monitor (for TV)
• Portable audio
• Multimedia speakers
• Other audio applications
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
BLOCK DIAGRAM
-
-IN1
-OUT1
+OUT1
AMP1N
+
+IN1
Shutdown
VDD
Power
Block
-
AMP1P
Vref
+
GND
HP-IN
-OUT2
SE/BTL
-
-IN2
AMP2N
+
+IN2
-
AMP2P
+OUT2
+
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
PIN CONFIGURATION
Shutdown
GND
Shutdown
GND
16
15
14
13
12
11
10
9
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
HP-IN
GND
+OUT2
VDD
1
HP-IN
GND
+OUT2
VDD
-OUT2
-IN2
2
+OUT1
VDD
+OUT1
VDD
3
4
PT2303
-OUT1
-IN1
-OUT1
-IN1
5
-OUT2
-IN2
PT2303
6
GND
GND
Vref
7
Vref
+IN1
+IN1
+IN2
NC
+IN2
8
NC
9
NC
10
NC
PIN DESCRIPTION
Pin No.
Pin Name I/O
Description
16 Pins
20 Pins
Shutdown pin。Entire IC into the shutdown mode
when this pin connected to the Vcc.
Shutdown
I
1
1
GND
+OUT1
VDD
- Ground
O Channel 1 output (+)
2
3
4
2
3
4
-
Supply voltage input
-OUT1
-IN1
GND
+IN1
+IN2
Vref
-IN2
-OUT2
VDD
+OUT2
GND
O Channel 1 output (-)
5
6
7
8
5
6
7
8
13
14
15
16
17
18
19
I
-
I
I
I
I
Channel 1 input (-)
Ground
Channel 1 input (+)
Channel 2 input (+)
Bias reference bypassing
Channel 2 input (-)
9
10
11
12
13
14
15
O Channel 2 output (-)
- Supply voltage input
O Channel 2 output (+)
-
Ground
Output mode select, connected to the VDD for SE
mode or GND for BTL mode
No Connect
HP-IN
NC
I
16
-
20
-
9 ~ 12
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
FUNCTION DESCRIPTION
POWER SUPPLY
The operating voltage of PT2303 is from 3V to 5V, In general operation 5V is recommended, it can
deliver higher power output. When the supply voltage less then 3V the IC can work properly, but the
distortion will rise. After the supply voltage exceed 6V the temperature of package outside will rising
quickly due to higher stand-by current consumption.
SHUTDOWN
When the supply still powered the chip, pull-up the shutdown pin to VDD level will take chip into the
shutdown mode. After the shutdown mode is active, the total current consumption is less than 0.5µA
and the all of input or output pins no voltage output. When shutdown pin set to GND, the IC is back to
the normal operation.
Shutdown Pin
VDD
Output State
Shutdown ON
Normal
GND
VOLTAGE GAIN ADJUST
The output stage structure of the PT2303 is Bridge Tied Loaded (BTL), the close loop voltage gain can
be get from following formula.
Gain = 20log ( Rf ÷ Ri ) + 6dB
The close loop gain can be adjusted by external resistance, in general purpose the 6dB gain setting is
recommended, please reference to the application circuit. If the amplitude of input voltage in lower
level (ex. < 2Vpp), it can raise the voltage gain to get enough power output. Recommended of the
minimum series resistance (Ri) is 10KΩ to ensure IC have appropriate input impedance. Please refer
to following table.
External Resistance
Gain= 0dB
20KΩ
Gain= 6dB
20KΩ
Gain=12dB
10KΩ
Ri
Rf
10KΩ
20KΩ
20KΩ
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
If the amplitude of input signal exceed the VDD-GND range, or voltage gain setup too high, the input
stage is very easy overload and distorted. Please make sure the amplitude of audio source (Vin) and
setting the best gain value, in general use the gain setup to +6dB is recommended. Please refer to
following table.
Operating Voltage
VDD=3V
Gain= 0dB
Vin <5Vpp
Vin <8Vpp
Gain= 6dB
Vin <2.5Vpp
Vin<4Vpp
Gain=12dB
Vin <1.25Vpp
Vin<2Vpp
VDD=5V
SE/BTL MODE SWITCHING
PT2303 have two output modes, SE (Single-Ended) or BTL (Bridge-Tied Load). When driving a 4Ω
speaker load suggestion set to the BTL mode for get the more power output. And driving a 32Ω
headphone load, it can be set to SE mode and turn-off the un-work amplifier to decrease stand-by
power consumption. Switching between the SE/BTL modes is controlled by the HP-IN pin, please refer
to following table:
HP-IN
VDD
Output Mode
SE
GND
BTL
OVER TEMPERATURE PROTECTION
The PT2303 has a built-in over temperature protection circuit, it will turn off all output when the chip
temperature over 130℃, the chip will return to normal operation automatically after the temperature
cool down to 100℃.
POP AND CLICK SURPRESS
A power amplifier uses single supply voltage may almost have inrush noise on output in the
power-on/off period. It is because of the output DC potential needs time to stable on 1/2VDD, the
period relative with the capacitance (CB) on the Vref pin. Larger CB value will extend the stable time,
and also can suppress the noise happened in power-on. In supply voltage=5V and CB=2.2µF, stable
time is about 300mS. The value of CB also relative with the value of the DC blocking capacitor
connected in input terminal. In general condition the time constant of DC blocking capacitor should be
less than CB stable time. The recommended value of DC blocking capacitor is 1µF, and the capacitor
of output terminal connected to 32Ω headphone is 220µF. Smaller capacitance can shorten the charge
time to suppress the pop noise, both the input and output capacitance will limited the low frequency
extend range.
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
HEAT DISSIPATION
During normal operation, the chip only consumes very little stand-by current. In high output power
conditions, the package temperature will rise. For proper operating temperature, a modest heat sink
mounted on the top side of the chip is required. The thermal resistance requirement of the heat sink
demand may be obtained by the formula below:
θJA = (TJ (max) - TA)/PDISS
PDISS = IC dissipation power
TJ (max) = Maximum chip conjunction temperature
TA = external environment temperature
θJA = thermal resistance from chip conjunction to ambience environment
With 60% estimated efficiency (eff), PT2303 in 2W + 2W output power dissipation is probably
PDISS = ( Po ÷ eff ) - Po = 2.6W
The maximum chip conjunction temperature is 150℃, Exceed this temperature will damage the chip,
assuming the outside environment air temperature is 50℃. From the chip conjunction dissipation to
external environment thermal resistance θJA should be:
θJA
= ( 150 – 50 ) ÷ 2.6 = 38.4℃/W
The PT2303 chip conjunction to case thermal resistance θJC is 26℃/W. Therefore the heat sink
thermal resistance should be:
θJA - θJC = 12.4℃/W
In normal operating, PT2303 needs at least 2 sq inch PCB for heat dissipate; it should be use whole
copper foil to cover on it for enough heat dissipation space. We suggest using two-layer PCB for better
heat dissipation. The track connected to the output and power pin of IC should be as thick as possible
for better heat dissipation ability. If IC doesn’t have enough heat dissipation space (>1 sq inch), and IC
is always in full power output situation, an additional heat sink should placed on the chip.
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol Condition
Min.
0
Max.
7
Unit
V
Supply voltage
VDD
℃
Operating temperature
Tamb
-40
+85
℃
V
mA
Storage temperature
Maximum input voltage
Maximum input current
Tstg
Vimax
Iimax
-65
-0.3
-10
+150
Vcc+0.3
+10
*
*Input pins surge current can be reached 100mA will not induce the CMOS latched up.
PACKAGE THERMAL CHARACTERISTICS
PACKAGE TYPE: SOP16L, 300MIL
Parameter
Symbol Condition Value Unit
℃/W
℃/W
From chip conjunction dissipation to external environment
From chip conjunction dissipation to package surface
θJA
θJC
88.8
26
Ta=25℃
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, VDD=5V, bandwidth=22~22KHz)
Parameter
Symbol
Condition
Min.
Typ.
Max. Unit
Supply voltage
VDD
3
5
6
V
SE Mode
4
6
10
mA
Operating current
Two channels gain error
THD+N
Is
BTL Mode
Shutdown=ON
Ri=Rf=20KΩ
6
0.1
-1
8
0.5
0
12
1
+1
µA
dB
Gerr
THD
Po=0.2W, RL=4Ω
0.03
0.05
0.07
%
Po=1W, RL=4Ω
Po=50mW, RL=32Ω
THD=1%, RL=8Ω
THD=10%, RL=8Ω
THD=1%, RL=4Ω
THD=10%, RL=4Ω
THD=1%, RL=32Ω
THD=10%, RL=32Ω
0.06
0.03
1.0
1.2
1.4
1.8
80
0.08
0.05
1.1
1.4
1.6
2.0
85
0.15
0.08
1.2
1.6
1.8
2.1
90
BTL
SE
W
Power output
Po
mW
100
110
120
Signal-to-Noise
Residual noise
Output offset
SNR
Vno
Voff
A-Weighted
A-weighted
+OUT ~ -OUT
95
-
2
100
35
10
90
85
-
50
30
100
95
80
50
140
-
dB
µV
mV
BTL
SE
BTL
SE
80
80
60
40
-
85
0.45
-
Channel separation
CS
PSRR
TH
F=1KHz
dB
dB
Power Signal-to-Noise
repel rate
70
45
F=100Hz
Overheat close
Back to work
Shutdown ON
Shutdown OFF
SE
-
-
130
100
0.6
0.15
0.8
0.2
Temperature protect
Shutdown voltage
SE/BTL voltage
℃
VDD=3~5V
Shutdown pin
-
VSD
VSB
VDD
VDD
0.2
-
0.3
0.75
-
VDD=3~5V
BTL
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
APPLICATION CIRCUIT
Rf
20k
Ri
6
8
-IN1
+IN1
220uF
CH1 IN
-OUT1
+OUT1
5
3
AMP1N
20k
VDD
1uF
BTL/SE
1k
Sense
ON
Shut
1
Down
POWER
BLOCK
OFF
VDD
VDD
4,13 VDD
10 Vref
ShutDown
AMP1P
100k
CB
1uF
CVDD
10uF
HP-IN 16
-OUT2 12
SE/BT L
2,7,15
GND
100k
HEADPHONE
11 -IN2
AMP2N
9
+IN2
1uF
220uF
Ri
1k
CH2 IN
20k
Rf
20k
+OUT2 14
AMP2P
PT2303 V1.2
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December, 2007
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2W × 2 Class AB Audio Power Amplifier
PT2303
ORDER INFORMATION
Valid Part Number
PT2303-D
Package Type
Top Code
16 Pins, DIP, 300mil
16 Pins, SOP, 300mil
20 Pins, TSSOP
PT2303-D
PT2303-S
PT2303-TX
PT2303-S
PT2303-TX
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
PACKAGE INOFRMATION
16PINS, DIP, 300MIL
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
Symbol
A
Min.
-
Nom.
-
Max.
0.210
-
A1
A2
b
b1
b2
b3
c
c1
D
D1
E
E1
e
eA
eB
eC
L
0.015
0.115
0.014
0.014
0.045
0.030
0.008
0.008
0.780
0.005
0.300
0.240
-
0.130
0.018
0.018
0.060
0.039
0.010
0.010
0.790
-
0.195
0.022
0.020
0.070
0.045
0.014
0.011
0.800
-
0.310
0.250
0.100 bsc
0.300 bsc
-
0.325
0.280
-
0.430
0.060
0.150
0.000
0.115
-
0.130
Notes:
1. Controlling Dimension: INCHES.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimensions A, A1 and L are measured with the package seated in JEDEC Seating Plane Gauge
GS-3.
4. D, D1 and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall
not exceed 0.010 inch.
5. E and eAmeasured with the leads constrained to be perpendicular to datum -C-.
6. eB and eA are measured at the lead tips with the leads unconstrained.
7. N is the maximum number of terminal positions (N=16).
8. Pointed or rounded lead tips are preferred to ease insertion.
9. b2 and b3 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not
exceed 0.010 (0.25mm).
10. Variation AB is a full lead package.
11. Distance between leads including dambar protrusions to be 0.005 in minimum.
12. Datum plane -H- coincident with the bottom of lead where lead exits body.
13. Refer to JEDEC MS-001 Variation AB.
JEDEC is the registered trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION.
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
16 PINS, SOP, 300 MIL
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
Symbol
Min.
Max
2.65
0.30
0.51
0.32
10.50
7.60
A
A1
B
C
D
E
e
2.35
0.10
0.33
0.23
10.10
7.40
1.27 BSC
H
h
L
10.00
0.25
0.40
0o
10.65
0.75
1.27
8o
α
Notes:
1. Controlling Dimension: MILLIMETER
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions and
gate burrs shall not exceed 0.15mm (0.006 in) per side.
4. Dimension E does not include interlead flash or protrusions. Interlead flash and protrusions shall
not exceed 0.25 mm (0.010 in.) per side.
5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within
the crosshatched area.
6. L is the length of the terminal for soldering to a substrate.
7. N is the number of terminal positions (N=16).
8. The lead width B, as measured 0.36 mm (0.014in) or greater above the seating plane, shall not
exceed a maximum value of 0.61mm (0.024in.)
9. Refer to JEDEC MS-013 Variation AA.
JEDEC is the registered trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION.
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
20PINS, TSSOP, 173MIL
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
Symbols
Min
-
Nom
Max
A
A1
A2
b
b1
c
-
-
1.20
0.15
1.05
0.30
0.25
0.20
0.16
6.60
0.05
0.80
0.19
0.19
0.09
0.09
6.40
1.00
-
0.22
-
c1
D
-
6.50
E
6.40 BSC.
E1
e
L
4.30
0.45
4.40
0.65 BSC.
0.60
4.50
0.75
L1
R
R1
S
θ1
θ2
θ3
1.00 REF.
0.09
0.09
0.20
0°
-
-
-
-
-
-
-
8°
12 REF.
12 REF.
PT2303 V1.2
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2W × 2 Class AB Audio Power Amplifier
PT2303
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Controlling Dimension: Millimeters
3. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate
burrs shall not exceed 0.15 per end.
4. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not
exceed 0.25 per side.
5. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.08 mm
total in excess of the b dimension at maximum material condition. Dambar cannot be located on the
lower radius or the foot. Minimum space between protrusion and adjacent lead is 0.07 mm.
6. N is the maximum number of terminal positions for the specified package length. Depopulation is
allowed, but only under the following conditions:
- Depopulation may reduce N by increments of four leads only.
- Only end leads may be removed.
- Leads must be symmetrically arranged with respect to datum A (Note 10) to avoid any array
shifting.
7. Terminal numbers are shown for reference only.
8. Datum A and B to be determined at datum plane H.
9. Dimensions D and E1 to be determined at datum plane H.
10.This dimension applies only to variations with an even number of leads per side. For variations with
an odd number of leads per side, the center lead must be coincident with the package centerline,
datum A.
11.Cross section B-B to be determined at 0.10 to 0.25 mm from the lead tip.
12.Details of the pin 1 identifier are optional, but must be located within the zone indicated.
13.D1 and E2 minimum dimensions of thermally enhanced types are variables depending on device
function (die paddle size). D1 and E2 maximum dimensions can be equal to D/E1 maximum
dimensions. End user should verify actual size of exposed thermal pad for specific device
application.
14.A1 is defined as the vertical distance from the seating plane to the lowest point on the package
body excluding the lid and or thermal enhancement on cavity down package configurations.
15.Caution should be taken during design, assembly and processing to prevent deposited board
solder from holding the leads up off the board. This is applicable to thermal enhanced variations
where A1 dimension is allowed to be zero.
16.Refer to JEDEC MO-153 Variation AC
JEDEC is the trademark of JEDEC SOLID STATE TECHNOLOGY ASSOCIATION
PT2303 V1.2
- 17 -
December, 2007
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