4244 [PSEMI]

SPDT UltraCMOS? RF Switch; 单刀双掷的UltraCMOS ™射频开关
4244
型号: 4244
厂家: Peregrine Semiconductor    Peregrine Semiconductor
描述:

SPDT UltraCMOS? RF Switch
单刀双掷的UltraCMOS ™射频开关

开关 射频开关 光电二极管
文件: 总7页 (文件大小:251K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Product Specification  
PE4244  
SPDT UltraCMOS™ RF Switch  
Features  
Product Description  
Single +3.0-volt Power Supply  
The PE4244 UltraCMOS™ RF Switch is designed to cover a  
broad range of applications from DC to 3.0 GHz. This switch  
integrates on-board CMOS control logic with a low voltage  
CMOS compatible control input. Using a +3-volt nominal power  
supply voltage, a 1 dB compression point of +27 dBm can be  
achieved. The PE4244 also exhibits excellent isolation of 39 dB  
at 1.0 GHz and is offered in a small 8-lead MSOP package.  
Low Insertion loss: 0.60 dB up to  
2.0 GHz  
High isolation of 39 dB at 1.0 GHz,  
29 dB at 2.0 GHz  
Typical 1 dB compression of +27 dBm  
Single-pin CMOS logic control  
Packaged in 8-lead MSOP  
The PE4244 UltraCMOS™ RF Switch is manufactured in  
Peregrine’s patented Ultra Thin Silicon (UTSi®) CMOS  
process, offering the performance of GaAs with the economy  
and integration of conventional CMOS.  
Figure 1. Functional Diagram  
Figure 2. Package Type  
8-lead MSOP  
RFC  
RF1  
RF2  
CMOS  
Control  
Driver  
CTRL  
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 )  
Parameter  
Conditions  
Minimum  
Typical  
Maximum  
Units  
Operation Frequency1  
DC  
3000  
MHz  
1000 MHz  
2000 MHz  
1000 MHz  
2000 MHz  
1000 MHz  
2000 MHz  
1000 MHz  
2000 MHz  
0.60  
0.60  
39  
0.75  
0.75  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
Insertion Loss  
37  
27  
34  
26  
19  
22  
Isolation – RFC to RF1/RF2  
Isolation – RF1 to RF2  
Return Loss  
29  
36  
28  
20  
25  
‘ON’ Switching Time  
‘OFF’ Switching Time  
Video Feedthrough2  
Input 1 dB Compression  
Input IP3  
CTRL to 0.1 dB final value, 2 GHz  
CTRL to 25 dB isolation, 2 GHz  
200  
90  
15  
27  
ns  
ns  
mVpp  
dBm  
dBm  
2000 MHz  
26  
43  
2000 MHz, 14dBm  
45  
Notes:  
1. Device linearity will begin to degrade below 10 MHz.  
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50  
test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.  
Document No. 70-0103-03 www.psemi.com  
©2005 Peregrine Semiconductor Corp. All rights reserved.  
Page 1 of 7  
PE4244  
Product Specification  
Figure 3. Pin Configuration (Top View)  
Table 3. Absolute Maximum Ratings  
Symbol  
Parameter/Conditions  
Min Max Units  
1
2
3
4
8
7
6
5
VDD  
RF1  
GND  
GND  
RF2  
VDD  
VI  
Power supply voltage  
Voltage on any input  
-0.3  
-0.3  
4.0  
V
V
VDD  
+
CTRL  
4244  
TST  
TOP  
Storage temperature range  
Operating temperature  
-65  
-40  
150  
85  
°C  
°C  
GND  
RFC  
PIN  
Input power (50)  
30  
dBm  
VESD  
ESD voltage (Human Body  
1500  
V
Table 2. Pin Descriptions  
Absolute Maximum Ratings are those values  
listed in the above table. Exceeding these values  
may cause permanent device damage.  
Functional operation should be restricted to the  
limits in the DC Electrical Specifications table.  
Exposure to absolute maximum ratings for  
extended periods may affect device reliability.  
Pin  
No.  
Pin  
Name  
Description  
1
VDD  
Nominal 3 V supply connection. A by-  
pass capacitor (100 pF) to the ground  
plane should be placed as close as pos-  
2
3
CTRL  
GND  
CMOS logic level:  
High = RFC to RF1 signal path  
Table 4. DC Electrical Specifications  
Ground connection. Traces should be  
physically short and connected to  
Parameter  
Min  
Typ  
3.0  
Max  
3.3  
Units  
V
VDD Power Supply Voltage  
IDD Power Supply Current  
2.7  
4
5
6
RFC  
RF2  
Common RF port for switch (Note 1)  
RF2 port (Note 1)  
250  
500  
nA  
VDD = 3V, VCNTL = 3V  
Control Voltage High  
0.7xVDD  
V
V
GND  
Ground Connection. Traces should be  
physically short and connected to  
Control Voltage Low  
0.3xVDD  
7
8
GND  
RF1  
Ground Connection. Traces should be  
physically short and connected to  
Electrostatic Discharge (ESD) Precautions  
When handling this UltraCMOS™ device, observe  
the same precautions that you would use with  
other ESD-sensitive devices. Although this device  
contains circuitry to protect it from damage due to  
ESD, precautions should be taken to avoid  
exceeding the specified rating.  
RF1 port (Note 1)  
Note 1: All RF pins must be DC blocked with an external  
series capacitor or held at 0 VDC  
.
Latch-Up Avoidance  
Unlike conventional CMOS devices, UltraCMOS™  
devices are immune to latch-up.  
Table 5. Control Logic Truth Table  
Control Voltage  
CTRL = CMOS High  
CTRL = CMOS Low  
Signal Path  
RFC to RF1  
RFC to RF2  
©2005 Peregrine Semiconductor Corp. All rights reserved.  
Document No. 70-0103-03 UltraCMOS™ RFIC Solutions  
Page 2 of 7  
PE4244  
Product Specification  
Figure 4. Evaluation Board Layout  
Peregrine specification 101/0037  
Evaluation Kit  
The SPDT Switch Evaluation Kit board was  
designed to ease customer evaluation of the  
PE4244 SPDT switch. The RF common port is  
connected through a 50 transmission line to the  
top left SMA connector, J1. Port 1 and Port 2 are  
connected through 50 transmission lines to the top  
two SMA connectors on the right side of the board,  
J3 and J4. A through transmission line connects  
SMA connectors J6 and J8. This transmission line  
can be used to estimate the loss of the PCB over the  
environmental conditions being evaluated.  
The board is constructed of a two metal layer FR4  
material with a total thickness of 0.031”. The bottom  
layer provides ground for the RF transmission lines.  
The transmission lines were designed using a  
coplanar waveguide with ground plane model using  
a trace width of 0.030”, trace gaps of 0.007”,  
dielectric thickness of 0.028”, metal thickness of  
0.0014” and εr of 4.4.  
J2 provides a means for controlling DC and digital  
inputs to the device. Starting from the lower left pin,  
the second pin to the right (J2-3) is connected to the  
device CTRL input. The fourth pin to the right (J2-7)  
is connected to the device VDD input. A decoupling  
capacitor (100 pF) is provided on both CTRL and  
V
DD traces. It is the responsibility of the customer to  
determine proper supply decoupling for their design  
application. Removing these components from the  
evaluation board has not been shown to degrade RF  
performance.  
Figure 5. Evaluation Board Schematic  
Peregrine specification 101/0147  
Document No. 70-0103-03 www.psemi.com  
©2005 Peregrine Semiconductor Corp. All rights reserved.  
Page 3 of 7  
PE4244  
Product Specification  
Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted)  
Figure 7. Input 1 dB Compression Point & IIP3  
Figure 6. Insertion Loss – RFC to RF1  
0
60  
50  
40  
30  
20  
60  
50  
40  
30  
20  
-0.3  
-40°C  
-0.6  
85°C  
25°C  
-0.9  
-1.2  
-1.5  
0
500  
1000  
1500  
2000  
2500  
3000  
0
500  
1000  
1500  
2000  
2500  
3000  
Frequency (MHz)  
Frequency (MHz)  
Figure 8. Insertion Loss – RFC to RF2  
Figure 9. Isolation – RFC to RF1  
0
-20  
0
-0.3  
-40°C  
-40  
-0.6  
-60  
85°C  
25°C  
-0.9  
-1.2  
-1.5  
-80  
-100  
0
500  
1000  
1500  
2000  
2500  
3000  
0
500  
1000  
1500  
2000  
2500  
3000  
Frequency (MHz)  
Frequency (MHz)  
©2005 Peregrine Semiconductor Corp. All rights reserved.  
Document No. 70-0103-03 UltraCMOS™ RFIC Solutions  
Page 4 of 7  
PE4244  
Product Specification  
Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted)  
Figure 10. Isolation – RFC to RF2  
Figure 11. Isolation – RF1 to RF2, RF2 to RF1  
0
-20  
0
-25  
-40  
-50  
-60  
-75  
-80  
-100  
-100  
0
500  
1000  
1500  
2000  
2500  
3000  
0
500  
1000  
1500  
2000  
2500  
3000  
Frequency (MHz)  
Frequency (MHz)  
Figure 12. Return Loss – RFC to RF1, RF2  
Figure 13. Return Loss – RF1, RF2  
0
0
-10  
-10  
RF1  
RF1  
-20  
-20  
-30  
-30  
RF2  
RF2  
-40  
-40  
0
500  
1000  
1500  
2000  
2500  
3000  
0
500  
1000  
1500  
2000  
2500  
3000  
Frequency (MHz)  
Frequency (MHz)  
Document No. 70-0103-03 www.psemi.com  
©2005 Peregrine Semiconductor Corp. All rights reserved.  
Page 5 of 7  
PE4244  
Product Specification  
Figure 14. Package Drawing  
8-lead MSOP  
TOP VIEW  
0.65BSC  
.525BSC  
8
7
6
5
2.45±0.10  
2X  
3.00±0.10  
0.51±0.13  
- B -  
1
2
3
4
.25  
A
B
C
0.51±0.13  
- C -  
2.95±0.10  
0.86±0.08  
2.95±0.10  
1.10 MAX  
- A -  
+0.07  
3.00±0.10  
4.90±0.15  
0.10  
A
0.33  
0.10±0.05  
-0.08  
0.08  
A
B
C
3.00±0.10  
FRONT VIEW  
SIDE VIEW  
Table 6. Ordering Information  
Order Code  
4244-01  
Part Marking  
4244  
Description  
Package  
8-lead MSOP  
Shipping Method  
PE4244-08MSOP-50A  
PE4244-08MSOP-2000C  
PE4244-08MSOP-EK  
50 units / Tube  
2000 units / T&R  
1 / Box  
4244-02  
4244  
8-lead MSOP  
4244-00  
PE4244-EK  
4244  
Evaluation Kit  
4244-51  
PE4244G-08MSOP-50A  
PE4244G-08MSOP-2000C  
Green 8-lead MSOP  
Green 8-lead MSOP  
50 units / Tube  
2000 units / T&R  
4244-52  
4244  
©2005 Peregrine Semiconductor Corp. All rights reserved.  
Document No. 70-0103-03 UltraCMOS™ RFIC Solutions  
Page 6 of 7  
PE4244  
Product Specification  
Sales Offices  
The Americas  
North Asia Pacific  
Peregrine Semiconductor Corp.  
9450 Carroll Park Drive  
San Diego, CA 92121  
Peregrine Semiconductor K.K.  
5A-5, 5F Imperial Tower  
1-1-1 Uchisaiwaicho, Chiyoda-ku  
Tokyo 100-0011 Japan  
Tel 858-731-9400  
Fax 858-731-9499  
Tel: +81-3-3502-5211  
Fax: +81-3-3502-5213  
Europe  
South Asia Pacific  
Peregrine Semiconductor Europe  
Commercial Products:  
Bâtiment Maine  
13-15 rue des Quatre Vents  
F- 92380 Garches, France  
Tel: +33-1-47-41-91-73  
Peregrine Semiconductor  
28G, Times Square,  
No. 500 Zhangyang Road,  
Shanghai, 200122, P.R. China  
Tel: +86-21-5836-8276  
Fax: +86-21-5836-7652  
Fax : +33-1-47-41-91-73  
Space and Defense Products:  
180 Rue Jean de Guiramand  
13852 Aix-En-Provence cedex 3, France  
Tel: +33(0) 4 4239 3361  
Fax: +33(0) 4 4239 7227  
For a list of representatives in your area, please refer to our Web site at: www.psemi.com  
Data Sheet Identification  
Advance Information  
The information in this data sheet is believed to be reliable.  
However, Peregrine assumes no liability for the use of this  
information. Use shall be entirely at the user’s own risk.  
The product is in a formative or design stage. The data  
sheet contains design target specifications for product  
development. Specifications and features may change in  
any manner without notice.  
No patent rights or licenses to any circuits described in this  
data sheet are implied or granted to any third party.  
Preliminary Specification  
Peregrine’s products are not designed or intended for use in  
devices or systems intended for surgical implant, or in other  
applications intended to support or sustain life, or in any  
application in which the failure of the Peregrine product could  
create a situation in which personal injury or death might occur.  
Peregrine assumes no liability for damages, including  
consequential or incidental damages, arising out of the use of  
its products in such applications.  
The data sheet contains preliminary data. Additional data  
may be added at a later date. Peregrine reserves the right  
to change specifications at any time without notice in order  
to supply the best possible product.  
Product Specification  
The data sheet contains final data. In the event Peregrine  
decides to change the specifications, Peregrine will notify  
customers of the intended changes by issuing a DCN  
(Document Change Notice).  
The Peregrine name, logo, and UTSi are registered trademarks  
and UltraCMOS is a trademark of Peregrine Semiconductor  
Corp.  
Document No. 70-0103-03 www.psemi.com  
©2005 Peregrine Semiconductor Corp. All rights reserved.  
Page 7 of 7  

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