LNK500GN-TL [POWERINT]
Energy Efficient, CV or CV/CC Switcher for Very Low Cost Adapters and Chargers;
| 型号： | LNK500GN-TL |
| 厂家： | 
Power Integrations |
| 描述： | Energy Efficient, CV or CV/CC Switcher for Very Low Cost Adapters and Chargers 开关 光电二极管 |
| 文件： | 总20页 (文件大小：503K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
LNK500
®
LinkSwitch Family
Energy Efficient, CV or CV/CC Switcher for
Very Low Cost Adapters and Chargers
Product Highlights
LinkSwitch
D
S
Cost Effective Linear/RCC Replacement
• Lowest cost and component count, constant voltage (CV)
C
or constant voltage/constant current (CV/CC) solution
• Extremely simple circuit configuration
Wide Range
HV DC Input
DC
Output
(VO)
• Up to 75% lighter power supply reduces shipping cost
• Primary based CV/CC solution eliminates 10 to 20
secondary components for low system cost
• Combined primary clamp, feedback, IC supply, and loop
compensation functions–minimizes external components
• Fully integrated auto-restart for short circuit and open
loop fault protection–saves external component costs
• 42 kHz operation simplifies EMI filter design
(a)
VO
Example Characteristic
VO
Min
Typ
(CV only)
(CV/CC)
5%
10%
Much Higher Performance Over Linear/RCC
• Universal input range allows worldwide operation
• Up to 70% reduction in power dissipation–reduces
enclosure size significantly
• CV/CC output characteristic without secondary feedback
• System level thermal and current limit protection
• Meets all single point failure requirements with only one
additional clamp capacitor
IO
IO
25%*
25%*
(b)
For Circuit
Shown Above
With Optional
Secondary Feedback**
*Estimated tolerance achievable in high volume production
including transformer and other component tolerances.
**See Optional Secondary Feedback section.
PI-3415-021103
• Controlled current in CC region provides inherent soft-start
• Optional opto feedback improves output voltage accuracy
Figure 1. Typical Application – not a Simplified Circuit (a) and
Output Characteristic Tolerance Envelopes (b).
EcoSmart®- Extremely Energy Efficient
• Consumes <300 mW at 265 VAC input with no load
• Meets Blue Angel, Energy Star, and EC requirements
• No current sense resistors–maximizes efficiency
OUTPUT POWER TABLE1
No-Load
Input
Power
230 VAC 15% 85-265 VAC
Min2 Typ2 Min2 Typ2
PRODUCT4
3.2 W 4 W 2.4 W 3 W <300 mW
4.3 W 5.5 W 2.9 W 3.5 W <500 mW3
LNK500
P or G
Applications
• Linear transformer replacement in all ≤3 W applications
• Chargers for cell phones, cordless phones, PDAs, digital
cameras, MP3/portable audio devices, shavers, etc.
• Home appliances, white goods and consumer electronics
• TV standby and other auxiliary supplies
Table 1. Notes: 1. Output power for designs in an enclosed adapter
measured at 50 °C ambient. 2. See Figure 1 (b) for Min (CV only designs)
and Typ (CV/CC charger designs) power points identified on output
characteristic. 3. Uses higher reflected voltage transformer designs for
increased power capability – see KeyApplication Considerations section.
4. See Part Ordering Information.
Description
and enables a much smaller, lighter, and attractive package when
compared with the traditional "brick". With efficiency of up to
75%and<300mWno-loadconsumption,aLinkSwitchsolution
can save the end user enough energy over a linear design to
completely pay for the full power supply cost in less than one
year. LinkSwitch integrates a 700 V power MOSFET, PWM
control,highvoltagestart-up,currentlimit,andthermalshutdown
circuitry, onto a monolithic IC.
LinkSwitch is specifically designed to replace low power linear
transformer/RCC chargers and adapters at equal or lower system
costwithmuchhigherperformanceandenergyefficiency.LNK500
is a lower cost version of the LNK501 with a wider tolerance
output CC characteristic. LinkSwitch introduces a revolutionary
patented topology for the design of low power switching power
supplies that rivals the simplicity and low cost of linear adapters,
March 2003
LNK500
DRAIN
0
1
CONTROL
V
C
INTERNAL
SUPPLY
Z
C
SHUTDOWN/
AUTO-RESTART
CURRENT
LIMIT
ADJUST
SHUNT REGULATOR/
ERROR AMPLIFIER
+
-
÷ 8
-
5.6V
4.7
V
CURRENT LIMIT
COMPARATOR
5.6
V
+
-
+
I
HYSTERETIC
THERMAL
FB
SHUTDOWN
OSCILLATOR
D
MAX
CLOCK
SAW
S
R
Q
-
+
PW
M
COMPARATOR
I
DCS
LEADING
EDGE
BLANKING
LOW
FREQUENCY
OPERATION
R
E
SOURCE
PI-3416-032603
Figure 2. Block Diagram.
Pin Functional Description
LNK500
DRAIN (D) Pin:
S
S
C
S
1
2
8
7
Power MOSFET drain connection. Provides internal operating
current for start-up. Internal current limit sense point for drain
current.
S
S
3
4
CONTROL (C) Pin:
5
D
Error amplifier and feedback current input pin for duty cycle
andcurrentlimitcontrol. Internalshuntregulatorconnectionto
provide internal bias current during normal operation. It is also
used as the connection point for the supply bypass and auto-
restart/compensation capacitor.
P Package (DIP-8B)
G Package (SMD-8B)
PI-3417-111802
Figure 3. Pin Configuration.
SOURCE (S) Pin:
Output MOSFET source connection for high voltage power
return. Primary side control circuit common and reference
point.
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LNK500
LinkSwitch Functional Description
Internal Current Limit
Auto-restart
The duty cycle, current limit and operating frequency
relationships with CONTROL pin current are shown in
Figure 4. Figure 5 shows a typical power supply outline
schematic which is used below to describe the LinkSwitch
operation.
ILIM
Power Up
During power up, as VIN is first applied (Figure 5), the
CONTROL pin capacitor C1 is charged through a switched
high voltage current source connected internally between the
DRAIN and CONTROL pins (see Figure 2). When the
CONTROL pin voltage reaches approximately 5.6 V relative
to the SOURCE pin, the high voltage current source is turned
off, the internal control circuitry is activated and the high
voltage internal MOSFET starts to switch. At this point, the
charge stored on C1 is used to supply the internal consumption
of the chip.
CONTROL Current IC
IDCT
Duty Cycle
77%
Auto-restart
Constant Current (CC) Operation
30%
Astheoutputvoltage,andthereforethereflectedvoltageacross
the primary transformer winding ramp up, the feedback
CONTROL current IC increases. As shown in Figure 4, the
internal current limit increases with IC and reaches ILIM when IC
is equal to IDCT. The internal current limit vs. IC characteristic
isdesignedtoprovideanapproximatelyconstantpowersupply
output current as the power supply output voltage rises.
3.8%
ICD1
CONTROL Current IC
IDCS
Frequency
Auto-restart
Constant Voltage (CV) Operation
fOSC
When IC exceeds IDCS, typically 2 mA (Figure 4), the maximum
duty cycle is reduced. At a value of IC that depends on power
supply input voltage, the duty cycle control limits LinkSwitch
peakcurrentbelowtheinternalcurrentlimitvalue.Atthispoint
the power supply transitions from CC to CV operation. With
minimum input voltage in a typical universal input design, this
transition occurs at approximately 30% duty cycle. R1
(Figure 5) is therefore initially selected to conduct a value of IC
approximately equal to IDCT when VOUT is at the desired value
at the minimum power supply input voltage. The final choice
of R1 is made when the rest of the circuit design is complete.
When the duty cycle drops below approximately 4%, the
frequency is reduced, which reduces energy consumption
under light load conditions.
fOSC(low)
CONTROL Current IC
PI-2799-112102
Figure 4. CONTROL Characteristics.
LinkSwitch
D
S
C
C1
Auto-Restart Operation
When a fault condition, such as an output short circuit or open
loop, prevents flow of an external current into the CONTROL
pin, the capacitor C1 discharges towards 4.7 V. At 4.7 V, auto-
restart is activated, which turns the MOSFET off and puts the
control circuitry in a low current standby mode. In auto-restart,
LinkSwitchperiodicallyrestartsthepowersupplysothatnormal
power supply operation can be restored when the fault is
removed.
C2
R1
VOUT
C4
D2
VIN
D1
R2
PI-2715-112102
Figure 5. Power Supply Outline Schematic.
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LNK500
Figure 5 by the addition of R3, C3 and optocoupler U1. R3
forms a potential divider with R1 to limit the U1 collector
emitter voltage.
The characteristics described above provide an approximate
CV/CC power supply output without the need for secondary
side voltage or current feedback. The output voltage regulation
is influenced by how well the voltage across C2 tracks the
reflected output voltage. This tracking is influenced by the
value of the transformer leakage inductance which introduces
an error. Resistor R2 and capacitor C2 partially filter the
leakage inductance voltage spike reducing this error. This
circuitry, used with standard transformer construction
techniques provides much better output load regulation than a
linear transformer, making this an ideal power supply solution
in many low power applications. If tighter load regulation is
required, an optocoupler configuration can be used while still
employing the constant output current characteristics provided
by LinkSwitch.
On the secondary side, the addition of voltage sense circuit
componentsR4,VR1andU1LEDprovidethevoltagefeedback
signal. In the example shown, a simple Zener (VR1) reference
is used though a precision TL431 reference is typically needed
to provide 5% output voltage tolerancing and cable drop
compensation, if required. R4 provides biasing for VR1. The
regulated output voltage is equal to the sum of the VR1 Zener
voltage plus the forward voltage drop of the U1 LED. R5 is an
optional low value resistor to limit U1 LED peak current due to
output ripple. Manufacturer’s specifications for U1 current and
VR1sloperesistanceshouldbeconsultedtodeterminewhether
R5 is required.
Optional Secondary Feedback
U1 is arranged with collector connected to primary ground and
emitter to the anode of D1. This connection keeps the opto in an
electrically “quiet” position in the circuit. If the opto was
Figure 6 shows a typical power supply outline schematic using
LinkSwitchwithoptocouplerfeedbacktoimproveoutputvoltage
regulation. On the primary side, the schematic differs from
LinkSwitch
D
S
V
OUT
LNK500
C
C1
R5
C2
R1
U1
R4
85-265
VAC
R2
D1
VR1
U1
R3
C3
RTN
PI-3418-111802
Figure 6. Power Supply Outline Schematic with Optocoupler Feedback.
Output Voltage
Inherent
CC to CV
transition
point
Tolerance envelope
without optocoupler
Typical inherent
characteristic without
optocoupler
Voltage
feedback
threshold
Characteristic with
optocoupler
Load variation
during battery
charging
Output Current
PI-2788-092101
Figure 7. Influence of the Optocoupler on the Power Supply Output Characteristic.
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LNK500
instead placed on the cathode side of D1, it would become a
switching node, generating additional common mode EMI
currents through its internal parasitic capacitance.
transistor voltage and dissipation ratings and should be fully
tested before finalizing a design. The values of C2 and C3 are
less important other than to make sure they are large enough to
have very little influence on the impedance of the voltage
division circuit set up by R1, R3 and U1 at the switching
frequency. Normally, the values of C2 and C3 in Figure 6 are
chosen equal to the value of C2 in Figure 5, though the voltage
rating may be reduced depending on the relative values of R1
and R2 discussed above. See Applications section for typical
values of components.
The feedback configuration in Figure 6 is simply a resistive
divider made up of R1 and R3 with D1, R2, C1 and C2 rectifying,
filtering and smoothing the primary winding voltage signal. The
optocoupler therefore effectively adjusts the resistor divider ratio
to control the DC voltage across R1 and therefore, the feedback
current received by the LinkSwitch CONTROL pin.
When the power supply operates in the constant current (CC)
region, for example when charging a battery, the output voltage
isbelowthevoltagefeedbackthresholddefinedbyU1andVR1
and the optocoupler is fully off. In this region, the circuit
behaves exactly as previously described with reference to
Figure 5 where the reflected voltage increases with increasing
output voltage and the LinkSwitch internal current limit is
adjusted to provide an approximate CC output characteristic.
Note that for similar output characteristics in the CC region, the
value of R1 in Figure 5 will be equal to the value of R1+R3 in
Figure 6.
Figure 7 shows the influence of optocoupler feedback on the
output characteristic. The envelope defined by the dashed lines
represent the worst case power supply DC output voltage and
current tolerances (unit-to-unit and over the input voltage
range) if an optocoupler is not used. A typical example of an
inherent (without optocoupler) output characteristic is shown
dotted. This is the characteristic that would result if U1, R4 and
VR1 were removed. The optocoupler feedback results in the
characteristic shown by the solid line. The load variation arrow
in Figure 7 represents the locus of the output characteristic
normally seen during a battery charging cycle. The two
characteristics are identical as the output voltage rises but then
separate as shown when the voltage feedback threshold is
reached. This is the characteristic seen if the voltage feedback
threshold is above the output voltage at the inherent CC to CV
transition point also indicated in Figure 7.
When the output reaches the voltage feedback threshold set by
U1 and VR1, the optocoupler turns on. Any further increase in
the power supply output voltage results in the U1 transistor
currentincreasing,whichincreasesthepercentageofthereflected
voltage appearing across R1. The resulting increase in the
LinkSwitchCONTROLcurrentreducesthedutycycleaccording
toFigure4andtherefore,maintainstheoutputvoltageregulation.
Figure 8 shows a case where the voltage feedback threshold is
set below the voltage at the inherent CC to CV transition point.
In this case, as the output voltage rises, the secondary feedback
circuit takes control before the inherent CC to CV transition
occurs. In an actual battery charging application, this simply
limits the output voltage to a lower value.
Normally, R1 and R3 are chosen to be equal in value. However,
increasing R3 (while reducing R1 to keep R1 + R3 constant)
increasesloopgainintheCVregion,improvingloadregulation.
The extent to which R3 can be increased is limited by opto
Output Voltage
Tolerance envelope
without optocoupler
Inherent
CC to CV
transition
point
Typical inherent
characteristic without
optocoupler
Voltage
feedback
threshold
VO(MAX)
Characteristic with
optocoupler
Power supply peak
output power curve
Load variation
during battery
charging
Characteristic observed with
load variation often applied during
laboratory bench testing
Output Current
PI-2790-112102
Figure 8. Output Characteristic with Optocoupler Regulation (Reduced Voltage Feedback Threshold).
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LNK500
However, in laboratory bench tests, it is often more convenient
totestthepowersupplyoutputcharacteristicstartingfromalow
output current and gradually increasing the load. In this case,
the optocoupler feedback regulates the output voltage until the
peakoutputpowercurveisreachedasshowninFigure8. Under
these conditions, the output current will continue to rise until
the peak power point is reached and the optocoupler turns off.
Once the optocoupler is off, the CONTROL pin feedback
current is determined only by R1 and R3 and the output current
therefore folds back to the inherent CC characteristic as shown.
Since this type of load transition does not normally occur in a
batterycharger,theoutputcurrentneverovershootstheinherent
constant current value in the actual application.
The secondary of the transformer is rectified and filtered by D6
and C5 to provide the DC output to the load.
LinkSwitch dramatically simplifies the secondary side by
controlling both the constant voltage and constant current
regions entirely from the primary side. This is achieved by
monitoring the primary-side VOR (voltage output reflected).
Diode D5 and capacitor C4 form the primary clamp network.
Thisbothlimitsthepeakdrainvoltageduetoleakageinductance
and provides a voltage across C4, which is equal to the VOR plus
an error due to the parasitic leakage inductance. Resistor R2
filters the leakage inductance spike and reduces the error in the
valueoftheVOR. ResistorR1convertsthisvoltageintoacurrent
that is fed into the CONTROL pin to regulate the output.
In some applications it may be necessary to avoid any output
currentovershoot,independentofthedirectionof loadvariation.
To achieve this goal, the minimum voltage feedback threshold
should be set at VO(MAX). This will ensure that the voltage at the
CC to CV transition point of the inherent characteristic will
always occur below the voltage feedback threshold. However,
theoutputvoltagetoleranceisthenincreased, sincetheinherent
CV characteristic tolerance below VO(MAX) is added to the
tolerance of the optocoupler feedback circuit.
During CV operation the output is regulated through control of
the duty cycle. As the current into the CONTROL pin exceeds
approximately 2 mA, the duty cycle begins to reduce, reaching
30% at a CONTROL pin current of 2.3 mA.
Under light or no-load conditions, when the duty cycle reaches
approximately 4%, the switching frequency is reduced to lower
energy consumption.
Applications Example
If the output load is increased beyond the peak power point
(defined by 0.5·L·I2·f), the output voltage and VOR falls. The
reduced CONTROL pin current will lower the internal
LinkSwitch current limit (current limit control) providing an
approximatelyconstantcurrentoutputcharacteristic.Iftheload
is increased and the CONTROL pin current falls below
approximately 1 mA, the CONTROL pin capacitor C3 will
discharge and the supply enters auto-restart.
The circuit shown in Figure 9 shows a typical implementation
of an approximate constant voltage / constant current (CV/CC)
charger using LinkSwitch. This design delivers 2.75 W with a
nominal peak power point voltage of 5.5 V and a current of
500 mA. Efficiency is greater than 70% over an input range of
85 VAC to 265 VAC.
The bridge rectifier, BR1, rectifies the AC input. Resistor, RF1
is a fusible type providing protection from primary side short
circuits. The rectified AC is smoothed by C1 and C2 with
inductor L1 forming a pi-filter in conjunction with C1 and C2
to filter conducted EMI. The switching frequency of 42 kHz
allows such a simple EMI filter to be used without the need for
a Y capacitor while still meeting international EMI standards.
Current limit control removes the need for any secondary side
current sensing components (sense resistor, transistor, opto
coupler and associated components). Removing the secondary
sense circuit dramatically improves efficiency, giving the
associated benefit of reduced enclosure size.
Key Application Considerations
Design Output Power
When power is applied, high voltage DC appears at the DRAIN
pin of LinkSwitch (U1). The CONTROL pin capacitor C3 is then
chargedthroughaswitchedhighvoltagecurrentsourceconnected
internally between the DRAIN and CONTROL pins. When the
CONTROL pin reaches approximately 5.6 V relative to the
SOURCE pin, the internal current source is turned off. The
internalcontrolcircuitryisactivatedandthehighvoltageMOSFET
starts to switch, using the energy in C3 to power the IC.
Table 1 (front page) provides guidance for the maximum
continuous output power from a given device under the
conditions specified.
The output of chargers (CV/CC) are normally specified at the
typical output peak power point. Conversely, non-charger
applications (CV only, which applies to many converters such
as adapters, standby/auxiliary supplies and other embedded
AC-DC converters) where CC operation is not required, are
normally specified at the minimum output power they will
supply under worst case conditions.
When the MOSFET is on, the high voltage DC bus is connected
to one end of the transformer primary, the other end being
connected to primary return. As the current ramps in the
primary of flyback transformer T1, energy is stored. This
energy is delivered to the output when the MOSFET turns off
each switching cycle.
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LNK500
U1
LNK500
LinkSwitch
L1
1 mH
T1
5.5 V,
500 mA
1
4
D
S
5
6
C3
0.22 µF
50 V
C
15 T
#30 AWG
TIW
C5
470 µF
10 V
116 T
#34 AWG
BR1
RF1
10 Ω 1 W
Fusible
1 A, 600 V
C4
0.1 µF
100 V
R1
20.5 kΩ
1%
RTN
3
P
C1
C2
D6
11DQ06
85-265
VAC
4.7 µF
400 V
4.7 µF
400 V
EE13
= 2.55 mH
D5
L
1N4937
R2
100 Ω
PERFORMANCE SUMMARY
Output Power:
Efficiency:
2.75 W
≥72%
No Load
Consumption:
260 mW, 230 VAC
200 mW, 115 VAC
PI-3419-111802
Figure 9. 2.75 W Constant Voltage/Constant Current (CV/CC) Charger using LinkSwitch.
10
9
V
V
V
V
IN = 85 VAC
IN = 115 VAC
IN = 185 VAC
IN = 265 VAC
8
7
6
5
4
3
2
1
0
0
100
200
300
400
500
600
700
Output Current (mA)
Figure 10. Measured Output Characteristic of the Circuit in Figure 9.
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LNK500
To aid the designer, the power table reflects these differences.
For CV/CC designs the typical power column and for CV
designs the minimum power column should be used,
respectively. Additionally, figures are based on the following
conditions:
As primary inductance tolerance is part of the expression that
determines the peak output power point (start of the CC
characteristic) this parameter should be well controlled. For an
estimatedoverallconstantcurrenttoleranceof 25%theprimary
inductancetoleranceshouldbe 10%orbetter. Thisisachievable
using standard low cost, center leg gapping techniques where
the gap size is typically 0.08 mm or larger. Smaller gap sizes
are possible but require non-standard, tighter ferrite AL
tolerances.
1. The minimum DC input bus voltage is 90 V or higher. This
corresponds to a filter capacitor of 3 µF/W for universal
input and 1 µF/W for 230 VAC or 115 VAC input with
doubler input stage.
2. Design is a discontinuous mode flyback converter.
Continuous mode designs can result in loop instability and
are therefore not recommended. For typical output power
figures, nominal values for primary inductance and I2f are
assumed. For minimum output power figures, primary
inductance minus 10% and the minimum I2f value are
assumed. For no-load consumption <300 mW, a VOR in the
range 40 V to 60 V is assumed. For no-load consumption
<500 mW and higher output power capability, a VOR in the
range 60 V to 100 V is assumed.
Other gapping techniques such as film gapping allow tighter
tolerances ( 7% or better) with associated improvements in the
tolerance of the peak power point. Please consult your
transformer vendor for guidance.
Core gaps should be uniform. Uneven core gapping, especially
with small gap sizes, may cause variation in the primary
inductance with flux density (partial saturation) and make the
constant current region non-linear. To verify uniform gapping
it is recommended that the primary current wave-shape be
examined while feeding the supply from a DC source. The
gradient is defined as di/dt = V/L and should remain constant
throughout the MOSFET on time. Any change in gradient of
the current ramp is an indication of uneven gapping.
3. A secondary output of 5 V with a Schottky rectifier diode.
4. Assumed efficiency of 70%.
5. The part is board mounted with SOURCE pins soldered to
sufficient area of copper to keep the die temperature at or
below 100 °C.
6. An output cable with a total resistance of 0.2 Ω.
Measurements made using a LCR bridge should not be solely
reliedupon;typicallytheseinstrumentsonlymeasureatcurrents
of a few milliamps. This is insufficient to generate high enough
flux densities in the core to show uneven gapping.
In addition to the thermal environment (sealed enclosure,
ventilated, open frame, etc), the maximum power capability of
LinkSwitch in a given application depends on transformer core
size, efficiency, primary inductance tolerance, minimum
specifiedinputvoltage,inputstoragecapacitance,outputvoltage,
output diode forward drop, etc., and can be different from the
values shown in Table 1.
ForatypicalEE13coreusingcenterleggapping,a0.08mmgap
(ALG of 190 nH/t2) allows a primary inductance tolerance of
10% to be maintained in standard high volume production.
This allows the EE13 to be used in designs up to 2.75 W with
lessthan300mWno-loadconsumption. Iffilmgappingisused
then this increases to 3 W. Moving to a larger core, EE16 for
example, allows a 3 W output with center leg gapping.
Transformer Design
To provide an approximately CV/CC output, the transformer
should be designed to be discontinuous; all the energy stored in
the transformer is transferred to the secondary during the
MOSFET off time. Energy transfer in discontinuous mode is
independent of line voltage.
The transformer turns ratio should be selected to give a VOR
(output voltage reflected through secondary to primary turns
ratio) of 40 V to 60 V. In designs not required to meet 300 mW
no-load consumption targets, the transformer can be designed
with higher VOR as long as discontinuous mode operation is
maintained. This increases the output power capability. For
example, a 230 VAC input design using an EE19 transformer
core with VOR >70 V, is capable of delivering up to 5.5 W
typical output power. Note: the linearity of the CC region of the
power supply output characteristic is influenced by VOR. If this
isanimportantaspectoftheapplication,theoutputcharacteristic
should be checked before finalizing the design.
Thepeakpowerpointpriortoenteringconstantcurrentoperation
isdefinedbythemaximumpowertransferredbythetransformer.
The power transferred is given by the expression P = 0.5·L·I2·f,
whereListheprimaryinductance, I2 istheprimarypeakcurrent
squared and f is the switching frequency.
To simplify analysis, the data sheet parameter table specifies an
I2f coefficient. This is the product of current limit squared and
switching frequency normalized to the feedback parameter
IDCT. This provides a single term that specifies the variation of
the peak power point in the power supply due to LinkSwitch.
Output Characteristic Variation
Boththedevicetoleranceandexternalcircuitgoverntheoverall
tolerance of the LinkSwitch output characteristic. Estimated
peak power point tolerances for a 3 W design are 10% for
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LNK500
voltage and 25% for current limit for overall variation in high
volume manufacturing. This includes device and transformer
tolerances and line variation. Lower power designs may have
poorer constant current linearity.
time during start-up for the output voltage to reach regulation.
Any capacitor type is acceptable with a voltage rating of 10 V
or above.
Feedback Resistor – R1
As the output load reduces from the peak power point, the
output voltage will tend to rise due to tracking errors compared
to the load terminals. Sources of these errors include the output
cabledrop,outputdiodeforwardvoltageandleakageinductance,
which is the dominant cause. As the load reduces, the primary
operating peak current reduces, together with the leakage
inductance energy, which reduces the peak charging of the
clamp capacitor. With a primary leakage inductance of 50 µH,
the output voltage typically rises 30% over a 100% to 5% load
change.
The value of R1 is selected to give a feedback current into the
CONTROL pin of approximately 2.3 mA at the peak output
power point of the supply. The actual value depends on the VOR
selected during design. Any 0.25 W resistor is suitable.
Output Diode – D2
Either PN fast, PN ultra-fast or Schottky diodes can be used
depending on the efficiency target for the supply, Schottky
diodes giving higher efficiency then PN diodes. The diode
voltage rating should be sufficient to withstand the output
voltage plus the input voltage transformed through the turns
ratio (a typical VOR of 50 V requires a diode PIV of 50 V).
Slow recovery diodes are not recommended (1N400X types).
At very light or no-load, typically less than 2 mA of output
current, the output voltage rises due to leakage inductance peak
chargingofthesecondary.Thisvoltagerisecanbereducedwith
asmallpreloadwithlittlechangetono-loadpowerconsumption.
Output Capacitor – C4
Capacitor C4 should be selected such that its voltage and ripple
current specifications are not exceeded.
The output voltage load variation can be improved across the
whole load range by adding an optocoupler and secondary
reference (Figure 6). The secondary reference is designed to
only provide feedback above the normal peak power point
voltage to maintain the correct constant current characteristic.
LinkSwitch Layout considerations
Primary Side Connections
Since the SOURCE pins in a LinkSwitch supply are switching
nodes, the copper area connected to SOURCE together with
C1, C2 and R1 (Figure 5) should be minimized, within the
thermal contraints of the design, to reduce EMI coupling.
Component Selection
The schematic shown in Figure 5 outlines the key components
needed for a LinkSwitch supply.
The CONTROL pin capacitor C1 should be located as close as
possible to the SOURCE and CONTROL pins.
Clamp diode – D1
Diode D1 should be either a fast (trr <250 ns) or ultra-fast type
(trr <50 ns), with a voltage rating of 600 V or higher. Fast
recovery types are preferred, being typically lower cost. Slow
diodes are not recommended; they can allow excessive DRAIN
ringing and the LinkSwitch to be reverse biased.
To minimize EMI coupling from the switching nodes on the
primary to both the secondary and AC input, the LinkSwitch
shouldbepositionedawayfromthesecondaryofthetransformer
and AC input.
Clamp Capacitor – C2
Routing the primary return trace from the transformer primary
around LinkSwitch and associated components further reduces
coupling.
Capacitor C2 should be a 0.1 µF, 100 V capacitor. Low cost
metallized plastic film types are recommended. The tolerance
of this part has a very minor effect on the output characteristic
so any of the standard 5%, 10% or 20% tolerances are
acceptable. Ceramic capacitors are not recommended. The
common dielectrics used such as Y5U or Z5U are not stable
with voltage or temperature and may cause output instability.
Ceramic capacitors with high stability dielectrics may be used
but are expensive compared to metallized film types.
Y capacitor
If a Y capacitor is required, it should be connected close to the
transformer secondary output return pin(s) and the primary
bulk capacitor negative return. Such placement will maximize
the EMI benefit of the Y capacitor and avoid problems in
common-mode surge testing.
CONTROL Pin Capacitor – C1
Capacitor C1 is used during start-up to power LinkSwitch and
setstheAuto-Restartfrequency. Fordesignsthathaveabattery
load this component should have a value of 0.22 µF and for
resistive loads a value of 1 µF. This ensures there is sufficient
B
3/03
9
LNK500
Quick Design Checklist
3. Thermal check – At peak output power, minimum input
voltage and maximum ambient temperature, verify that the
temperature specifications are not exceeded for LinkSwitch,
transformer, output diode and output capacitors. Enough
thermal margin should be allowed for part-to-part variation
of the RDS(ON) of LinkSwitch as specified in the data sheet.
Under low line, peak power, a maximum LinkSwitch
SOURCE pin temperature of 100 °C is recommended to
allow for these variations.
Aswithanypowersupplydesign,allLinkSwitchdesignsshould
be verified on the bench to make sure that component
specifications are not exceeded under worst case conditions.
Note:Ina LinkSwitch circuit, theSOURCEisaswitchingnode.
This should be taken into consideration during testing.
Oscilloscope measurements should be made with probe
grounded to DC voltages such as primary return or DC rail but
not to SOURCE. Power supply input voltage should always be
suppliedusinganisolationtransformer. Thefollowingminimum
set of tests is strongly recommended:
4. Centered output characteristic – Using a transformer with
nominal primary inductance and at an input voltage midway
between low and high line, verify that the peak power point
occursatthedesirednominaloutputcurrent, withthecorrect
output voltage. If this does not occur then the design should
be refined to ensure the overall tolerance limits are met.
1. Maximum drain voltage – Verify that VDS does not exceed
675 V at highest input voltage and peak output power.
2. Maximumdraincurrent–Atmaximumambienttemperature,
maximum input voltage and peak output power, verify drain
current waveforms at start-up for any signs of transformer
saturation and excessive leading edge current spikes.
LinkSwitch has a minimum leading edge blanking time of
200 ns to prevent premature termination of the on-cycle.
Verify that the leading edge current spike event is below
current limit at the end of the 200 ns blanking period.
Design Tools
Up to date information on design tools can be found at the
Power Integrations Web site: www.powerint.com.
Input Filter
Capacitor
D
S
C
+
LinkSwitch
HV DC
Input
-
S
S
S
S
Transformer
Y1-
Capacitor
-
DC Out
+
Output
Capacitor
PI-2900-070202
Figure 11. Recommended Circuit Board Layout for LinkSwitch using P Package.
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LNK500
ABSOLUTE MAXIMUM RATINGS(1,4)
Notes:
DRAIN Voltage ........................................ -0.3 V to 700 V
DRAIN Peak Current .............................................400 mA
CONTROL Voltage ..................................... - 0.3 V to 9 V
CONTROL Current (not to exceed 9 V)................100 mA
Storage Temperature ................................-65 °C to 150 °C
Operating Junction Temperature(2) ...........-40 °C to 150 °C
Lead Temperature(3) ................................................ 260 °C
1. All voltages referenced to SOURCE, TA = 25 °C.
2. Normally limited by internal circuitry.
3. 1/16" from case for 5 seconds.
4. Maximum ratings specified may be applied, one at a time,
without causing permanent damage to the product.
Exposure to Absolute Maximum Rating conditions for
extended periods of time may affect product reliability.
THERMAL IMPEDANCE
Notes:
Thermal Impedance: P/G Package:
(θJA) .............. 70 °C/W(2), 55 °C/W(3)
(θJC)(1) ................................. 11 °C/W
1. Measured on the SOURCE pin close to plastic interface.
2. Soldered to 0.36 sq. inch (232 mm2), 2 oz. (610 gm/m2) copper clad.
3. Soldered to 1 sq. inch (645 mm2). 2 oz. (610 gm/m2) copper
clad.
Conditions
(Unless Otherwise Specified)
SOURCE = 0 V; TJ = -40 °C to 125 °C
See Figure 12
Parameter
Symbol
Min
Typ Max
Units
CONTROL FUNCTIONS
Switching
fOSC
IC = IDCT, TJ = 25 °C
34.5
24
42
30
49.5
36
kHz
kHz
Frequency
Duty Cycle = DCLF
Low Switching
Frequency
fOSC(LOW)
TJ = 25 °C
Duty Cycle at
Low Switching
Frequency
Frequency Switching from fOSC to
DCLF
2.4
3.8
5.2
%
%
fOSC(LOW), TJ = 25 °C
Low Frequency
Duty Cycle Range
Frequency = fOSC(LOW), TJ = 25 °C
1.8
74
3.15
77
4.5
80
DC(RANGE)
Maximum
Duty Cycle
%
DCMAX
IC = 1.5 mA
PWM
Gain
%/µA
DCREG
IC = IDCT, TJ = 25 °C
-0.45
-0.35
-0.25
CONTROL Pin
Current at 30%
Duty Cycle
TJ = 25 °C
See Figure 4
IDCT
2.21
2.30
2.39
mA
CONTROL Pin
Voltage
5.5
60
5.75
90
6
V
VC(IDCT)
IC = IDCT
Dynamic
Impedance
ZC
120
Ω
IC = IDCT, TJ = 25 °C
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3/03
11
LNK500
Conditions
(Unless Otherwise Specified)
SOURCE = 0 V; TJ = -40 °C to 125 °C
See Figure 12
Parameter
Symbol
Min
Typ Max
Units
SHUTDOWN/AUTO-RESTART
VC = 0 V
-4.5
-2.3
-3.25
-1.3
1.06
0.9
-2
CONTROL Pin
IC(CH)
mA
mA
TJ = 25 °C
Charging Current
VC = 5.15 V
-0.3
1.14
1.1
ICD1
ICD2
TJ = 25°C
TJ = 25°C
Output MOSFET Enabled 0.95
Control/Supply/
Discharge Current
Output MOSFET Disabled
0.7
Auto-restart
5.6
VC(AR)
V
V
Threshold Voltage
Auto-restart
Hysteresis Voltage
0.9
8
VC(AR)hyst
Short circuit applied at
power supply output
Auto-restart
Duty Cycle
%
DC(AR)
Auto-restart
Frequency
Short circuit applied at power supply
output, C1 = 0.22 µF (See Figure 12)
300
Hz
f(AR)
CIRCUIT PROTECTION
TJ = 25°C
di/dt = 90 mA/µs
See Note C
Self-protection
ILIM
mA
228
254
280
Current Limit
TJ = 25°C
di/dt = 90 mA/µs
See Notes C, D
I2 f
I2 f Coefficient
A2Hz
2412
2710
3008
TJ = 25°C
IC = ICD1
Current Limit at
Auto-restart
ILIM(AR)
mA
V
158
2.75
300
100
135
70
Power Up Reset
Threshold Voltage
VC(RESET)
tLEB
1.5
4.0
TJ = 25°C
IC = IDCT
Leading Edge
Blanking Time
ns
ns
200
Current Limit
Delay
tIL(D)
TJ = 25°C
Thermal Shutdown
Temperature
IC = IDCT
125
°C
°C
Thermal Shutdown
Hysteresis
B
3/03
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LNK500
Conditions
(Unless Otherwise Specified)
SOURCE = 0 V; TJ = -40 °C to 125 °C
See Figure 12
Parameter
Symbol
Min
Typ Max
Units
OUTPUT
TJ = 25 °C
ID = 25mA
28
42
32
ON-State
Resistance
RDS(ON)
Ω
TJ = 100 °C
48
OFF-State Drain
Leakage Current
See Note B, VC = 6.2 V
VD = 560 V, TA = 125°C
IDSS
µA
50
See Note B
VC = 6.2 V, TA = 25°C
Breakdown
Voltage
700
36
V
V
BVDSS
DRAIN Supply
Voltage
50
See Note E
NOTES:
A. For specifications with negative values, a negative temperature coefficient corresponds to an increase in magnitude with
increasing temperature, and a positive temperature coefficient corresponds to a decrease in magnitude with increasing
temperature.
B. Breakdown voltage may be checked against minimum BVDSS specification by ramping the DRAIN pin voltage up to but not
exceeding minimum BVDSS
.
C. IC is increased gradually to obtain maximum current limit at di/dt of 90 mA/µs. Increasing IC further would terminate the cycle
through duty cycle control.
D. This parameter is normalized to IDCT to correlate to power supply output current (it is multiplied by IDCT(nominal)/IDCT).
E. It is possible to start up and operate LinkSwitch at DRAIN voltages well below 36 V. However, the CONTROL pin charging
current is reduced, which affects start-up time, auto-restart frequency, and auto-restart duty cycle. Refer to the characteristic
graph on CONTROL pin charge current (IC) vs. DRAIN voltage (Figure 13) for low voltage operation characteristics.
B
3/03
13
LNK500
LinkSwitch
750 Ω
10 kΩ
S
S
D
S1
S
C
S
S
S2
40 V
0.22 µF
40 V
PI-2894-062802
Figure 12. LinkSwitch General Test Circuit.
2
VC = 5.15 V
t
2
1.6
1.2
t
1
HV
90%
90%
t
t
0.8
0.4
0
DRAIN
VOLTAGE
1
D =
2
10%
0 V
PI-2048-050798
0
20
40
60
80
100
DRAIN Voltage (V)
Figure 14. Duty Cycle Measurement.
Figure 13. IC vs. DRAIN Voltage.
120
100
80
90
80
70
60
50
40
30
20
10
60
40
20
0
0
2.15
2.25
2.35
2.45
2.55
2.65
0.0 2.0 4.0 6.0 8.0 10.0 12.0 14.0
Control Pin Voltage (V)
Control Pin Current (mA)
Figure 16. Duty Cycle vs. CONTROL Pin Current.
Figure 15. CONTROL Pin I-V Characteristic.
B
3/03
14
LNK500
Typical Performance Characteristics
1.1
1.200
1.000
0.800
0.600
0.400
0.200
1.0
0.9
0.000
-50 -25
0
25 50 75 100 125 150
-50
0
50
100
150
Junction Temperature (°C)
Junction Temperature (°C)
Figure 18. Switching Frequency vs. Temperature.
Figure 17. Breakdown Voltage vs. Temperature.
1.200
1.000
0.800
0.600
0.400
0.200
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0.000
-50 -25
0
25 50 75 100 125 150
-50 -25
0
25 50 75 100 125 150
Junction Temperature (°C)
Junction Temperature (°C)
Figure 20. I2f Coefficient vs. Temperature.
Figure 19. Current Limit vs. Temperature.
1.2
1
1.200
1.000
0.800
0.600
0.400
0.200
0.8
0.6
0.4
0.2
0
0.000
-50
0
50
Temperature (°C)
Figure 22. PWM Gain vs. Temperature.
100
150
-50
0
50
100
150
Junction Temperature (°C)
Figure 21. IDCT vs. Temperature.
B
3/03
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LNK500
Typical Performance Characteristics (cont.)
300
TCASE=25 °C
TCASE=100 °C
250
200
150
100
50
0
0
2
4
6
8
10
Drain Voltage (V)
Figure 23. Output Characteristics (DRAIN Current vs.
DRAIN Voltage.
B
3/03
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LNK500
PART ORDERING INFORMATION
LinkSwitch Product Family
Series Number
Package Identifier
G
P
Plastic Surface Mount DIP
Plastic DIP
Package/Lead Options
Blank Standard Configuration
LNK 500 G - TL
TL
Tape & reel in 1000 pc multiples, G package only
DIP-8B
⊕
D S .004 (.10)
Notes:
1. Package dimensions conform to JEDEC specification
MS-001-AB (Issue B 7/85) for standard dual-in-line (DIP)
package with .300 inch row spacing.
-E-
2. Controlling dimensions are inches. Millimeter sizes are
shown in parentheses.
3. Dimensions shown do not include mold flash or other
protrusions. Mold flash or protrusions shall not exceed
.006 (.15) on any side.
.240 (6.10)
.260 (6.60)
4. Pin locations start with Pin 1, and continue counter-clock-
wise to Pin 8 when viewed from the top. The notch and/or
dimple are aids in locating Pin 1. Pin 6 is omitted.
5. Minimum metal to metal spacing at the package body for
the omitted lead location is .137 inch (3.48 mm).
6. Lead width measured at package body.
Pin 1
-D-
.367 (9.32)
.387 (9.83)
7. Lead spacing measured with the leads constrained to be
perpendicular to plane T.
.057 (1.45)
.068 (1.73)
(NOTE 6)
.125 (3.18)
.145 (3.68)
.015 (.38)
MINIMUM
-T-
SEATING
PLANE
.008 (.20)
.015 (.38)
.120 (3.05)
.140 (3.56)
.300 (7.62) BSC
(NOTE 7)
.300 (7.62)
.390 (9.91)
.100 (2.54) BSC
.048 (1.22)
.065 (1.65)
P08B
.014 (.36)
.022 (.56)
⊕
T E D S .010 (.25) M
PI-2551-121602
B
3/03
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LNK500
SMD-8B
Notes:
⊕
D S .004 (.10)
1. Controlling dimensions are
inches. Millimeter sizes are
shown in parentheses.
2. Dimensions shown do not
include mold flash or other
protrusions. Mold flash or
protrusions shall not exceed
.006 (.15) on any side.
3. Pin locations start with Pin 1,
and continue counter-clock
Pin 8 when viewed from the
top. Pin 6 is omitted.
-E-
.372 (9.45)
.388 (9.86)
.240 (6.10)
.260 (6.60)
.420
.010 (.25)
⊕
E S
.046 .060 .060 .046
4. Minimum metal to metal
spacing at the package body
for the omitted lead location
is .137 inch (3.48 mm).
5. Lead width measured at
package body.
6. D and E are referenced
datums on the package
body.
.080
Pin 1
Pin 1
-D-
.086
.186
.100 (2.54) (BSC)
.286
.367 (9.32)
.387 (9.83)
Solder Pad Dimensions
.057 (1.45)
.068 (1.73)
(NOTE 5)
.125 (3.18)
.145 (3.68)
.004 (.10)
.032 (.81)
.037 (.94)
.048 (1.22)
.065 (1.65)
°
°
.009 (.23)
0 - 8
.036 (0.91)
.044 (1.12)
.004 (.10)
.012 (.30)
G08B
PI-2546-101102
B
3/03
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LNK500
B
3/03
19
LNK500
Revision Notes
Date
3/03
B
1) Final release data sheet
For the latest updates, visit our Web site: www.powerint.com
PATENT INFORMATION
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not
assume any liability arising from the use of any device or circuit described herein, nor does it convey any license under its patent rights or the rights of others.
The products and applications illustrated herein (including circuits external to the products and transformer construction) may be covered by one or more U.S.
and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations’ patents
may be found at www.powerint.com.
LIFE SUPPORT POLICY
POWER INTEGRATIONS' PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS, INC. As used herein:
1. Life support devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when
properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or effectiveness.
ThePIlogo, TOPSwitch, TinySwitch, LinkSwitchandEcoSmartareregisteredtrademarksofPowerIntegrations, Inc.
PI Expert and DPA-Switch are trademarks of Power Integrations, Inc. ©Copyright 2003, Power Integrations, Inc.
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B
3/03
20
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