AT970S34 [POSEICO]
PHASE CONTROL THYRISTOR;
| 型号： | AT970S34 |
| 厂家： | 
POWER SEMICONDUCTORS |
| 描述： | PHASE CONTROL THYRISTOR |
| 文件： | 总6页 (文件大小：714K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
POSEICO SPA
Via Pillea 42-44, 16153 Genova - ITALY
Tel. + 39 010 8599400 - Fax + 39 010 8682006
Sales Office:
Tel. + 39 010 8599400 - sales@poseico.com
PHASE CONTROL THYRISTOR
AT970
Repetitive voltage up to
Mean on-state current
Surge current
3400 V
3872 A
68 kA
FINAL SPECIFICATION
Feb. 17 - Issue: 2
Tj
[°C]
Symbol
Characteristic
Conditions
Value
Unit
BLOCKING
V RRM
V RSM
V DRM
I RRM
I DRM
Repetitive peak reverse voltage
Non-repetitive peak reverse voltage
Repetitive peak off-state voltage
Repetitive peak reverse current
Repetitive peak off-state current
125
125
125
125
125
3400
3500
3400
300
V
V
V
V=VRRM
V=VDRM
mA
mA
300
CONDUCTING
I T (AV)
I T (AV)
I TSM
I² t
Mean on-state current
Mean on-state current
Surge on-state current
I² t
180° sin, 50 Hz, Th=55°C, double side cooled
180° sin, 50 Hz, Tc=85°C, double side cooled
sine wave, 10 ms
3872
3027
A
A
125
68,0
kA
without reverse voltage
23120 x1E3
1,95
A²s
V
V T
On-state voltage
On-state current =
7500 A
25
V T(TO)
r T
Threshold voltage
On-state slope resistance
125
125
1,12
V
0,112
mohm
SWITCHING
di/dt
dv/dt
td
Critical rate of rise of on-state current, min.
Critical rate of rise of off-state voltage, min.
Gate controlled delay time, typical
Circuit commutated turn-off time, typical
Reverse recovery charge
From 67% VDRM, gate 10V 5ohm
Linear ramp up to 67% of VDRM
VD=100V, gate source 10V, 10 ohm , tr=5 µs
dv/dt = 20 V/µs linear up to 75% VDRM
di/dt=-20 A/µs, I= 2150 A
125
125
25
200
A/µs
V/µs
µs
1000
.
tq
700
µs
Q RR
I RR
I H
125
.
µC
A
Peak reverse recovery current
Holding current, typical
VR= 50 V
.
VD=5V, gate open circuit
25
25
500
1500
mA
mA
I L
Latching current, typical
VD=12V, tp=50µs
GATE
V GT
Gate trigger voltage
VD=12V
25
25
3,5
250
0,25
10
V
mA
V
I GT
Gate trigger current
VD=12V
V GD
V FGM
Non-trigger gate voltage, min.
Peak gate voltage (forward)
Peak gate current
VD=67%VDRM
125
V
I
FGM
10
A
V RGM
P GM
P G
Peak gate voltage (reverse)
Peak gate power dissipation
Average gate power dissipation
10
V
Pulse width 100 µs
150
3
W
W
MOUNTING
R th(j-c)
Thermal impedance, DC
Junction to case, double side cooled
Case to heatsink, double side cooled
6,0
1,5
°C/kW
°C/kW
R th(c-h)
Thermal impedance
T j
F
Operating junction temperature
Mounting force
-30 / 125
80.0 / 100.0
3000
°C
kN
g
Mass
ORDERING INFORMATION : AT970 S 34
VDRM&VRRM/100
standard specification
Page 1 of 6
AT970 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION Feb. 17 - Issue: 2
DISSIPATION CHARACTERISTICS
SQUARE WAVE
Th [°C]
130
120
110
100
90
80
70
60
30°
120°
180°
DC
90°
60°
50
40
0
1000
2000
3000
4000
5000
6000
IF(AV) [A]
PF(AV) [W]
10000
9000
8000
7000
6000
5000
4000
3000
2000
1000
0
DC
180°
120°
90°
60°
30°
0
1000
2000
3000
4000
5000
6000
IF(AV) [A]
Page 2 of 6
AT970 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION Feb. 17 - Issue: 2
DISSIPATION CHARACTERISTICS
SINE WAVE
Th [°C]
130
120
110
100
90
80
70
60
180°
60°
90°
120°
30°
50
40
0
1000
2000
3000
4000
5000
IF(AV) [A]
PF(AV) [W]
9000
8000
7000
6000
5000
4000
3000
2000
1000
0
180°
120°
90°
60°
30°
0
1000
2000
3000
4000
5000
IF(AV) [A]
Page 3 of 6
AT970 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION Feb. 17 - Issue: 2
REVERSE RECOVERY CHARGE
Tj = 125°C - IT = 3000 A
di/dt [A/µs]
REVERSE RECOVERY CURRENT
Tj = 125°C - IT = 3000 A
di/dt [A/µs]
Page 4 of 6
AT970 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION Feb. 17 - Issue: 2
SURGE CHARACTERISTIC
Tj = 125 °C
ON-STATE CHARACTERISTIC
Tj = 125 °C
14000
12000
10000
8000
6000
4000
2000
0
80
70
60
50
40
30
20
10
0
0,6
1,1
1,6
2,1
2,6
1
10
100
On-state Voltage [V]
n° cycles
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
7
6
5
4
3
2
1
0
∆Rth [°K/kW]
Wave
Square 0,39
°180
°120
0,71
1,06
°90
1,01
1,59
°60
1,52
2,61
°30
2,54
4,04
Sine 0,75
0,0001
0,01
1
100
t[s]
푛
푡
푍푡ℎ 푗−푐 ꢀ = 퐴푖 ∗ ꢂ ꢃ 푒−
휏
ꢄ
푖ꢁ1
i
1
2
3
4
Cathode terminal type DIN 46244 - A 4.8 - 0.8
Gate terminal type AMP 60598 - 1
Ai [°C/kW]
2,738
2,4
1,779
1,70
1,186
0,16
0,297
0,001
τi [s]
Distributed by
All the characteristics given in this data sheet are guaranteed only with uniform
clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm
and roughness < 2 µm.
In the interest of product improvement POSEICO SpA reserves the right to change
any data given in this data sheet at any time without previous notice.
If not stated otherwise the maximum value of ratings (simbols over shaded
background) and characteristics is reported.
Page 5 of 6
AT970 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION Feb. 17 - Issue: 2
Annex
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
8
7
6
5
4
3
2
1
0
0,0001
0,001
0,01
0,1
t[s]
1
10
100
푛
푡
푍푡ℎ 푗−ℎ ꢀ = 퐴푖 ∗ ꢂ ꢃ 푒−
휏
ꢄ
푖ꢁ1
i
1
2
3
4
Ai [°C/kW]
4,320
3,400
1,701
1,800
1,183
0,160
0,296
0,001
τi [s]
Note:
This Zth j-h (t) curve takes into account of a contact thermal resistance value Rth c-h = 1,5 °C/kW.
Mounting recommendations must be followed in order to match the specified contact thermal resistance value.
Page 6 of 6
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