P521-23OC [PLL]

Low Phase Noise PECL VCXO (100MHz to 200MHz); 低相位噪声PECL VCXO ( 100MHz至200MHz的)
P521-23OC
型号: P521-23OC
厂家: PHASELINK CORPORATION    PHASELINK CORPORATION
描述:

Low Phase Noise PECL VCXO (100MHz to 200MHz)
低相位噪声PECL VCXO ( 100MHz至200MHz的)

石英晶振 压控振荡器
文件: 总6页 (文件大小:211K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
P521-23  
Low Phase Noise PECL VCXO (100MHz to 200MHz)  
PAD ASSIGNMENT AND DESCRIPTION  
Pin #  
Name  
Description  
Oscillator Off Selection input pad. When low, turns off the oscillator when output is disabled.  
When high (default), oscillator running when output is disabled.  
1
OSCOFFSEL  
Internal pull-up  
2
3
GNDOSC  
VCON  
GND connection for oscillator circuitry.  
Control Voltage input. Use this pin to change the output frequency by varying the applied  
Control Voltage.  
4
5
XIN  
XOUT  
OECTRL  
DNC  
Crystal oscillator input pin.  
Crystal oscillator output pin.  
OE input pad. See table on page 1.  
Do Not Connect.  
6
7
8
GND  
Ground connection.  
9
GND  
Ground connection.  
10  
11  
Q
PECL Output.  
QBAR  
PECL complementary output.  
VDD connection for output buffer circuitry.  
VDDBUF should be separately decoupled from other VDDs whenever possible.  
VDD connection for analog circuitry.  
12  
13  
VDDBUF  
VDDANA  
VDDANA should be separately decoupled from other VDDs whenever possible.  
14  
15  
OESEL  
Selector input to choose the OE control logic. See table on page 1.  
BUFZSEL  
Output impedance selector  
VDD connection for oscillator circuitry.  
VDDOSC should be separately decoupled from other VDDs whenever possible.  
16  
VDDOSC  
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 [www.phaselink.com]  
Rev 7/28/04 Page 2  
P521-23  
Low Phase Noise PECL VCXO (100MHz to 200MHz)  
ELECTRICAL SPECIFICATIONS  
1. Absolute Maximum Ratings  
PARAMETERS  
SYMBOL  
MIN.  
MAX.  
UNITS  
Supply Voltage  
VDD  
VI  
4.6  
V
V
V
Input Voltage, dc  
Output Voltage, dc  
VSS-0.5  
VSS-0.5  
VDD+0.5  
VDD+0.5  
VO  
Storage Temperature  
TS  
-65  
0
150  
°C  
Ambient Operating Temperature  
Junction Temperature  
TA  
TJ  
70  
125  
260  
2
°C  
°C  
°C  
kV  
Lead Temperature (soldering, 10s)  
Input Static Discharge Voltage Protection  
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the  
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other  
conditions above the operational limits noted in this specification is not implied.  
2. Crystal Specifications  
PARAMETERS  
SYMBOL  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNITS  
Crystal Resonator Frequency  
FXIN  
Parallel Fundamental Mode  
VCON = 1.65V  
100  
200  
MHz  
Crystal Loading Rating  
Interelectrode Capacitance  
Crystal Pullability  
CL (xtal)  
C0  
C0/C1 (xtal)  
RE  
5.0  
pF  
pF  
-
3.5  
250  
30  
AT cut  
AT cut  
Recommended ESR  
3. Voltage Control Crystal Oscillator  
PARAMETERS  
SYMBOL  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNITS  
VCXO Stabilization Time *  
VCXO Tuning Range  
TVCXOSTB  
From power valid  
XTAL C0/C1 < 250  
10  
ms  
250*  
ppm  
VCON = 1.65V ± 1.65V  
at room temperature  
VCON = 0 to 3.3V  
CLK output pullability  
ppm  
±125*  
On-chip Varicaps control range  
Linearity  
3.3 – 8.8*  
pF  
%
5*  
VCXO Tuning Characteristic  
VCON input impedance  
70  
ppm/V  
2000  
25  
kΩ  
VCON modulation BW  
kHz  
0V VCON 3.3V, -3dB  
Note: Parameters denoted with an asterisk (*) represent nominal characterization data and are not production tested to any specific limits.  
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 [www.phaselink.com]  
Rev 7/28/04 Page 3  
P521-23  
Low Phase Noise PECL VCXO (100MHz to 200MHz)  
4. General Electrical Specifications  
PARAMETERS  
SYMBOL  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNITS  
Supply Current (Loaded Outputs)  
IDD  
at 3.3V @ 155MHz  
55  
10  
mA  
ms  
ns  
V
Oscillator off  
Oscillator on  
Output valid after OE enabled  
50  
Operating Voltage  
VDD  
2.25  
45  
3.63  
55  
Output Clock Duty Cycle  
Short Circuit Current  
@ Vdd – 1.3V (PECL)  
50  
%
mA  
±50  
5. Jitter specifications  
PARAMETERS  
Period jitter RMS at 155MHz  
CONDITIONS  
MIN.  
TYP.  
2.5  
MAX.  
UNITS  
At 155.52MHz, with capacitive  
decoupling between VDD and GND.  
Over 10,000 cycles  
ps  
Period jitter peak-to-peak at 155MHz  
Accumulated jitter RMS at 155MHz  
20  
18.5  
At 155.52MHz, with capacitive  
decoupling between VDD and GND.  
Over 1,000,000 cycles.  
2.5  
24  
ps  
Accumulated jitter peak-to-peak at 155MHz  
Random Jitter  
27  
“RJ” measured on Wavecrest SIA 3000  
Integrated 12 kHz to 20 MHz  
ps  
ps  
2.5  
0.25  
Integrated jitter RMS at 155MHz  
Measured on Wavecrest SIA 3000  
0.35  
6. Phase noise specifications  
PARAMETERS FREQUENCY  
10Hz  
100Hz  
1kHz  
10kHz  
-140  
100kHz  
1MHz  
UNITS  
Phase Noise  
155.52MHz  
-75  
-100  
-125  
-145  
-150  
dBc/Hz  
relative to carrier  
Note: Phase Noise measured at VCON = 0V  
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 [www.phaselink.com]  
Rev 7/28/04 Page 4  
P521-23  
Low Phase Noise PECL VCXO (100MHz to 200MHz)  
7. PECL Electrical Characteristics  
PARAMETERS  
SYMBOL  
CONDITIONS  
MIN.  
MAX.  
UNITS  
Output High Voltage  
Output Low Voltage  
VOH  
VOL  
VDD – 1.025  
V
V
RL = 50 to (VDD – 2V)  
(see figure)  
VDD – 1.620  
8. PECL Switching Characteristics  
PARAMETERS  
Clock Rise Time  
Clock Fall Time  
SYMBOL  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNITS  
tr  
tf  
@20/80% - PECL  
@80/20% - PECL  
0.6  
0.5  
1.5  
1.5  
ns  
ns  
PECL Levels Test Circuit  
PECL Output Skew  
OUT  
VDD  
OUT  
50  
50  
2.0V  
50%  
OUT  
tSKEW  
OUT  
PECL Transistion Time Waveform  
DUTY CYCLE  
45 - 55%  
55 - 45%  
OUT  
80%  
50%  
20%  
OUT  
tR  
tF  
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 [www.phaselink.com]  
Rev 7/28/04 Page 5  
P521-23  
Low Phase Noise PECL VCXO (100MHz to 200MHz)  
PACKAGE INFORMATION  
16 PIN Narrow SOIC, TSSOP ( mm )  
SOIC  
TSSOP  
Max.  
E
H
Symbol  
Min.  
1.35  
0.10  
0.33  
0.19  
9.80  
3.80  
5.80  
0.40  
Max.  
1.75  
0.25  
0.51  
0.25  
10.00  
4.00  
6.20  
1.27  
Min.  
-
A
A1  
B
C
D
E
1.20  
0.15  
0.30  
0.20  
5.10  
4.50  
0.05  
0.19  
0.09  
4.90  
4.30  
D
H
L
6.40 BSC  
0.75  
0.65 BSC  
A
0.45  
A1  
C
e
1.27 BSC  
L
B
e
ORDERING INFORMATION  
PART NUMBER  
The order number for this device is a combination of the following:  
Device number, Package type and Operating temperature range  
P521-23 D C  
PART NUMBER  
TEMPERATURE  
C=COMMERCIAL  
PACKAGE TYPE  
D=Die  
O=TSSOP  
Order Number  
Marking  
Package Option  
P521-23DC  
P521-23OC-R  
P521-23OC  
P521-23DC  
P521-23 OC  
P521-23 OC  
Die – Waffle Pack  
TSSOP – Tape and Reel  
TSSOP – Tube  
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information  
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said  
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.  
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems  
without the express written approval of the President of PhaseLink Corporation.  
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 [www.phaselink.com]  
Rev 7/28/04 Page 6  
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