LV1144BE-10.0M [PLETRONICS]
Oscillator,;型号: | LV1144BE-10.0M |
厂家: | PLETRONICS, INC. |
描述: | Oscillator, |
文件: | 总4页 (文件大小:70K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Pl tronics, Inc.
.
19013 36th Ave. W, Suite H Lynnwood, WA 98036 USA
Manufacturer of High Quality Frequency Control Products
LV1145B LVDS Series
Low Voltage Differential Signal Output with Enable/Disable
–
10.00 MHz 650.00 MHz
6 Pad Leadless Surface Mount Oscillator
Consult factory for higher frequencies
Standard Specifications
Overall Frequency Stability
LV1145B: ± 50 PPM, LV1144B: ± 25 PPM, LV1120B: ± 20 PPM over Operating Temp. Range
Operating Temperature Range 0 to +80°C is standard, can be extended to - 40 to +85°C
Operable Supply Voltage (Vcc) 3.3 V ± 5% standard, 5.0 V ± 10% also available (2.5 V different package)
High Level Output Voltage
Low Level Output Voltage
Differential Output Voltage
Offset Voltage
Output Leakage Current
Supply Current (Icc) Enabled
1.43 V typical and 1.60 V maximum with output enabled (100 ohm load) See Test circuit #6
0.90 V minimum and 1.10 V typical with output enabled (100 ohm load) See TC #6
247 V minimum, 330 V typical and 454 V maximum with output enabled (100 ohm load) See TC #6
1.125 V minimum, 1.25 V typical and 1.375 V maximum with output enabled (100 ohm load) See TC #6
10 uA maximum with output disabled
50 mA max < 200 MHz, 60 mA max < 500 MHz, 70 mA max 500 MHz and above
Supply Current (Icc) Disabled 20 mA max < 200 MHz, 30 mA max < 500 MHz, 40 mA max 500 MHz and above
Symmetry (DC)
Rise and Fall Time (Tr & Tf)
RMS Jitter
45/55% measured at 0°C <= Ta <= 70°C, 40/60% measured at Ta < 0°C and Ta > 70°C
1.0 nS max at 20% to 80% output swing (100 ohm load) See Test circuit #6 and Waveform #2
1.0 pS max at12 kHz to 20 MHz from the output
Enable / Disable Pin:
The Enable / Disable pin has an internal pull up and if the pin is not connected the oscilaltor is enabled. Pletronics strongly recommends
connecting the Enable / Disable pin to Vcc, if the oscillator is to be enabled at all times. In the disable condition, the output becomes a
high impedance.
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Output Enable Time
0.7 Vcc minimum at Enable / Disable Pin
0.3 Vcc maximum at Enable / Disable Pin
-20 uA maximum at Enable / Disable Pin = 0.7 Vcc
-200 uA maximum at Enable / Disable Pin = 0 V
200 nS maximum
Output Disable Time
200 nS maximum
Part Numbering Guide
Portions of the part number that appear after the frequency may not be marked on part (C of C provided)
LV11 45 B V - 70.0M - XXX (Internal Code or blank)
Packaging
Tube or
24mm tape
16mm pitch
Model
Frequency in MHz
LV11 = Pin 1 N.C.
LV33 = Pin 1 E/D
LV37 = Pin 1 E/D
Special Specifications (choose all that apply)
E: Extended Operating Temp Range (-40 to +85°C)
V: Supply Voltage of 3.3 volts ±5%
Y: Supply Voltage of 5.0 volts ±10%,
W: Supply Voltage of 2.5 volts ± 5% (different package)
Frequency Stability
45 = ± 50 PPM
44 = ± 25 PPM
20 = ± 20 PPM
Consult factory for available frequencies and specs. Not all options available for all frequencies. A special part number may be assigned.
Frequency Stability is inclusive of frequency shifts due to calibration, temperature, supply voltage, shock, vibration and load
Jun 2004
(425) 776 -1880, Fax: (425) 776-2760, ple-sales@pletronics.com, www.pletronics.com
5
Pl tronics, Inc.
Pl tronics, Inc.
.
19013 36th Ave. W, Suite H Lynnwood, WA 98036 USA
Manufacturer of High Quality Frequency Control Products
LV1145B LVDS Series
Mechanical: inches (mm)
not to scale
Solder Pads
Due to part size and factory abilities, part marking may vary from lot to lot and may contain our part number or an internal code.
0.200 (5.08)
3.3 V and 5.0 V Package
5
2
4
3
6
1
4
3
5
6
1
2
0.560 (14.23) MAX
0.200 (5.08)
0.125 (3.17)
MAX
0.055 0 .145
(1.4) (3.68)
2.5 V Package
0.200 (5.08)
TOP VIEW
6
0.040 (1.02)0.040 (1.02)
5
4
4
5
6
5
2
4
3
6
1
0
0.059
(1.50)
3
1
2
3
2
1
0.324 (8.23)
0.108 (2.75)
MAX
0.200 (5.08)
0.055 0 .145
(1.4) (3.68)
LV1145B
LV3345B
LV3745B
PIN SIGNAL
PIN SIGNAL
PIN SIGNAL
1
2
3
4
5
6
N.C.
E/D
GND
VoD+
VoD-
Vcc
1
2
3
4
5
6
E/D
E/D
GND
VoD+
VoD-
Vcc
1
2
3
4
5
6
E/D
N.C.
GND
VoD+
VoD-
Vcc
See page 6 for Layout Guidelines
Jun 2004
5A
(425) 776 -1880, Fax: (425) 776-2760, ple-sales@pletronics.com, www.pletronics.com
Pl tronics, Inc.
Pl tronics, Inc.
.
19013 36th Ave. W, Suite H Lynnwood, WA 98036 USA
Manufacturer of High Quality Frequency Control Products
PECL and LVDS Layout Guidelines
'B Pkg'
5 x7
SUGGESTED PCB LAYOUTS
Solder Pad Layout which
accommodates all PECL surface mount
devices
TOP SIDE
BYPASS
0.200 (5.08)
0 .185
(4.7)
0 .087
(2.2)
BOTTOM
SIDE
BYPASS
0.055 0.100
(1.4) (2.54)
The output line should be designed with proper characteristic
impedance. Pletronics recommends laying out for the larger
'B package' with pads long enough to accept the smaller
5 x 7mm device. This permits the best option for alternate
sources of device. Pletronics also recommends connecting
Pin 1 and Pin 2 together on the models with
MULTI
LAYER
BYPASS
Q & QN OUT on pins 4 & 5. This allows
having E/D on either pin 1 or pin 2.
For Optimum Jitter Performance, Pletronics recommends:
A ground plane under the device with any other signals below the ground plane
Minimize other RF signals near device
No large transient signals (both current and voltage) should be routed under the device
Do not layout near a large magnetic field such as a high frequency switching power supply
Do not place near piezoelectric buzzers or mechancial fans
Reflow Cycle for lead free processing
260°C max
10 Seconds max
250
200
150
100
175°C ± 10°C
120 to 160 Seconds
215°C ± 10°C
50 Seconds
T Rise= 4 Degree/second max
Mar 2004
6
(425) 776 -1880, Fax: (425) 776-2760, ple-sales@pletronics.com, www.pletronics.com
Pl tronics, Inc.
Pl tronics, Inc.
.
19013 36th Ave. W, Suite H Lynnwood, WA 98036 USA
Manufacturer of High Quality Frequency Control Products
PECL and LVDS Layout Guidelines Continued
PECL Terminations:
Suggested Terminations for 50 ohm impedance matched termination
Vcc
Vcc
Thevenin Equivalent Termination
R1
Vcc
5.0 V
R1
82 ohm
R2
130 ohm
82 ohm
Vcc
Oscillator
Vcc
Out
Out
Oscillator
3.3 V 130 ohm
2.5 V 249 ohm 61.9 ohm
GND
R2
50 ohm
GND
Vcc - 2.00 V
Simple termination for NON impedance matched termination
Vcc
Vcc
R load
274 ohm
147 ohm
86.6 ohm
Vcc
Oscillator
Out
5.0 V
3.3 V
2.5 V
GND
R load
LVDS Terminations:
Vcc
Vcc
Oscillator
QN Out
Q Out
Design PCB traces for 50 ohm characteristic impedance
100 ohm
GND
Mixed System Power Supply:
To use multiple supply voltages requires level translation. Direct circuit connection is not valid.
PECL
Mixed supply voltages are allowed. No translation is necessary. (ECL is returned to the most positive
supply and this is common to all circuits)
ECL
Mixed supply voltages are allowed. LVDS signal levels are power supply independent.
3.3 V LVDS oscillators properly interface 2.5 V Logic Arrays for example.
LVDS
Mar 2004
6A
(425) 776 -1880, Fax: (425) 776-2760, ple-sales@pletronics.com, www.pletronics.com
Pl tronics, Inc.
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