PCA9554ATS_技术文档

INTEGRATED CIRCUITS

PCA9554/PCA9554A

8-bit I²C and SMBus I/O port with interrupt

Product data sheet

2004 Sep 30

Supersedes data of 2002 Jul 26

Philips

Semiconductors

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

DESCRIPTION

The PCA9554 and PCA9554A are 16-pin CMOS devices that

provide 8 bits of General Purpose parallel Input/Output (GPIO)

2

expansion for I C/SMBus applications and were developed to

enhance the Philips family of I@C I/O expanders. The improvements

include higher drive capability, 5V I/O tolerance, lower supply

current, individual I/O configuration, 400 kHz clock frequency, and

smaller packaging. I/O expanders provide a simple solution when

additional I/O is needed for ACPI power switches, sensors,

pushbuttons, LEDs, fans, etc.

FEATURES

• Operating power supply voltage range of 2.3 to 5.5 V

• 5 V tolerant I/Os

• Polarity inversion register

• Active-LOW interrupt output

• Low stand-by current

• Noise filter on SCL/SDA inputs

• No glitch on power-up

The PCA9554/54A consist of an 8-bit Configuration register (Input or

Output selection); 8-bit Input register, 8-bit Output register and an

8-bit Polarity inversion register (Active-HIGH or Active-LOW

operation). The system master can enable the I/Os as either inputs

or outputs by writing to the I/O configuration bits. The data for each

Input or Output is kept in the corresponding Input or Output register.

The polarity of the read register can be inverted with the Polarity

Inversion Register. All registers can be read by the system master.

2

Although pin to pin and I C address compatible with the PCF8574

series, software changes are required due to the enhancements and

are discussed in Application Note AN469.

• Internal power-on reset

• 8 I/O pins which default to 8 inputs

• 0 to 400 kHz clock frequency

The PCA9554/54A open-drain interrupt output is activated when any

input state differs from its corresponding input port register state and

is used to indicate to the system master that an input state has

changed. The power-on reset sets the registers to their default

values and initializes the device state machine.

• ESD protection exceeds 2000 V HBM per JESD22-A114,

200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101

2

Three hardware pins (A0, A1, A2) vary the fixed I C address and

2

• Latch-up testing is done to JESDEC Standard JESD78 which

allow up to eight devices to share the same I C/SMBus. The

PCA9554A is identical to the PCA9554 except that the fixed I C

2

exceeds 100 mA

address is different allowing up to sixteen of these devices (eight of

each) on the same I C/SMBus.

• Six packages offered: DIP16, SO16, SSOP16, SSOP20,

2

TSSOP16, and HVQFN16

ORDERING INFORMATION

TEMPERATURE

PACKAGES

ORDER CODE

TOPSIDE MARK

DRAWING NUMBER

RANGE

16-Pin Plastic DIP

–40 °C to +85 °C

PCA9554N

PCA9554D

PCA9554N

PCA9554D

9554DB

PCA9554

9554DH

9554

SOT38-1

SOT162-1

SOT338-1

SOT266-1

SOT403-1

SOT629-1

16-Pin Plastic SO (wide)

16-Pin Plastic SSOP

20-Pin Plastic SSOP

16-Pin Plastic TSSOP

16-Pin Plastic HVQFN

PCA9554DB

PCA9554TS

PCA9554PW

PCA9554BS

16-Pin Plastic DIP

–40 °C to +85 °C

PCA9554AN

PCA9554AD

PCA9554ADB

PCA9554ATS

PCA9554APW

PCA9554ABS

PCA9554AN

PCA9554AD

9554A

SOT38-1

SOT162-1

SOT338-1

SOT266-1

SOT403-1

SOT629-1

16-Pin Plastic SO (wide)

16-Pin Plastic SSOP

20-Pin Plastic SSOP

16-Pin Plastic TSSOP

16-Pin Plastic HVQFN

PA9554A

9554ADH

554A

Standard packing quantities and other packaging data are available at www.philipslogic.com/packaging.

2

I C is a trademark of Philips Semiconductors Corporation.

SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I C patent.

2

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

PIN CONFIGURATION — 16-pin DIP, SO, SSOP,

TSSOP

PIN CONFIGURATION — HVQFN

A1

A0

V

SDA

DD

V

1

2

3

4

5

6

7

8

16

DD

A0

A1

SCL

12

A2

1

2

3

4

15 SDA

I/O0

SCL

14

INT

11

10

9

A2

INT

13

I/O0

I/O1

I/O2

I/O7

I/O6

I/O7

I/O6

I/O1

12

11

10

9

I/O2

I/O3

I/O5

I/O4

I/O3

V

I/O4

I/O5

V

SS

TOP VIEW

Figure 2. Pin Configuration — HVQFN

su01670

su01410

Figure 1. Pin configuration — 16-pin DIP, SO, SSOP, TSSOP

PIN CONFIGURATION — 20-pin SSOP

INT

SCL

n.c.

1

2

3

4

5

6

7

8

9

20 I/O7

19 I/O6

18 n.c.

17 I/O5

16 I/O4

SDA

V

DD

A0

15

V

SS

A1

14 I/O3

13 n.c.

12 I/O2

11 I/O1

n.c.

A2

I/O0 10

SW02269

Figure 1. Pin configuration — 20-pin SSOP

PIN DESCRIPTION

DIP16, SO16, SSOP16,

TSSOP16

HVQFN16

PIN NUMBER

SSOP20

PIN NUMBER

SYMBOL

FUNCTION

PIN NUMBER

1

2

15

16

1

6

A0

A1

Address input 0

Address input 1

Address input 2

I/O0 to I/O3

7

3

9

A2

4–7

8

2–5

6

10–12, 14

I/O0 to I/O3

15

V

SS

Supply ground

I/O4 to I/O7

9

7–10

11

16, 17, 19, 20

I/O4 to I/O7

INT

13

14

15

16

–

1

Interrupt output (open drain)

Serial clock line

12

13

14

–

2

SCL

4

SDA

Serial data line

5

V

DD

Supply voltage

3, 8, 13, 18

n.c.

not connected

3

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

BLOCK DIAGRAM

A0

A1

A2

I/O0

I/O1

I/O2

I/O3

SCL

INPUT

FILTER

INPUT/

OUTPUT

PORTS

8-BIT

2

I C/SMBUS

CONTROL

SDA

I/O4

I/O5

WRITE pulse

READ pulse

I/O6

I/O7

V

DD

V

CC

POWER-ON

RESET

LP

FILTER

V

SS

INT

NOTE: ALL I/Os ARE SET TO INPUTS AT RESET

SU01411

Figure 3. Block diagram

4

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

REGISTERS

Command Byte

Register 2 – Polarity Inversion Register

Command

Protocol

Function

bit

N7

0

N6

0

N5

0

N4

0

N3

0

N2

0

N1

0

N0

0

default

0

1

2

3

Read byte

Input port register

Output port register

Polarity inversion register

Configuration register

Read/write byte

This register allows the user to invert the polarity of the Input Port

Register data. If a bit in this register is set (written with ‘1’), the

corresponding Input Port data is inverted. If a bit in this register is

cleared (written with a ‘0’), the Input Port data polarity is retained.

The command byte is the first byte to follow the address byte during

a write transmission. It is used as a pointer to determine which of the

following registers will be written or read.

Register 3 – Configuration Register

bit

C7

1

C6

1

C5

1

C4

1

C3

1

C2

1

C1

1

C0

1

default

Register 0 – Input Port Register

This register configures the directions of the I/O pins. If a bit in this

register is set, the corresponding port pin is enabled as an input with

high-impedance output driver. If a bit in this register is cleared, the

corresponding port pin is enabled as an output. At reset, the I/Os are

bit

I7

X

I6

X

I5

X

I4

X

I3

X

I2

X

I1

X

I0

X

default

This register is a read only port. It reflects the incoming logic levels

of the pins, regardless of whether the pin is defined as an input or an

output by Register 3. Writes to this register have no effect.

configured as inputs with a weak pull-up to V

.

DD

Power-on Reset

The default value ‘X’ is determined by the externally applied logic

level, normally ‘1’ when no external signal externally applied

because of the internal pull-up resistors.

When power is applied to V , an internal power-on reset holds the

DD

PCA9554 in a reset condition until V has reached V

. At that

DD

POR

point, the reset condition is released and the PCA9554 registers and

state machine will initialize to their default states. Thereafter, V

must be lowered below 0.2 V to reset the device.

DD

Register 1 – Output Port Register

For a power reset cycle, V must be lowered below 0.2 V and then

restored to the operating voltage.

bit

O7

1

O6

1

O5

1

O4

1

O3

1

O2

1

O1

1

O0

1

DD

default

Interrupt Output

This register reflects the outgoing logic levels of the pins defined as

outputs by Register 3. Bit values in this register have no effect on

pins defined as inputs. Reads from this register return the value that

is in the flip-flop controlling the output selection, NOT the actual pin

value.

The open-drain interrupt output is activated when one of the port

pins change state and the pin is configured as an input. The

interrupt is deactivated when the input returns to its previous state or

the input port register is read.

Note that changing an I/O from an output to an input may cause a

false interrupt to occur if the state of the pin does not match the

contents of the input port register.

5

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

SIMPLIFIED SCHEMATIC OF I/O0 TO I/O7

DATA FROM

SHIFT REGISTER

OUTPUT PORT

REGISTER DATA

CONFIGURATION

REGISTER

V

DD

DATA FROM

SHIFT REGISTER

Q

D

Q1

FF

100 kΩ

WRITE

CONFIGURATION

PULSE

D

C

Q

C

K

FF

I/O0 TO I/O7

WRITE PULSE

K

Q2

OUTPUT

PORT

REGISTER

V

SS

INPUT PORT

REGISTER

INPUT PORT

REGISTER DATA

D

Q

FF

READ PULSE

Q

C

K

TO INT

DATA FROM

SHIFT REGISTER

POLARITY

REGISTER DATA

D

Q

FF

WRITE

POLARITY

PULSE

C

K

POLARITY

INVERSION

REGISTER

SU01472

NOTE: At Power-on Reset, all registers return to default values.

Figure 4. Simplified schematic of I/O0 to I/O7

I/O port

When an I/O is configured as an input, FETs Q1 and Q2 are off,

creating a high-impedance input with a weak pull-up (100 kΩ typ.) to

V

DD

. The input voltage may be raised above V to a maximum of

DD

5.5 V.

If the I/O is configured as an output, then either Q1 or Q2 is enabled,

depending on the state of the output port register. Care should be

exercised if an external voltage is applied to an I/O configured as an

output because of the low impedance paths that exist between the

pin and either V or V

.

SS

DD

6

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

Device address

SLAVE ADDRESS

slave address

0

1

0

A2 A1 A0 R/W

0

1

A2 A1 A0 R/W

programmable

FIXED

HARDWARE SELECTABLE

fixed

su01418

su01669

Figure 5. PCA9554 address

Figure 6. PCA9554A address

Bus transactions

Data is transmitted to the PCA9554/PCA9554A registers using the write mode as shown in Figures 7 and 8. Data is read from the

PCA9554/PCA9554A registers using the read mode as shown in Figures 9 and 10. These devices do not implement an auto-increment function

so once a command byte has been sent, the register which was addressed will continue to be accessed by reads until a new command byte

has been sent.

1

2

3

4

5

6

7

8

9

SCL

SDA

command byte

slave address

data to port

DATA 1

0

1

0

A2 A1 A0

S

0

A

0

1

A

P

start condition

R/W acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

WRITE TO

PORT

DATA 1 VALID

DATA OUT

FROM PORT

t

pv

su01421

Figure 7. WRITE to output port register

1

2

3

4

5

6

7

8

0

9

SCL

SDA

command byte

slave address

data to register

DATA

0

1

0

A2 A1 A0

P

S

A

0

1

1/0

start condition

R/W acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

DATA TO

REGISTER

su01422

Figure 8. WRITE to configuration or polarity inversion registers

7

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

acknowledge

from master

slave address

data from register

0

A2 A1

0

A2 A1

A0

0

1

0

A0

0

1

0

1

COMMAND BYTE

DATA

S

0

A

S

A

first byte

R/W

at this moment master-transmitter

becomes master-receiver and

slave-receiver becomes

slave-transmitter

no acknowledge

from master

data from register

NA

P

DATA

last byte

su01424

Figure 9. READ from register

1

2

3

4

5

6

7

8

1

9

SCL

SDA

slave address

data from port

DATA 1

A

DATA 4

0

1

0

A2 A1 A0

S

A

NA

P

start condition

R/W acknowledge

from slave

acknowledge

from master

no acknowledge

from master

stop

condition

READ FROM

PORT

DATA INTO

PORT

DATA 2

DATA 3

DATA 4

t

ph

t

ps

INT

t

iv

t

ir

su01465

NOTES:

1. This figure assumes the command byte has previously been programmed with 00h.

2. Transfer of data can be stopped at any moment by a stop condition.

Figure 10. READ input port register

8

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

TYPICAL APPLICATION

V

DD

(5 V)

2 kΩ

V

10 kΩ

DD

V

DD

SCL

SDA

MASTER

I/O

1

INT

CONTROLLER

INT

I/O

2

RESET

GND

3

PCA9554/

PCA9554A

SUBSYSTEM 2

(e.g. counter)

I/O

4

I/O

5

I/O

6

I/O

7

A

A2

Controlled Switch

(e.g. CBT device)

ENABLE

A1

A0

B

V

SS

ALARM

SUBSYSTEM 3

(e.g. alarm

system)

NOTE: Device address configured as 0100100 for this example

I/O , I/O , I/O , configured as outputs

0

1

2

V

I/O , I/O , I/O , configured as inputs

DD

3

4

5

I/O , I/O , are not used and have to be configured as outputs

06

7

SW2288

Figure 11. Typcial application.

9

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

ABSOLUTE MAXIMUM RATINGS

In accordance with the Absolute Maximum Rating System (IEC 134)

SYMBOL

PARAMETER

CONDITIONS

MIN

–0.5

—

MAX

6.0

UNIT

V

DD

Supply voltage

I

DC input current

±20

5.5

mA

V

DC voltage on an I/O

DC output current on an I/O

Supply current

V

– 0.5

I/O

DD

SS

I

—

±50

85

mA

mW

°C

I

SS

Supply current

—

100

200

+150

+85

P

tot

Total power dissipation

Storage temperature range

Operating ambient temperature

—

T

stg

–65

–40

T

amb

°C

10

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take

precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”Handling MOS devices”.

DC CHARACTERISTICS

V

= 2.3 V to 5.5 V; V = 0 V; T

= –40 °C to +85 °C; unless otherwise specified.

DD

SS

amb

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

Supplies

V

Supply voltage

Supply current

2.3

—

5.5

V

DD

Operating mode; V = 5.5 V; no load;

DD

I

104

175

µA

DD

f

= 100 kHz

SCL

Standby mode; V = 5.5 V; no load;

DD

I

Standby current

—

550

700

µA

stbl

V = V ; f

= 0 kHz; I/O = inputs

I

SS SCL

Standby mode; V = 5.5 V; no load;

DD

I

Standby current

—

0.25

1.5

1

µA

stbh

V = V ; f

= 0 kHz; I/O = inputs

I

DD SCL

V

Power-on reset voltage (Note 1)

No load; V = V or V

1.65

V

POR

I

DD

SS

Input SCL; input/output SDA

V

LOW level input voltage

HIGH level input voltage

LOW level output current

Leakage current

–0.5

—

6

0.3V

V

IL

IH

DD

V

0.7V

5.5

—

DD

I

OL

V

= 0.4 V

3

mA

µA

pF

OL

I

L

V = V = V

I

–1

—

+1

10

DD

SS

C

Input capacitance

V = V

I

SS

I/Os

V

LOW level input voltage

HIGH level input voltage

–0.5

2.0

8

—

10

13

17

24

14

19

—

3.7

0.8

5.5

—

1

V

IL

V

IH

V

= 0.5 V; V = 2.3 V; Note 2

mA

V

OL

OH

DD

= 0.7 V; V = 2.3 V; Note 2

10

8

DD

= 0.5 V; V = 4.5 V; Note 2

DD

I

OL

LOW level output current

= 0.7 V; V = 4.5 V; Note 2

10

8

DD

= 0.5 V; V = 3.0 V; Note 2

DD

= 0.7 V; V = 3.0 V; Note 2

10

1.8

1.7

2.6

2.5

4.1

4.0

—

DD

I

= –8 mA; V = 2.3 V; Note 3

DD

= –10 mA; V = 2.3 V; Note 3

V

DD

= –8 mA; V = 3.0 V; Note 3

V

DD

V

I

HIGH level output voltage

OH

= –10 mA; V = 3.0 V; Note 3

V

DD

= –8 mA; V = 4.75 V; Note 3

V

DD

= –10 mA; V = 4.75 V; Note 3

V

DD

Input leakage current

Input capacitance

V

= 3.6 V; V = V

µA

pF

IH

DD

I

DD

SS

I

IL

V

= 5.5 V; V = V

—

–100

5

I

C

—

I

C

Output capacitance

—

5

O

Interrupt INT

I

OL

LOW level output current

V

OL

= 0.4 V

3

—

mA

Select Inputs A0, A1, A2

V

LOW level input voltage

HIGH level input voltage

Input leakage current

–0.5

2.0

–1

—

0.8

5.5

1

V

IL

IH

LI

V

I

µA

NOTES:

1. V must be lowered to 0.2 V in order to reset part.

DD

2. Each I/O must be externally limited to a maximum of 25 mA and the device must be limited to a maximum current of 100 mA.

3. The total current sourced by all I/Os must be limited to 85 mA.

11

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

SDA

t

F

LOW

t

SU;DAT

t

R

t

F

t

R

t

BUF

HD;STA

t

SP

SCL

t

SU;STD

t

SU;STA

HD;STA

t

S

P

S

HD;DAT HIGH

S

R

SU01469

Figure 12. Definition of timing

AC SPECIFICATIONS

STANDARD MODE

FAST MODE

I C-BUS

2

I C-BUS

SYMBOL

PARAMETER

UNITS

MIN

MAX

100

—

MIN

MAX

f

Operating frequency

0

400

—

kHz

µs

ns

µs

ns

µs

ns

SCL

t

Bus free time between STOP and START conditions

Hold time after (repeated) START condition

Repeated START condition setup time

Setup time for STOP condition

4.7

4.0

4.7

4.0

0

1.3

0.6

0

BUF

t

—

HD;STA

t

—

SU;STA

SU;STO

t

—

t

Data in hold time

—

HD;DAT

VD;ACK

2

t

Valid time for ACK condition

0.3

300

250

4.7

4.0

—

3.45

—

0.1

50

0.9

—

3

t

Data out valid time

VD;DAT

Data setup time

—

100

1.3

0.6

—

SU;DAT

t

Clock LOW period

Clock HIGH period

Clock/Data fall time

Clock/Data rise time

—

LOW

t

—

HIGH

1

t

F

300

1000

50

20 + 0.1 C

—

300

50

b

t

R

—

b

t

Pulse width of spikes that must be suppressed by the

input filters

—

SP

Port Timing

t

Output data valid

—

100

1

200

—

100

1

200

—

ns

µs

PV

PS

PH

Input data setup time

Input data hold time

t

—

Interrupt Timing

t

Interrupt valid

Interrupt reset

—

4

—

4

µs

IV

IR

t

NOTES:

1. C = total capacitance of one bus line in pF.

b

2. t

3. t

= time for Acknowledgement signal from SCL LOW to SDA (out) LOW.

= minimum time for SDA data out to be valid following SCL LOW.

VD;ACK

VD;DAT

12

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

DIP16: plastic dual in-line package; 16 leads (300 mil); long body

SOT38-1

13

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

SO16: plastic small outline package; 16 leads; body width 7.5 mm

SOT162-1

14

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm

SOT338-1

15

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm

SOT266-1

16

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm

SOT403-1

17

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals;

body 4 x 4 x 0.85 mm

SOT629-1

18

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

REVISION HISTORY

Rev

Date

Description

_6

20040930

Product data (9397 750 13289). Supersedes data of 2002 Jul 26 (9397 750 10163).

Modifications:

• Add DIP16 and SSOP20 packages to Features, Ordering information, Pin configuration, Pin description,

and package outline drawings.

• Section “Register 0—Input Port Register” on page 4:

change default values to ‘XXXXXXXX’ and add second paragraph.

• “Power-on Reset” section on page 5 modified.

• Add new “Typical application” section on page 9.

• DC Characteristics table on page 11:

– add (new) Note 1, and its reference at V

– Note 2 re-written.

.

POR

_5

20020726

20020513

Product data (9397 750 10163). ECN 853-2243 28672 of 26 July 2002.

Supersedes data of 2002 May 13 (9397 750 09817).

_4

_3

_2

_1

Product specification (9397 750 09817)

Product specification (9397 750 08342)

Product specification (9397 750 08209)

Product specification (9397 750 08159)

19

2004 Sep 30

Philips Semiconductors

Product data sheet

8-bit I²C and SMBus I/O port with interrupt

PCA9554/PCA9554A

2

Purchase of Philips I C components conveys a license under the Philips’ I C patent

2

to use the components in the I C system provided the system conforms to the

I C specifications defined by Philips. This specification can be ordered using the

2

code 9398 393 40011.

Data sheet status

Product

status

Definitions

[1]

Level

Data sheet status

[2] [3]

I

Objective data sheet

Development

This data sheet contains data from the objective specification for product development.

Philips Semiconductors reserves the right to change the specification in any manner without notice.

II

Preliminary data sheet

Product data sheet

Qualification

Production

This data sheet contains data from the preliminary specification. Supplementary data will be published

at a later date. Philips Semiconductors reserves the right to change the specification without notice, in

order to improve the design and supply the best possible product.

III

This data sheet contains data from the product specification. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant

changes will be communicated via a Customer Product/Process Change Notification (CPCN).

[1] Please consult the most recently issued data sheet before initiating or completing a design.

[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL

http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see

the relevant data sheet or data handbook.

Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given

in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no

representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be

expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree

to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described

or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated

viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys

nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,

copyright, or mask work right infringement, unless otherwise specified.

Koninklijke Philips Electronics N.V. 2004

Contact information

For additional information please visit

http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

Date of release: 09-04

For sales offices addresses send e-mail to:

sales.addresses@www.semiconductors.philips.com.

Document number:

9397 750 13289

Philips

Semiconductors

20

2004 Sep 30


型号：	PCA9554ATS
厂家：	NXP
描述：	8-bit I2C and SMBus I/O port with interrupt 8位I²C和SMBus I / O端口与中断并行IO端口微控制器和处理器外围集成电路光电二极管
文件：	总20页 (文件大小：184K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PCA9554ATS [NXP]

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