MD7IC18120GNR1 [NXP]
Single W-CDMA RF LDMOS Wideband Integrated Power Amplifier, 1805-1880 MHz, 30 W Avg., 28 V;型号: | MD7IC18120GNR1 |
厂家: | NXP |
描述: | Single W-CDMA RF LDMOS Wideband Integrated Power Amplifier, 1805-1880 MHz, 30 W Avg., 28 V CD |
文件: | 总18页 (文件大小:674K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Document Number: MD7IC18120N
Rev. 0, 5/2010
Freescale Semiconductor
Technical Data
RF LDMOS Wideband Integrated
Power Amplifiers
MD7IC18120NR1
MD7IC18120GNR1
The MD7IC18120N/GN wideband integrated circuit is designed with on--chip
matching that makes it usable from 1805 to 1880 MHz. This multi--stage
structure is rated for 26 to 32 Volt operation and covers all typical cellular base
station modulation formats.
1805--1880 MHz, 30 W AVG., 28 V
SINGLE W--CDMA
RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIERS
•
Typical Doherty Single--Carrier W--CDMA Performance: VDD = 28 Volts,
IDQ1A = 70 mA, IDQ1B = 160 mA, IDQ2B = 500 mA, VGS2A = 1.7 Vdc, Pout
30 Watts Avg., IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz,
Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF.
=
G
PAE
(%)
Output PAR
(dB)
ps
Frequency
1805 MHz
1840 MHz
1880 MHz
(dB)
25.7
25.7
25.8
CASE 1866--02
TO--270 WBL--16
PLASTIC
36.7
36.3
35.3
6.9
6.9
6.7
MD7IC18120NR1
•
Capable of Handling 10:1 VSWR, @ 32 Vdc, 1840 MHz, 140 Watts CW
Output Power
•
•
Stable into a 5:1 VSWR. All Spurs Below --60 dBc @ 100 Watts CW Pout
Typical Pout @ 1 dB Compression Point ≃ 120 Watts CW
Features
CASE 1867--02
TO--270 WBL--16 GULL
PLASTIC
•
•
•
Production Tested in a Symmetrical Doherty Configuration
100% PAR Tested for Guaranteed Output Power Capability
Characterized with Large--Signal Load--Pull Parameters and Common
Source S--Parameters
MD7IC18120GNR1
•
•
•
•
•
•
•
On--Chip Matching (50 Ohm Input, DC Blocked)
Integrated Quiescent Current Temperature Compensation with Enable/Disable Function (1)
Integrated ESD Protection
Greater Negative Gate--Source Voltage Range for Improved Class C Operation
225°C Capable Plastic Package
RoHS Compliant
In Tape and Reel. R1 Suffix = 500 Units per 44 mm, 13 inch Reel.
V
V
DS1A
N.C.
DS1A
GS2A
1
2
3
V
V
V
Quiescent Current
Temperature Compensation
GS2A
GS1A
(1)
V
16
15
4
GS1A
N.C.
RF /V
outA DS2A
5
(2)
RF
6
PEAKING
RF /V
inA
N.C.
7
RF
inA
inB
outA DS2A
N.C.
8
9
RF
inB
N.C.
10
11
12
13
14
RF /V
outB DS2B
V
GS1B
GS2B
DS1B
N.C.
V
RF
RF /V
outB DS2B
V
(2)
CARRIER
(Top View)
V
V
GS1B
GS2B
Quiescent Current
Temperature Compensation
(1)
Note: Exposed backside of the package is
the source terminal for the transistors.
V
DS1B
Figure 1. Functional Block Diagram
Figure 2. Pin Connections
1. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1977 orAN1987.
2. Peaking and Carrier orientation is determined by the test fixture design.
© Freescale Semiconductor, Inc., 2010. All rights reserved.
Table 1. Maximum Ratings
Rating
Symbol
Value
--0.5, +65
--6.0, +10
32, +0
Unit
Vdc
Vdc
Vdc
°C
Drain--Source Voltage
V
DSS
Gate--Source Voltage
V
GS
DD
Operating Voltage
V
Storage Temperature Range
Case Operating Temperature
Operating Junction Temperature
T
stg
--65 to +150
150
T
C
°C
(1,2)
T
J
225
°C
CW Operation @ T = 25°C
Derate above 25°C
CW
175
1.5
W
W/°C
C
Input Power
P
30
dBm
in
Table 2. Thermal Characteristics
(2,3)
Characteristic
Symbol
Value
Unit
Final Doherty Application
Thermal Resistance, Junction to Case
R
θ
°C/W
JC
Case Temperature 78°C, P = 30 W CW, 1880 MHz
out
Stage 1A, 28 Vdc, I
Stage 1B, 28 Vdc, I
Stage 2A, 28 Vdc, V
= 70 mA
= 160 mA
= 1.7 Vdc
= 500 mA
4.5
4.5
0.88
0.88
DQ1A
DQ1B
G2A
Stage 2B, 28 Vdc, I
DQ2B
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
Machine Model (per EIA/JESD22--A115)
Charge Device Model (per JESD22--C101)
2 (Minimum)
A (Minimum)
III (Minimum)
Table 4. Moisture Sensitivity Level
Test Methodology
Rating
Package Peak Temperature
Unit
Per JESD22--A113, IPC/JEDEC J--STD--020
3
260
°C
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes -- AN1955.
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
2
Table 5. Electrical Characteristics (T = 25°C unless otherwise noted)
A
Characteristic
Symbol
Min
Typ
Max
Unit
(1)
Stage 1 — Off Characteristics
Zero Gate Voltage Drain Leakage Current
I
I
—
—
—
—
—
—
10
1
μAdc
μAdc
μAdc
DSS
DSS
GSS
(V = 65 Vdc, V = 0 Vdc)
DS
GS
Zero Gate Voltage Drain Leakage Current
(V = 28 Vdc, V = 0 Vdc)
DS
GS
Gate--Source Leakage Current
(V = 1.5 Vdc, V = 0 Vdc)
I
1
GS
DS
(1)
Stage 1 — On Characteristics
Gate Threshold Voltage
V
V
1.2
—
2.0
2.9
2.7
—
Vdc
Vdc
Vdc
GS(th)
GS(Q)
GG(Q)
(V = 10 Vdc, I = 28 μAdc)
DS
D
Gate Quiescent Voltage
(V = 28 Vdc, I
= 70 mA, I = 160 mA)
DQ1B
DS
DQ1A
Fixture Gate Quiescent Voltage
(V = 28 Vdc, Measured in Functional Test)
DD
I
I
= 70 mA
= 160 mA
V
4.0
7.1
5.0
8.1
6.0
9.1
DQ1A
DQ1B
(1)
Stage 2 — Off Characteristics
Zero Gate Voltage Drain Leakage Current
I
—
—
—
—
—
—
10
1
μAdc
μAdc
μAdc
DSS
DSS
GSS
(V = 65 Vdc, V = 0 Vdc)
DS
GS
Zero Gate Voltage Drain Leakage Current
(V = 28 Vdc, V = 0 Vdc)
I
DS
GS
Gate--Source Leakage Current
(V = 1.5 Vdc, V = 0 Vdc)
I
1
GS
DS
(1)
Stage 2 — On Characteristics
Gate Threshold Voltage
V
V
1.2
2.0
2.6
2.7
—
Vdc
Vdc
Vdc
Vdc
GS(th)
GS(Q)
GG(Q)
DS(on)
(V = 10 Vdc, I = 185 μAdc)
DS
D
Gate Quiescent Voltage
(V = 28 Vdc, I
—
5.3
= 500 mA)
DQ2B
DS
Fixture Gate Quiescent Voltage
(V = 28 Vdc, I = 500 mA, Measured in Functional Test)
V
6.3
7.3
—
DD
DQ2B
Drain--Source On--Voltage
V
—
0.35
(V = 10 Vdc, I = 1.8 Adc)
GS
D
(2,3,4)
Functional Tests
(In Freescale Test Fixture, 50 ohm system) V = 28 Vdc, I
= 70 mA, I
= 160 mA, I
= 500 mA, V
=
GS2A
DD
DQ1A
DQ1B
DQ2B
1.7 Vdc, P = 30 W Avg., f = 1880 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 7.5 dB @ 0.01% Probability
out
on CCDF.
Power Gain
G
24.0
33.0
6.0
25.8
35.3
6.7
28.0
—
dB
%
ps
Power Added Efficiency
PAE
PAR
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
—
dB
1. Each side of device measured separately.
2. Part internally matched both on input and output.
3. Measurement made with device in a Symmetrical Doherty configuration.
4. Measurement made with device in straight lead configuration before any lead forming operation is applied.
(continued)
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
3
Table 5. Electrical Characteristics (T = 25°C unless otherwise noted) (continued)
A
(1)
Typical Broadband Performance (In Freescale Test Fixture, 50 ohm system) V = 28 Vdc, I
= 70 mA, I
= 160 mA, I
DQ2B
=
DD
DQ1A
DQ1B
500 mA, V
= 1.7 Vdc, P = 30 W Avg., Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 7.5 dB @ 0.01%
GS2A
out
Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset.
G
PAE
(%)
Output PAR
(dB)
ps
Frequency
1805 MHz
1840 MHz
(dB)
25.7
25.7
25.8
36.7
36.3
35.3
6.9
6.9
6.7
1880 MHz
(1)
Typical Performances
= 500 mA, V
(In Freescale Doherty Test Fixture, 50 ohm system) V = 28 Vdc, I
= 70 mA, I
= 160 mA,
DQ1B
DD
DQ1A
I
= 1.7 Vdc, 1805--1880 MHz Bandwidth
DQ2B
GS2A
Characteristic
@ 1 dB Compression Point, CW
Symbol
Min
Typ
Max
Unit
W
P
P1dB
—
120
—
out
IMD Symmetry @ 30 W PEP, P where IMD Third Order
IMD
MHz
out
sym
—
—
15
—
—
Intermodulation 30 dBc
(Delta IMD Third Order Intermodulation between Upper and Lower
Sidebands > 2 dB)
VBW Resonance Point
VBW
35
MHz
res
(IMD Third Order Intermodulation Inflection Point)
Gain Flatness in 75 MHz Bandwidth @ P = 30 W Avg.
G
—
—
0.3
—
—
dB
%
out
F
Quiescent Current Accuracy over Temperature
Stage 1
Stage 2
∆I
4.26
5.04
QT
(2)
with 2 kΩ Gate Feed Resistors (--30 to 85°C)
Gain Variation over Temperature
(--30°C to +85°C)
∆G
—
—
0.04
—
—
dB/°C
Output Power Variation over Temperature
∆P1dB
0.04
dBm/°C
(--30°C to +85°C)
1. Measurement made with device in a Symmetrical Doherty configuration.
2. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1977 or
AN1987.
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
4
C25
V
DD2A
P
V
V
GG2A
DD1A
R12
C13
C27
V
GG1A
C3
C1
L3
L1
R4
R2
R10
C17
C5
R6
R8
C9
C15
C7
R1
C11
C12
C19
C21
C22
C23
C24
Z1
C10
C8
R9
R7
C6
C20
C16
R11
L2
C18
R3
R5
L4
C14
R13
C4
C2
V
V
GG1B
C28
V
DD1B
GG2B
C
V
DD2B
C26
MD7IC18120N
Rev. 2
Figure 3. MD7IC18120NR1(GNR1) Test Circuit Component Layout
Table 6. MD7IC18120NR1(GNR1) Test Circuit Component Designations and Values
Part
Description
10 μF, 50 V Chip Capacitors
0.1 μF Chip Capacitors
Part Number
Manufacturer
Murata
Murata
ATC
C1, C2, C27, C28
GRM55DR61H106KA88L
GRM21BR71H104KA01B
ATC600F100JT250XT
ATC600F101JT250XT
ATC600F2R2BT250XT
ATC600F1R5BT250XT
ATC600F1R0BT250XT
ATC600F0R5BT250XT
MCGPR35V337M10X16--RH
0805CS--060XJLB
C3, C4, C5, C6, C7, C8
C9, C10, C11, C13, C14
10 pF Chip Capacitors
C12
100 pF Chip Capacitor
ATC
C15, C16, C17, C18
2.2 pF Chip Capacitors
ATC
C19, C20
1.5 pF Chip Capacitors
ATC
C21, C22, C23
1.0 pF Chip Capacitors
ATC
C24
0.5 pF Chip Capacitor
ATC
C25, C26
330 μF, 35 V Electrolytic Capacitors
6.8 nH Chip Inductors
Panasonic
CoilCraft
CoilCraft
KOA Speer
KOA Speer
Vishay
L1, L2
L3, L4
2.5 nH, 1 Turn Inductors
50 Ω, 1/8 W Chip Resistor
1000 Ω, 1/10 W Chip Resistors
10 Ω, 1/10 W Chip Resistors
A01TKLC
R1
SG732ATTDD51R0F
SG731JTTDD1001F
CRCW060310R0FKEA
R2, R3, R4, R5, R6, R7, R8, R9
R10, R11, R12, R13
Z1
1900 MHz Band 90°, 3 dB Chip Hybrid Coupler GSC351--HYB1900
0.020″, ε = 3.5 RO4350B
SOSHIN
Rogers
PCB
r
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
5
Single--ended
λ
4
Quadrature combined
λ
4
λ
4
Doherty
λ
λ
2
Push--pull
2
Figure 4. Possible Circuit Topologies
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
6
TYPICAL CHARACTERISTICS
27
38
V
DQ1B
= 28 Vdc, P = 30 W (Avg.), I = 70 mA
DQ1A
DD
out
26.8
26.6
26.4
26.2
37
PAE
I
= 160 mA, I
= 500 mA, V = 1.7 Vdc
GS2A
DQ2B
36
Single--Carrier W--CDMA, 3.84 MHz
Channel Bandwidth, Input Signal
PAR = 7.5 dB @ 0.01% Probability
on CCDF
35
34
G
ps
-- 3 0
-- 3 2
-- 3 4
-- 3 6
-- 3 8
-- 4 0
26
25.8
25.6
25.4
0
-- 5
-- 0 . 5
-- 1 0
-- 1 5
-- 2 0
-- 2 5
-- 3 0
PARC
-- 1
IRL
-- 1 . 5
-- 2
25.2
25
ACPR
-- 2 . 5
1760 1780 1800 1820 1840 1860 1880 1900 1920
f, FREQUENCY (MHz)
Figure 5. Output Peak--to--Average Ratio Compression (PARC)
Broadband Performance @ Pout = 30 Watts Avg.
-- 20
V
= 28 Vdc, P = 30 W (PEP)
out
DD
I
I
= 70 mA, I
= 160 mA
DQ1A
DQ2B
DQ1B
GS2A
IM3--L
IM3--U
IM5--L
= 500 mA, V
= 1.7 Vdc
-- 30
-- 40
-- 50
-- 60
-- 7 0
IM5--U
IM7--L
IM7--U
Two--Tone Measurements
(f1 + f2)/2 = Center Frequency of 1840 MHz
1
10
100
TWO--TONE SPACING (MHz)
Figure 6. Intermodulation Distortion Products
versus Two--Tone Spacing
-- 2 7
27
26.5
26
1
0
50
V
V
= 28 Vdc, I
= 70 mA, I
= 160 mA, I
= 500 mA
DD
DQ1A
DQ1B
DQ2B
= 1.7 Vdc, f = 1840 MHz, Single--Carrier W--CDMA
3.84 MHz Channel Bandwidth, Input Signal
PAR = 7.5 dB @ 0.01% Probability on CCDF
GS2A
46
-- 2 9
-- 3 1
-- 3 3
-- 3 5
-- 3 7
-- 3 9
-- 1
-- 2
42
38
34
30
26
-- 1 d B = 3 4 W
PAE
25.5
25
G
ps
-- 2 d B = 4 4 W
-- 3
-- 4
-- 3 d B = 5 8 W
50
24.5
24
PARC
ACPR
30
-- 5
20
40
60
70
P
, OUTPUT POWER (WATTS)
out
Figure 7. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
7
TYPICAL CHARACTERISTICS
28
60
0
1880 MHz
1805 MHz
1840 MHz
1805 MHz
G
V
ps
27
26
25
24
23
22
-- 1 0
-- 2 0
-- 3 0
-- 4 0
-- 5 0
-- 6 0
50
40
30
20
10
0
= 28 Vdc, I
= 70 mA, I
GS2A
= 160 mA
DD
DQ1A
DQ1B
I
= 500 mA, V
= 1.7 Vdc
DQ2B
Single--Carrier W--CDMA
1880 MHz
3.84 MHz Channel Bandwidth
Input Signal PAR = 7.5 dB @
0.01% Probability on CCDF
1805 MHz
1840 MHz
ACPR
PAE
1
10
, OUTPUT POWER (WATTS) AVG.
100
P
out
Figure 8. Single--Carrier W--CDMA Power Gain, Power Added
Efficiency and ACPR versus Output Power
30
0
Gain
-- 6
25
20
15
-- 1 2
-- 1 8
IRL
-- 2 4
--30
-- 3 6
10
V
P
= 28 Vdc
= 0 dBm
= 70 mA, I
= 500 mA, V
DD
in
5
0
I
I
= 160 mA
DQ1A
DQ2B
DQ1B
= 1.7 Vdc
GS2A
1500 1625 1750 1875 2000 2125
2250 2375 2500
f, FREQUENCY (MHz)
Figure 9. Broadband Frequency Response
W--CDMA TEST SIGNAL
100
10
10
0
-- 1 0
-- 2 0
-- 3 0
-- 4 0
3.84 MHz
Channel BW
1
Input Signal
0.1
0.01
-- 5 0
-- 6 0
W--CDMA. ACPR Measured in 3.84 MHz
Channel Bandwidth @ ±5 MHz Offset.
Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF
+ACPR in 3.84 MHz
Integrated BW
--ACPR in 3.84 MHz
Integrated BW
0.001
-- 7 0
-- 8 0
0.0001
0
1
2
3
4
5
6
7
8
9
10
-- 9 0
PEAK--TO--AVERAGE (dB)
--100
Figure 10. CCDF W--CDMA IQ Magnitude
Clipping, Single--Carrier Test Signal
-- 9 -- 7 . 2 -- 5 . 4 -- 3 . 6 -- 1 . 8
0
1.8 3.6
5.4 7.2
9
f, FREQUENCY (MHz)
Figure 11. Single--Carrier W--CDMA Spectrum
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
8
V
= 28 Vdc, I
= 120 mA, I
= 450 mA
DD
DQ1B
(1)
DQ2B
Max P
out
f
Z
Z
load
in
MHz
Watts
68
dBm
48.3
48.4
48.7
Ω
Ω
1805
1840
1880
56.20 + j3.50
60.80 -- j6.10
57.90 -- j12.00
2.79 -- j5.39
2.81 -- j5.45
2.41 -- j5.63
69
74
(1) Maximum output power measurement reflects pulsed 1 dB gain compression.
Z
Z
= Device input impedance as measured from gate to ground.
= Test circuit impedance as measured from drain to ground.
in
load
Output
Device
Matching
Network
Under Test
Z
Z
in
load
Figure 12. Maximum Output Power — Doherty Load Pull Optimization for Carrier Side
V
= 28 Vdc, I
= 120 mA, I
= 450 mA
DD
DQ1B
DQ2B
(1)
f
Max Eff.
%
Z
Ω
Z
load
Ω
in
MHz
1805
1840
1880
53.3
53.4
54.0
56.20 + j3.50
60.80 -- j6.10
57.90 -- j12.00
4.10 -- j4.49
3.74 -- j4.54
3.65 -- j4.55
(1) Maximum efficiency measurement reflects pulsed 1 dB gain compression.
Z
Z
= Device input impedance as measured from gate to ground.
= Test circuit impedance as measured from drain to ground.
in
load
Output
Device
Matching
Network
Under Test
Z
Z
in
load
Figure 13. Maximum Efficiency — Doherty Load Pull Optimization for Carrier Side
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
9
ALTERNATIVE PEAK TUNE LOAD PULL CHARACTERISTICS
V
= 28 Vdc, I
= 120 mA, I
= 450 mA, Pulsed CW,
DD
DQ1B
DQ2B
10 μsec(on), 10% Duty Cycle
60
58
56
54
52
50
48
46
44
42
40
Ideal
Actual
1805 MHz
1840 MHz
1880 MHz
1880 MHz
1840 MHz
1805 MHz
38
9
11 13 15 17 19 21 23 25 27 29 31
P , INPUT POWER (dBm)
in
NOTE: Load Pull Test Fixture Tuned for Peak P1dB Output Power @ 28 V
P1dB
Watts
P3dB
Watts
f
dBm
48.5
48.4
48.7
dBm
49.5
49.5
49.3
(MHz)
1805
1840
1880
70
69
74
89
89
85
Test Impedances per Compression Level
f
Z
Z
load
source
(MHz)
Ω
Ω
1805
1840
1880
P1dB 56.20 -- j3.50
P1dB 60.80 + j6.10
P1dB 57.90 + j12.00
2.80 -- j5.40
2.80 -- j5.40
2.40 -- j5.60
Figure 14. Pulsed CW Output Power
versus Input Power @ 28 V
NOTE: Measurement made on the Class AB, carrier side of the device.
MD7IC18120NR1 MD7IC18120GNR1
10
RF Device Data
Freescale Semiconductor
PACKAGE DIMENSIONS
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
11
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
12
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
13
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
14
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
15
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
16
PRODUCT DOCUMENTATION AND SOFTWARE
Refer to the following documents, tools and software to aid your design process.
Application Notes
•
•
•
AN1955: Thermal Measurement Methodology of RF Power Amplifiers
AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family
Engineering Bulletins
EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
•
•
•
•
Electromigration MTTF Calculator
RF High Power Model
.s2p File
For Software, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the Software &
Tools tab on the part’s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
May 2010
• Initial Release of Data Sheet
MD7IC18120NR1 MD7IC18120GNR1
RF Device Data
Freescale Semiconductor
17
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Document Number: MD7IC18120N
Rev. 0, 5/2010
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