CBT3126DB [NXP]
Quadruple FET bus switch; 四路FET总线开关
| 型号： | CBT3126DB |
| 厂家： | 
NXP |
| 描述： | Quadruple FET bus switch |
| 文件： | 总10页 (文件大小：97K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
CBT3126
Quadruple FET bus switch
Product data
2001 Dec 12
File under Integrated Circuits — ICL03
Philips
Semiconductors
Philips Semiconductors
Product data
Quadruple FET bus switch
CBT3126
DESCRIPTION
PIN CONFIGURATION
The CBT3126 quadruple FET bus switch features independent line
switches. Each switch is disabled when the associated Output
Enable (OE) input is LOW.
1OE
1A
1
2
3
4
5
6
7
14 V
CC
13 4OE
12 4A
1B
FEATURES
2OE
2A
11 4B
• Standard ’126-type pinout (D, DB, and PW packages)
10 3OE
2B
9
8
3A
3B
• 5 Ω switch connection between two ports
• TTL-compatible input levels
GND
SA00560
• Latch-up testing is done to JESDEC Standard JESD78 which
exceeds 500 mA
Figure 1. SO14, SSOP14, and TSSOP14
• ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
NC
1OE
1A
1
2
3
4
5
6
7
8
16 V
CC
15 4OE
14 4A
13 4B
12 3OE
11 3A
10 3B
1B
2OE
2A
2B
GND
9
NC
SA00561
NC = no internal connection
Figure 2. SSOP(QSOP)16
ORDERING INFORMATION
PACKAGE
14-Pin Plastic SO
TEMPERATURE RANGE
–40 to +85 °C
ORDER CODE
PACKAGE DWG. #
SOT108-1
CBT3126D
CBT3126DB
CBT3126DS
CBT3126PW
14-Pin Plastic SSOP
–40 to +85 °C
SOT337-1
16-Pin Plastic SSOP(QSOP)
14-Pin Plastic TSSOP
–40 to +85 °C
SOT519-1
–40 to +85 °C
SOT402-1
Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.
2
2001 Dec 12
853-2310 27452
Philips Semiconductors
Product data
Quadruple FET bus switch
CBT3126
LOGIC DIAGRAM
FUNCTION TABLE (each bus switch)
INPUT
OE
FUNCTION
disconnect
2
3
1A
1B
2B
3B
4B
L
1
5
1OE
2A
H
A = B
6
8
4
9
2OE
3A
10
12
3OE
4A
11
13
4OE
SA00559
Pin numbers shown are for 14-pin package-types.
Figure 3. CBT3126 logic diagram (positive logic)
1
ABSOLUTE MAXIMUM RATINGS
Over operating free-air temperature range, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN.
–0.5
–0.5
—
MAX.
7
UNIT
V
V
CC
supply voltage range
input voltage range
V
I
see Note 2
7
V
continuous channel current
input clamp current
128
–50
+150
mA
mA
°C
I
K
V
I/O
< 0
—
T
stg
storage temperature range
–65
NOTES:
1. Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions”
is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
1
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN.
4.5
2
MAX.
UNIT
V
V
CC
supply voltage
5.5
V
IH
high-level control input voltage
V
V
IL
low-level control input voltage
—
0.8
V
T
amb
operating ambient temperature in free-air
–40
+85
°C
NOTE:
1. All unused control inputs of the device must be held at V or GND to ensure proper device operation.
CC
3
2001 Dec 12
Philips Semiconductors
Product data
Quadruple FET bus switch
CBT3126
DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range, unless otherwise noted.
1
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
= 4.5 V;
CC
V
IK
Input clamp voltage
—
—
–1.2
V
I = –18 mA
I
V
= 5.5 V;
CC
I
Input leakage current
—
—
—
—
±1
µA
µA
I
V = 5.5 V or GND
I
V
CC
= 5.5 V; I = 0;
O
CC
I
Quiescent supply current
3
CC
V = V or GND
I
V
= 5.5 V;
CC
Additional supply current per
input pin (Note 2)
one input at 3.4 V,
other inputs at V or GND
∆I
CC
control inputs
—
—
2.5
mA
CC
C
Input capacitance
control inputs V = 3 V or 0
—
—
1.7
3.4
—
—
pF
pF
I
I
C
Power-off leakage current
V
V
= 3 V or 0; OE = GND
IO(OFF)
O
= 5.0 V;
CC
V
P
Pass gate voltage
—
—
3.8
16
—
V
V = 5.0 V
I
V
CC
= 4 V;
TYP at V = 4 V;
22
Ω
CC
V = 2.4 V; I = 15 mA
I
I
V
= 4.5 V; V = 0 V;
I
CC
—
—
—
5
5
7
7
Ω
Ω
Ω
I = 64 mA
I
r
on
On-resistance (Note 3)
V
CC
= 4.5 V; V = 0 V;
I
I = 30 mA
I
V
CC
= 4.5 V; V = 2.4 V;
I
10
15
I = 15 mA
I
NOTES:
1. All typical values are at V = 5 V, unless otherwise noted. T
= 25 °C.
amb
CC
2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V or GND.
CC
3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
AC CHARACTERISTICS
T
amb
= –40 to +85 °C; C = 50 pF, unless otherwise noted.
L
V
= 5 V ± 0.5 V
CC
TO
(OUTPUT)
SYMBOL
PARAMETER
FROM (INPUT)
UNIT
Min
Max
1
t
t
Propagation delay
A or B
OE
B or A
A or B
0.25
4.5
ns
ns
pd
Output enable time
to High and Low level
1.6
1
en
Output disable time
from High and Low level
t
dis
OE
A or B
4.0
ns
NOTE:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).
4
2001 Dec 12
Philips Semiconductors
Product data
Quadruple FET bus switch
CBT3126
AC WAVEFORMS
TEST CIRCUIT
V
= 1.5 V, V = GND to 3.0V
M
IN
7 V
3 V
0 V
500 Ω
S1
From Output
Under Test
Open
GND
1.5 V
1.5 V
INPUT
500 Ω
C
= 50 pF
L
t
t
PHL
PLH
Load Circuit
V
OH
1.5 V
1.5 V
TEST
S1
OUTPUT
t
open
7 V
pd
V
OL
t
/t
PLZ PZL
SA00028
t
/t
open
PHZ PZH
t
and t
are the same as t .
PLH
PHL pd
DEFINITIONS
Waveform 1. Input to Output Propagation Delays
C
=
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
L
SA00012
3 V
t
t
and t
and t
are the same as t
.
dis
PLZ
PHZ
Output Control
1.5 V
1.5 V
are the same as t
.
PZL
PZH
en
0 V
t
t
PLZ
PZL
3.5 V
NOTES:
1. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns,
Output
Waveform 1
S1 at 7 V
1.5 V
1.5 V
O
r
V
V
+ 0.3 V
– 0.3 V
OL
t ≤ 2.5 ns.
(see Note)
f
V
V
OL
2. The outputs are measured one at a time with one transition per
measurement.
t
t
PHZ
PZH
OH
Output
Waveform 2
S1 at Open
(see Note)
OH
0 V
Note:
Waveform 1 is for an output with internal conditions such that
the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is high except when disabled by the output control.
SA00558
t
t
and t
and t
are the same as t
.
dis
PLZ
PHZ
are the same as t
.
PZL
PZH
en
Waveform 2. Output Enable and Disable Times
5
2001 Dec 12
Philips Semiconductors
Product data
Quadruple FET bus switch
CBT3126
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
6
2001 Dec 12
Philips Semiconductors
Product data
Quadruple FET bus switch
CBT3126
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
7
2001 Dec 12
Philips Semiconductors
Product data
Quadruple FET bus switch
CBT3126
SSOP16: plastic shrink small outline package; 16 leads;
body width 3.9 mm; lead pitch 0.635 mm
SOT519-1
8
2001 Dec 12
Philips Semiconductors
Product data
Quadruple FET bus switch
CBT3126
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
9
2001 Dec 12
Philips Semiconductors
Product data
Quadruple FET bus switch
CBT3126
Data sheet status
Product
status
Definitions
[1]
Data sheet status
[2]
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
Preliminary data
Product data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be
published at a later date. Philips Semiconductors reserves the right to change the specification
without notice, in order to improve the design and supply the best possible product.
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply.
Changes will be communicated according to the Customer Product/Process Change Notification
(CPCN) procedure SNW-SQ-650A.
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Koninklijke Philips Electronics N.V. 2001
Contact information
All rights reserved. Printed in U.S.A.
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 12-01
9397 750 09219
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document order number:
Philips
Semiconductors
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