935209640512 [NXP]

ALVT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, PLASTIC, SOT-362, TSSOP-48;
935209640512
型号: 935209640512
厂家: NXP    NXP
描述:

ALVT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, PLASTIC, SOT-362, TSSOP-48

驱动 信息通信管理 光电二极管 输出元件 逻辑集成电路
文件: 总12页 (文件大小:110K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74ALVT16373  
2.5V/3.3V 16-bit transparent  
D-type latch (3-State)  
Product specification  
1999 Oct 18  
Supersedes data of 1998 Feb 13  
IC23 Data Handbook  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
FEATURES  
16-bit transparent latch  
DESCRIPTION  
The 74ALVT16373 is a high-performance BiCMOS product  
designed for V operation at 2.5V or 3.3V with I/O compatibility up  
CC  
5V I/O compatibile  
to 5V.  
3-State buffers  
This device is a 16-bit transparent D-type latch with non-inverting  
3-State bus compatible outputs. The device can be used as two  
8-bit latches or one 16-bit latch. When latch enable (LE) input is  
High, the Q outputs follow the data (D) inputs. When latch enable is  
taken Low, the Q outputs are latched at the levels of the D inputs  
one setup time prior to the High-to-Low transition.  
Output capability: +64mA/-32mA  
TTL input and output switching levels  
Input and output interface capability to systems at 5V supply  
Bus-hold data inputs eliminate the need for external pull-up  
resistors to hold unused inputs  
Live insertion/extraction permitted  
Power-up reset  
Power-up 3-State  
No bus current loading when output is tied to 5V bus  
Latch-up protection exceeds 500mA per JEDEC Std 17  
ESD protection exceeds 2000V per MIL STD 883 Method 3015  
and 200V per Machine Model  
QUICK REFERENCE DATA  
TYPICAL  
CONDITIONS  
SYMBOL  
PARAMETER  
UNIT  
T
amb  
= 25°C  
2.5V  
3.3V  
t
t
Propagation delay  
nDx to nQx  
2.0  
2.4  
1.6  
1.8  
PLH  
PHL  
C = 50pF  
L
ns  
C
Input capacitance  
Output capacitance  
Total supply current  
V = 0V or V  
CC  
3
9
3
9
pF  
pF  
µA  
IN  
I
C
Outputs disabled; V = 0V or 3.0V  
OUT  
CCZ  
O
I
Outputs disabled  
40  
70  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
AV16373 DL  
DWG NUMBER  
SOT370-1  
48-Pin Plastic SSOP Type III  
48-Pin Plastic TSSOP Type II  
–40°C to +85°C  
–40°C to +85°C  
74ALVT16373 DL  
74ALVT16373 DGG  
AV16373 DGG  
SOT362-1  
2
1999 Oct 18  
853-1842 22536  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
LOGIC SYMBOL  
LOGIC SYMBOL (IEEE/IEC)  
47 46 44 43 41 40 38 37  
1
1EN  
C3  
1OE  
1LE  
2OE  
2LE  
48  
24  
25  
2EN  
C4  
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7  
1LE  
48  
1
1OE  
47  
46  
44  
43  
41  
40  
38  
37  
36  
2
3D  
1
1D1  
1D2  
1D3  
1D4  
1D5  
1D6  
1D7  
1D8  
2D1  
1Q1  
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7  
3
1Q2  
5
1Q3  
6
2
3
5
6
8
9
11 12  
1Q4  
8
1Q5  
36 35 33 32 30 29 27 26  
9
1Q6  
11  
1Q7  
12  
2D0 2D21 2D2 2D3 2D4 2D5 2D6 2D7  
1Q8  
25  
24  
2LE  
13  
4D  
2
2Q1  
2OE  
35  
33  
32  
30  
29  
27  
26  
14  
2D2  
2D3  
2D4  
2D5  
2D6  
2D7  
2D8  
2Q2  
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7  
16  
2Q3  
17  
2Q4  
19  
2Q5  
13 14 16 17 19 20 22 23  
SA00044  
20  
2Q6  
22  
2Q7  
23  
2Q8  
PIN DESCRIPTION  
SW00010  
PIN NUMBER  
SYMBOL  
FUNCTION  
47, 46, 44, 43, 41, 40, 38, 37,  
36, 35, 33, 32, 30, 29, 27, 26  
1D0 – 1D7  
2D0 – 2D7  
Data inputs  
PIN CONFIGURATION  
2, 3, 5, 6, 8, 9, 11, 12, 13,  
14, 16, 17, 19, 20, 22, 23  
1Q0 – 1Q7  
2Q0 – 2Q7  
Data outputs  
1
2
48  
47  
1OE  
1Q0  
1Q1  
GND  
1Q2  
1Q3  
1LE  
1D0  
Output enable  
inputs  
(active-Low)  
3
46 1D1  
1, 24  
1OE, 2OE  
GND  
1D2  
4
45  
44  
5
Enable inputs  
(active-High)  
48, 25  
1LE, 2LE  
GND  
6
43 1D3  
7
42  
4, 10, 15, 21, 28, 34, 39, 45  
7, 18, 31, 42  
Ground (0V)  
V
V
CC  
CC  
8
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
1Q4  
1Q5  
1D4  
1D5  
Positive  
supply voltage  
V
CC  
9
GND  
GND  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
1Q6  
1Q7  
2Q0  
2Q1  
GND  
1D6  
1D7  
2D0  
2D1  
GND  
2Q2  
2Q3  
2D2  
2D3  
V
V
CC  
CC  
2Q4  
2D4  
2Q5 20  
29 2D5  
21  
22  
23  
24  
28  
27  
26  
25  
GND  
2Q6  
GND  
2D6  
2Q7  
2OE  
2D7  
2LE  
SA00043  
3
1999 Oct 18  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
LOGIC DIAGRAM  
nD0  
nD1  
nD2  
nD3  
nD4  
nD5  
nD6  
nD7  
D
E
D
E
D
E
D
E
D
E
D
E
D
D
E
Q
Q
Q
Q
Q
Q
E
Q
Q
nLE  
nOE  
nQ0  
nQ1  
nQ2  
nQ3  
nQ4  
nQ5  
nQ6  
nQ7  
SA00046  
FUNCTION TABLE  
INPUTS  
INTERNAL  
REGISTER  
OUTPUTS  
nQ0 – nQ7  
OPERATING MODE  
nOE  
nLE  
nDx  
L
L
H
H
L
H
L
H
L
H
Enable and read register  
L
L
l
h
L
H
L
H
Latch and read register  
Hold  
L
L
X
NC  
NC  
H
H
L
H
X
nDx  
NC  
nDx  
Z
Z
Disable outputs  
H
h
L
l
=
=
=
=
High voltage level  
High voltage level one set-up time prior to the High-to-Low E transition  
Low voltage level  
Low voltage level one set-up time prior to the High-to-Low E transition  
NC= No change  
X
Z
=
=
=
Don’t care  
High impedance “offstate  
High-to-Low E transition  
4
1999 Oct 18  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
CONDITIONS  
RATING  
UNIT  
V
V
CC  
I
IK  
DC supply voltage  
–0.5 to +4.6  
–50  
DC input diode current  
V < 0  
I
mA  
V
3
V
I
DC input voltage  
–0.5 to +7.0  
–50  
I
DC output diode current  
V
O
< 0  
mA  
V
OK  
3
V
OUT  
DC output voltage  
Output in Off or High state  
Output in Low state  
–0.5 to +7.0  
128  
I
DC output current  
mA  
OUT  
Output in High state  
–64  
T
stg  
Storage temperature range  
–65 to +150  
°C  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.  
RECOMMENDED OPERATING CONDITIONS  
2.5V RANGE LIMITS 3.3V RANGE LIMITS  
SYMBOL  
PARAMETER  
UNIT  
MIN  
2.3  
0
MAX  
2.7  
MIN  
3.0  
0
MAX  
3.6  
V
CC  
DC supply voltage  
Input voltage  
V
V
V
I
5.5  
5.5  
V
High-level input voltage  
Input voltage  
1.7  
2.0  
V
IH  
V
0.7  
–8  
8
0.8  
–32  
32  
V
IL  
I
High-level output current  
Low-level output current  
mA  
OH  
I
OL  
mA  
Low-level output current; current duty cycle 50%; f 1kHz  
Input transition rise or fall rate; Outputs enabled  
Operating free-air temperature range  
24  
10  
+85  
64  
t/v  
10  
ns/V  
T
amb  
–40  
–40  
+85  
°C  
5
1999 Oct 18  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
DC ELECTRICAL CHARACTERISTICS (3.3V "0.3V RANGE)  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
Temp = -40°C to +85°C  
UNIT  
1
MIN  
TYP  
–0.85  
MAX  
V
Input clamp voltage  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 3.0V; I = –18mA  
–1.2  
V
V
IK  
IK  
= 3.0 to 3.6V; I = –100µA  
V
–0.2  
V
CC  
OH  
CC  
V
OH  
High-level output voltage  
= 3.0V; I = –32mA  
2.0  
2.3  
0.07  
0.25  
0.3  
OH  
= 3.0V; I = 100µA  
0.2  
0.4  
OL  
= 3.0V; I = 16mA  
OL  
V
OL  
Low–level output voltage  
V
= 3.0V; I = 32mA  
0.5  
OL  
= 3.0V; I = 64mA  
0.4  
0.55  
OL  
6
V
Power-up output low voltage  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 3.6V; I = 1mA; V = V or GND  
0.55  
±1  
V
RST  
O
I
CC  
= 3.6V; V = V or GND  
Control pins  
0.1  
0.1  
I
CC  
= 0 or 3.6V; V = 5.5V  
10  
I
I
I
Input leakage current  
µA  
= 3.6V; V = V  
0.5  
1
I
CC  
4
Data pins  
= 3.6V; V = 0V  
0.1  
-5  
I
I
Off current  
= 0V; V or V = 0 to 4.5V  
0.1  
±100  
µA  
µA  
OFF  
I
O
= 3V; V = 0.8V  
75  
130  
–140  
I
Bus Hold current  
= 3V; V = 2.0V  
–75  
I
I
HOLD  
7
Data inputs  
= 0V to 3.6V; V = 3.6V  
±500  
CC  
Current into an output in the  
I
V
= 5.5V; V = 3.0V  
10  
1
125  
µA  
µA  
EX  
O
CC  
High state when V > V  
O
CC  
Power up/down 3-State output  
V
CC  
1.2V; V = 0.5V to V ; V = GND or V  
;
CC  
O
CC  
I
I
±100  
PU/PD  
3
current  
OE/OE = Don’t care  
I
3-State output High current  
3-State output Low current  
V
V
V
V
V
V
= 3.6V; V = 3.0V; V = V or V  
0.5  
0.5  
5
µA  
µA  
OZH  
CC  
CC  
CC  
CC  
CC  
CC  
O
I
IL  
IH  
IH  
I
= 3.6V; V = 0.5V; V = V or V  
–5  
0.1  
5
OZL  
O
I
IL  
I
= 3.6V; Outputs High, V = GND or V I 0  
CC, O =  
0.04  
3.5  
CCH  
I
I
Quiescent supply current  
= 3.6V; Outputs Low, V = GND or V I 0  
CC, O =  
mA  
mA  
CCL  
CCZ  
I
5
I
= 3.6V; Outputs Disabled; V = GND or V  
I 0  
CC, O =  
0.05  
0.1  
I
Additional supply current per  
= 3V to 3.6V; One input at V –0.6V,  
CC  
I  
0.04  
0.4  
CC  
2
input pin  
Other inputs at V or GND  
CC  
NOTES:  
1. All typical values are at V = 3.3V and T  
= 25°C.  
amb  
CC  
2. This is the increase in supply current for each input at the specified voltage level other than V or GND  
CC  
3. This parameter is valid for any V between 0V and 1.2V with a transition time of up to 10msec. From V = 1.2V to V = 3.3V ± 0.3V a  
CC  
CC  
CC  
transition time of 100µsec is permitted. This parameter is valid for T  
= 25°C only.  
amb  
4. Unused pins at V or GND.  
CC  
5. I  
is measured with outputs pulled up to V or pulled down to ground.  
CCZ  
CC  
6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.  
7. This is the bus hold overdrive current required to force the input to the opposite logic state.  
AC CHARACTERISTICS (3.3V "0.3V RANGE)  
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500; T  
= –40°C to +85°C.  
R
F
L
L
amb  
LIMITS  
SYMBOL  
PARAMETER  
WAVEFORM  
V
CC  
= 3.3V "0.3V  
UNIT  
1
MIN  
TYP  
MAX  
t
t
Propagation delay  
nDx to nQx  
0.5  
0.5  
1.6  
1.8  
2.5  
2.9  
PLH  
PHL  
2
1
ns  
ns  
ns  
ns  
t
t
Propagation delay  
nLE to nQx  
1.0  
1.0  
2.0  
2.3  
3.1  
3.3  
PLH  
PHL  
t
Output enable time  
to High and Low level  
4
5
1.5  
1.0  
2.3  
1.9  
4.0  
3.1  
PZH  
t
PZL  
t
Output disable time  
from High and Low Level  
4
5
1.5  
1.5  
2.9  
2.3  
4.5  
3.7  
PHZ  
t
PLZ  
NOTE:  
1. All typical values are at V = 3.3V and T  
= 25°C.  
CC  
amb  
6
1999 Oct 18  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
DC ELECTRICAL CHARACTERISTICS (2.5V "0.2V RANGE)  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
Temp = -40°C to +85°C  
UNIT  
1
MIN  
TYP  
MAX  
V
Input clamp voltage  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2.3V; I = –18mA  
–0.85  
–1.2  
V
V
IK  
IK  
= 2.3 to 3.6V; I = –100µA  
V
–0.2  
OH  
CC  
V
OH  
High-level output voltage  
= 2.3V; I = –8mA  
1.8  
OH  
= 2.3V; I = 100µA  
0.07  
0.3  
0.2  
0.5  
OL  
V
OL  
Low-level output voltage  
= 2.3V; I = 24mA  
OL  
7
V
Power-up output low voltage  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2.7V; I = 1mA; V = V or GND  
0.55  
±1  
V
RST  
O
I
CC  
= 2.7V; V = V  
or GND  
CC  
Control pins  
0.1  
0.1  
0.1  
0.1  
0.1  
90  
I
= 0 or 2.7V; V = 5.5V  
10  
I
I
I
Input leakage current  
µA  
= 2.7V; V = V  
1
I
CC  
4
Data pins  
= 2.7V; V = 0  
-5  
I
I
Off current  
= 0V; V or V = 0 to 4.5V  
"100  
µA  
µA  
OFF  
I
O
Bus Hold current  
= 2.3V; V = 0.7V  
I
I
HOLD  
6
Data inputs  
= 2.3V; V = 1.7V  
–10  
I
Current into an output in the  
I
V
= 5.5V; V = 2.3V  
10  
1
125  
100  
µA  
µA  
EX  
O
CC  
High state when V > V  
O
CC  
Power up/down 3-State output  
V
CC  
1.2V; V = 0.5V to V ; V = GND or V  
;
CC  
O
CC  
I
I
PU/PD  
3
current  
OE/OE = Don’t care  
I
3-State output High current  
3-State output Low current  
V
V
V
V
V
V
= 2.7V; V = 2.3V; V = V or V  
0.5  
0.5  
5
µA  
µA  
OZH  
CC  
CC  
CC  
CC  
CC  
CC  
O
I
IL  
IH  
IH  
I
= 2.7V; V = 0.5V; V = V or V  
–5  
OZL  
O
I
IL  
I
= 2.7V; Outputs High, V = GND or V I 0  
CC, O =  
0.04  
2.3  
0.1  
4.5  
0.1  
CCH  
I
I
Quiescent supply current  
= 2.7V; Outputs Low, V = GND or V I 0  
CC, O =  
mA  
mA  
CCL  
CCZ  
I
5
I
= 2.7V; Outputs Disabled; V = GND or V  
I 0  
CC, O =  
0.04  
I
Additional supply current per  
= 2.3V to 2.7V; One input at V –0.6V,  
CC  
I  
0.04  
0.4  
CC  
2
input pin  
Other inputs at V or GND  
CC  
NOTES:  
1. All typical values are at V = 2.5V and T  
= 25°C.  
amb  
CC  
2. This is the increase in supply current for each input at the specified voltage level other than V or GND  
CC  
3. This parameter is valid for any V between 0V and 1.2V with a transition time of up to 10msec. From V = 1.2V to V = 2.5V ± 0.2V a  
CC  
CC  
CC  
transition time of 100µsec is permitted. This parameter is valid for T  
= 25°C only.  
amb  
4. Unused pins at V or GND.  
CC  
5. I  
is measured with outputs pulled up to V or pulled down to ground.  
CCZ  
CC  
6. Not guaranteed.  
7. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.  
AC CHARACTERISTICS (2.5V "0.2V RANGE)  
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500; T  
= –40°C to +85°C.  
R
F
L
L
amb  
LIMITS  
SYMBOL  
PARAMETER  
WAVEFORM  
V
CC  
= 2.5V "0.2V  
UNIT  
1
MIN  
TYP  
MAX  
t
t
Propagation delay  
nDx to nQx  
1.0  
1.0  
2.0  
2.4  
3.2  
4.2  
PLH  
PHL  
2
1
ns  
ns  
ns  
ns  
t
t
Propagation delay  
nLE to nQx  
1.5  
1.5  
2.6  
2.8  
4.2  
4.5  
PLH  
PHL  
t
Output enable time  
to High and Low level  
4
5
2.0  
1.5  
3.5  
2.6  
5.5  
4.7  
PZH  
t
PZL  
t
Output disable time  
from High and Low Level  
4
5
1.5  
1.0  
2.7  
2.0  
4.5  
3.5  
PHZ  
t
PLZ  
NOTE:  
1. All typical values are at V = 2.5V and T  
= 25°C.  
CC  
amb  
7
1999 Oct 18  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
AC SETUP REQUIREMENTS  
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500; T  
= –40°C to +85°C.  
R
F
L
L
amb  
LIMITS  
V
CC  
= 2.5V ±0.2V  
V
CC  
= 3.3V ±0.3V  
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
MIN  
TYP  
MIN  
TYP  
t (H)  
t (L)  
S
Setup time  
nDx to nLE  
0
1.5  
–0.7  
0.2  
0.5  
0.8  
–0.2  
0.2  
S
3
3
1
ns  
ns  
ns  
t (H)  
Hold time  
nDx to nLE  
0.5  
1.5  
–0.2  
0.7  
0.8  
1.0  
0
0.2  
h
t (L)  
h
nLE pulse width  
High  
1.5  
1.5  
1.5  
1.5  
t (H)  
W
AC WAVEFORMS  
For all waveforms  
nDx  
3.0V or V  
whichever  
is less  
CC  
V
V
V
V
= 1.5V for V w 3.0V; V = V /2 for V v 2.7V  
M
M
X
CC M CC CC  
= 1.5V for V w 3.0V; V = V /2 for V v 2.7V  
CC  
M
CC  
CC  
V
V
M
V
V
M
M
M
M
= V + 0.3V for V  
w 3.0V; V = V + 0.15V for V v 2.7V  
w 3.0V; V = V – 0.15V for V  
CC  
OL  
CC  
X OL CC  
= V – 0.3V for V  
v
0V  
Y
OH  
CC  
Y
OH  
2.7V  
t
(H)  
t (L)  
s
t
(H)  
t (L)  
h
s
h
3.0V or V  
whichever  
is less  
CC  
nLE  
V
V
M
3.0V or V  
CC  
whichever  
is less  
0V  
nLE  
V
V
V
t
M
t
M
M
NOTE: The shaded areas indicate when the input is per-  
mitted to change for predictable output performance.  
0V  
SW00165  
(H)  
w
t
Waveform 3. Data Setup and Hold Times  
PHL  
PLH  
V
V
OH  
OL  
nQx  
V
V
M
M
3.0V or V  
CC  
whichever  
is less  
V
V
M
SW00163  
nOE  
nQx  
M
0V  
Waveform 1. Propagation Delay, Enable to  
Output, and Enable Pulse Width  
t
t
PHZ  
PZH  
V
OH  
V
V
X
M
3.0V or V  
whichever  
is less  
CC  
0V  
V
V
M
M
t
nDx  
SW00166  
0V  
t
Waveform 4. 3-State Output Enable time to High Level  
and Output Disable Time from High Level  
PLH  
PHL  
V
V
OH  
OL  
nQx  
V
M
V
M
3.0V or V  
CC  
whichever  
is less  
nOE  
nQx  
V
V
M
SW00164  
M
0V  
Waveform 2. Propagation Delay for Data to Outputs  
t
t
PLZ  
PZL  
3.0V or V  
CC  
V
M
V
Y
V
OL  
SW00167  
Waveform 5. 3-State Output Enable Time to Low Level  
and Output Disable Time from Low Level  
8
1999 Oct 18  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
TEST CIRCUIT AND WAVEFORMS  
6V or  
V
t
W
V
x 2  
CC  
AMP (V)  
90%  
CC  
90%  
OPEN  
NEGATIVE  
PULSE  
V
V
M
10%  
M
10%  
GND  
V
V
OUT  
IN  
R
R
L
L
0V  
(t  
PULSE  
GENERATOR  
D.U.T.  
t
t
(t  
(t  
)
t
t
)
THL  
F
TLH  
R
)
(t )  
F
R
C
TLH  
R
THL  
T
L
AMP (V)  
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
Test Circuit for 3-State Outputs  
10%  
10%  
t
W
0V  
SWITCH POSITION  
V
M
= 1.5V or V / 2, whichever is less  
CC  
TEST  
SWITCH  
Input Pulse Definition  
t
/t  
GND  
PHZ PZH  
t
/t  
6V or V x 2  
PLZ PZL  
CC  
t
/t  
open  
PLH PHL  
INPUT PULSE REQUIREMENTS  
DEFINITIONS  
FAMILY  
R = Load resistor; see AC CHARACTERISTICS for value.  
Amplitude  
3.0V or V  
whichever  
is less  
Rep. Rate  
t
t
t
L
W
R
F
C = Load capacitance includes jig and probe capacitance;  
L
CC  
see AC CHARACTERISTICS for value.  
74ALVT16  
10MHz  
500ns 2.5ns 2.5ns  
R = Termination resistance should be equal to Z  
T
of  
OUT  
pulse generators.  
SW00162  
9
1999 Oct 18  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm  
SOT370-1  
10  
1999 Oct 18  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm  
SOT362-1  
11  
1999 Oct 18  
Philips Semiconductors  
Product specification  
2.5V/3.3V 16-bit transparent D-type latch (3-State)  
74ALVT16373  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make changes at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1999  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 10-99  
9397-750-06516  
Document order number:  
Philips  
Semiconductors  

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