933406770653

更新时间:2024-09-18 14:20:47
品牌:NXP
描述:IC 4000/14000/40000 SERIES, ASYN NEGATIVE EDGE TRIGGERED 24-BIT UP BINARY COUNTER, PDSO16, PLASTIC, SOT-109-1, SO-16, Counter

933406770653 概述

IC 4000/14000/40000 SERIES, ASYN NEGATIVE EDGE TRIGGERED 24-BIT UP BINARY COUNTER, PDSO16, PLASTIC, SOT-109-1, SO-16, Counter 计数器

933406770653 规格参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
包装说明:PLASTIC, SOT-109-1, SO-16针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.07计数方向:UP
系列:4000/14000/40000JESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
负载/预设输入:YES逻辑集成电路类型:BINARY COUNTER
工作模式:ASYNCHRONOUS湿度敏感等级:1
位数:24功能数量:1
端子数量:16封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
传播延迟(tpd):1900 ns认证状态:Not Qualified
座面最大高度:1.75 mm标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30触发器类型:NEGATIVE EDGE
宽度:3.9 mm最小 fmax:17 MHz
Base Number Matches:1

933406770653 数据手册

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INTEGRATED CIRCUITS  
DATA SHEET  
For a complete data sheet, please also download:  
The IC04 LOCMOS HE4000B Logic  
Family Specifications HEF, HEC  
The IC04 LOCMOS HE4000B Logic  
Package Outlines/Information HEF, HEC  
HEF4521B  
MSI  
24-stage frequency divider and  
oscillator  
January 1995  
Product specification  
File under Integrated Circuits, IC04  
Philips Semiconductors  
Product specification  
HEF4521B  
MSI  
24-stage frequency divider and oscillator  
operation as a crystal oscillator is enabled by connecting  
external resistors to pins 3 (VSS’) and 5 (VDD’).  
DESCRIPTION  
The HEF4521B consists of a chain of 24 toggle flip-flops  
with an overriding asynchronous master reset input (MR),  
and an input circuit that allows three modes of operation.  
The single inverting stage (I2/O2) will function as a crystal  
oscillator, or in combination with I1 as an RC oscillator, or  
as an input buffer for an external oscillator. Low-power  
Each flip-flop divides the frequency of the previous flip-flop  
by two, consequently the HEF4521B will count up to  
224 = 16777216. The counting advances on the HIGH to  
LOW transition of the clock (I2). The outputs of the last  
seven stages are available for additional flexibility.  
Fig.1 Functional diagram.  
FAMILY DATA, IDD LIMITS category MSI  
See Family Specifications  
January 1995  
2
Philips Semiconductors  
Product specification  
HEF4521B  
MSI  
24-stage frequency divider and oscillator  
COUNT CAPACITY  
OUTPUT  
COUNT CAPACITY  
218 = 262 144  
219 = 524 288  
220 = 1 048 576  
221 = 2 097 152  
222 = 4 194 304  
223 = 8 388 608  
224 = 16 777 216  
O18  
O19  
O20  
O21  
O22  
O23  
O24  
Fig.2 Pinning diagram.  
HEF4521BP(N): 16-lead DIL; plastic (SOT38-1)  
HEF4521BD(F): 16-lead DIL; ceramic (cerdip) (SOT74)  
HEF4521BT(D): 16-lead SO; plastic (SOT109-1)  
( ): Package Designator North America  
FUNCTIONAL TEST SEQUENCE  
CONTROL  
TERMINALS  
INPUTS  
OUTPUTS  
REMARKS  
MR  
I2  
O2  
VSS  
VDD  
O18 to O24  
H
L
L
VDD  
VSS  
L
counter is in three 8-stage sections  
in parallel mode; I2 and O2 are  
interconnected (O2 is now input);  
counter is reset by MR  
L
VDD  
VSS  
H
255 pulses are clocked into I2, O2  
(the counter advances on the LOW  
to HIGH transition)  
L
L
L
L
H
H
L
L
L
VSS  
VSS  
VSS  
VSS  
VSS  
VDD  
H
H
H
VSS’ is connected to VSS  
the input I2 is made HIGH  
VDD’ is connected to VDD; O2 is  
now made floating and becomes an  
output; the device is now in the  
224 mode  
counter ripples from an all HIGH  
state to an all LOW state  
L
VSS  
VDD  
L
A test function has been included for the reduction of the  
test time required to exercise all 24 counter stages. This  
test function divides the counter into three 8-stage  
sections by connecting VSS’ to VDD and VDD’ to VSS. Via  
I2 (connected to O2) 255 counts are loaded into each of  
the 8-stage sections in parallel. All flip-flops are now at a  
HIGH state.  
The counter is now returned to the normal 24-stage in  
series configuration by connecting VSS’ to VSS and VDD’ to  
VDD. One more pulse is entered into input I2, which will  
cause the counter to ripple from an all HIGH state to an all  
LOW state.  
January 1995  
3
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Fig.3 Logic diagram; for schematic diagram of clock circuit see Fig.4.  
Philips Semiconductors  
Product specification  
HEF4521B  
MSI  
24-stage frequency divider and oscillator  
Fig.4 Schematic diagram of clock input circuitry.  
AC CHARACTERISTICS  
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times 20 ns  
VDD  
V
TYPICAL  
EXTRAPOLATION  
FORMULA  
SYMBOL  
MIN.  
TYP. MAX.  
Propagation delays  
I2 O18  
HIGH to LOW  
5
950 1900  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
923 ns  
339 ns  
212 ns  
923 ns  
339 ns  
212 ns  
13 ns  
4 ns  
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
(0,55 ns/pF) CL  
(0,23 ns/pF) CL  
(0,16 ns/pF) CL  
10  
15  
5
tPHL  
tPLH  
tPHL  
tPLH  
tPHL  
tPHL  
tPLH  
350  
220  
700  
440  
950 1900  
LOW to HIGH  
10  
15  
5
350  
220  
40  
15  
10  
40  
15  
10  
120  
55  
40  
90  
35  
25  
60  
30  
20  
700  
440  
80  
On On + 1  
HIGH to LOW  
10  
15  
5
30  
20  
2 ns  
80  
13 ns  
4 ns  
LOW to HIGH  
10  
15  
5
30  
20  
2 ns  
MR On  
240  
110  
80  
93 ns  
44 ns  
32 ns  
63 ns  
24 ns  
17 ns  
33 ns  
19 ns  
12 ns  
HIGH to LOW  
10  
15  
5
I1 O1  
180  
70  
HIGH to LOW  
10  
15  
5
50  
120  
60  
LOW to HIGH  
January 1995  
10  
15  
40  
5
Philips Semiconductors  
Product specification  
HEF4521B  
MSI  
24-stage frequency divider and oscillator  
VDD  
V
TYPICAL  
EXTRAPOLATION  
FORMULA  
SYMBOL  
MIN.  
TYP. MAX.  
Output transition times  
HIGH to LOW  
5
60  
30  
20  
60  
30  
20  
120  
60  
ns  
ns  
ns  
ns  
ns  
ns  
10 ns  
9 ns  
6 ns  
10 ns  
9 ns  
6 ns  
+
+
+
+
+
+
(1,0 ns/pF) CL  
(0,42 ns/pF) CL  
(0,28 ns/pF) CL  
(1,0 ns/pF) CL  
(0,42 ns/pF) CL  
(0,28 ns/pF) CL  
10  
15  
5
tTHL  
40  
120  
60  
LOW to HIGH  
10  
15  
tTLH  
40  
AC CHARACTERISTICS  
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times 20 ns  
VDD  
V
SYMBOL MIN. TYP. MAX.  
Minimum I2 pulse  
5
80  
40  
30  
70  
40  
30  
20  
15  
15  
6
40  
20  
15  
35  
20  
15  
10  
5  
0
ns  
width; HIGH  
10  
15  
5
tWI2H  
tWMRH  
tRMR  
fmax  
ns  
ns  
Minimum MR  
ns  
see also waveforms  
Fig.5  
pulse width; HIGH  
10  
15  
5
ns  
ns  
Recovery time  
for MR  
ns  
10  
15  
5
ns  
ns  
Maximum clock  
pulse frequency  
12  
25  
35  
MHz  
MHz  
MHz  
10  
15  
12  
17  
VDD  
V
TYPICAL FORMULA FOR P (µW)  
2
Dynamic power  
dissipation per  
package (P)  
5
1 200 fi + ∑ (foCL) × VDD  
where  
2
10  
15  
5 100 fi + ∑ (foCL) × VDD  
fi = input freq. (MHz)  
2
13 050 fi + ∑ (foCL) × VDD  
fo = output freq. (MHz)  
CL = load capacitance (pF)  
(foCL) = sum of outputs  
V
DD = supply voltage (V)  
January 1995  
6
Philips Semiconductors  
Product specification  
HEF4521B  
MSI  
24-stage frequency divider and oscillator  
Fig.5 Waveforms showing minimum pulse widths for MR and I2, recovery time for MR.  
January 1995  
7
Philips Semiconductors  
Product specification  
HEF4521B  
MSI  
24-stage frequency divider and oscillator  
APPLICATION INFORMATION  
(1) Optional for low power operation.  
Fig.6 Crystal oscillator circuit.  
Typical characteristics for crystal oscillator circuit (Fig.6):  
500 kHz  
CIRCUIT  
50 kHz  
CIRCUIT  
UNIT  
Crystal characteristics  
resonance frequency  
500  
S
50  
N
kHz  
crystal cut  
equivalent resistance; RS  
1
6,2  
kΩ  
External resistor/capacitor values  
Ro  
CT  
CS  
47  
82  
20  
750  
82  
kΩ  
pF  
pF  
20  
January 1995  
8
Philips Semiconductors  
Product specification  
HEF4521B  
MSI  
24-stage frequency divider and oscillator  
Fig.7 RC oscillator circuit;  
1
------------------------------------  
2,3 × RTC × C  
f ≈  
; RS 2 RTC, in which:  
f in Hz, R in , C in F.  
VIL max  
(maximum input voltage LOW)  
(input leakage current)  
-----------------  
RS + RTC  
<
ILI  
RTC; C = 1 nF; RS 2 RTC  
C; RTC = 56 k; RS = 120 kΩ  
Fig.8 Oscillator frequency as a  
function of RTC and C;  
VDD = 10 V; test circuit is  
Fig.7.  
January 1995  
9
Philips Semiconductors  
Product specification  
HEF4521B  
MSI  
24-stage frequency divider and oscillator  
Fig.9 Test set-up for measuring forward transconductance gfs = dio/dvi at vo is constant (see also graph Fig.10).  
A: average,  
B: average + 2 s,  
C: average 2 s, in which: ‘s’ is the observed standard deviation.  
Fig.10 Typical forward transconductance gfs as a function of the supply voltage at Tamb = 25 °C.  
January 1995  
10  
Philips Semiconductors  
Product specification  
HEF4521B  
MSI  
24-stage frequency divider and oscillator  
Fig.11 Voltage gain VO/VI as a function of supply  
voltage.  
Fig.12 Supply current as a function of supply  
voltage.  
Fig.13 Test set-up for measuring graphs of Figs 11 and 12.  
January 1995  
11  

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