74HC4052D [PHILIPS]
Differential Multiplexer, 1 Func, 4 Channel, CMOS, PDSO16;
| 型号： | 74HC4052D |
| 厂家： | 
PHILIPS SEMICONDUCTORS |
| 描述： | Differential Multiplexer, 1 Func, 4 Channel, CMOS, PDSO16 光电二极管 |
| 文件： | 总32页 (文件大小：162K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74HC4052; 74HCT4052
Dual 4-channel analog multiplexer,
demultiplexer
Product specification
2003 May 16
Supersedes data of 1997 Aug 27
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
FEATURES
DESCRIPTION
• Wide analog input voltage range from −5 V to +5 V
• Low ON-resistance:
The 74HC4052/74HCT4052 are high-speed Si-gate
CMOS devices and are pin compatible with the
HEF4052B. They are specified in compliance with JEDEC
standard no. 7A.
– 80 Ω (typical) at VCC − VEE = 4.5 V
– 70 Ω (typical) at VCC − VEE = 6.0 V
– 60 Ω (typical) at VCC − VEE = 9.0 V
The 74HC4052/74HCT4052 are dual 4-channel analog
multiplexers or demultiplexers with common select logic.
Each multiplexer has four independent inputs/outputs
(pins nY0 to nY3) and a common input/output (pin nZ). The
common channel select logics include two digital select
inputs (pins S0 and S1) and an active LOW enable input
(pin E). When pin E = LOW, one of the four switches is
selected (low-impedance ON-state) with pins S0 and S1.
When pin E = HIGH, all switches are in the
• Logic level translation: to enable 5 V logic to
communicate with ±5 V analog signals
• Typical “break before make” built in
• Complies with JEDEC standard no. 8-1 A
• ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V.
• Specified from −40 to +85 °C and −40 to +125 °C.
high-impedance OFF-state, independent of pins S0 and
S1.
VCC and GND are the supply voltage pins for the digital
control inputs (pins S0, S1, and E). The VCC to GND
ranges are 2.0 to 10.0 V for 74HC4052 and 4.5 to 5.5 V
for 74HCT4052. The analog inputs/outputs (pins nY0 to
nY3 and nZ) can swing between VCC as a positive limit and
VEE as a negative limit. VCC − VEE may not exceed 10.0 V.
APPLICATIONS
• Analog multiplexing and demultiplexing
• Digital multiplexing and demultiplexing
• Signal gating.
For operation as a digital multiplexer/demultiplexer, VEE is
connected to GND (typically ground).
FUNCTION TABLE
INPUT(1)
CHANNEL BETWEEN
E
S1
S0
L
L
L
L
H
L
L
L
H
L
nY0 and nZ
nY1 and nZ
nY2 and nZ
nY3 and nZ
none
H
H
X
H
X
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care.
2003 May 16
2
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
QUICK REFERENCE DATA
VEE = GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.
TYPICAL
UNIT
SYMBOL
PARAMETER
turn-on time E or Sn to Vos
turn-off time E or Sn to Vos
input capacitance
CONDITIONS
74HC4052 74HCT4052
tPZH/tPZL
CL = 15 pF; RL = 1 kΩ; 28
VCC = 5 V
18
13
ns
ns
t
PHZ/tPLZ
CL = 15 pF; RL = 1 kΩ; 21
VCC = 5 V
CI
3.5
3.5
57
5
pF
pF
pF
pF
CPD
CS
power dissipation capacitance per switch notes 1 and 2
57
5
maximum switch capacitance
independent (Y)
common (Z)
12
12
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ[(CL + CS) × VCC2 × fo] where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = maximum switch capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ[(CL + CS) × VCC2 × fo] = sum of the outputs.
2. For 74HC4052 the condition is VI = GND to VCC
For 74HCT4052 the condition is VI = GND to VCC − 1.5 V.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
TEMPERATURE
RANGE
PINS
PACKAGE
MATERIAL
CODE
74HC4052D
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
16
16
16
16
16
16
16
16
16
SO16
SO16
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
SOT109-3
SOT109-3
SOT338-1
SOT338-1
SOT38-9
74HCT4052D
74HC4052DB
74HCT4052DB
74HC4052N
SSOP16
SSOP16
DIP16
74HCT4052N
74HC4052PW
74HC4052BQ
74HCT4052BQ
DIP16
SOT38-9
TSSOP16
DHVQFN16
DHVQFN16
SOT403-1
SOT763-1
SOT763-1
2003 May 16
3
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
PINNING
PIN
SYMBOL
DESCRIPTION
1
2
2Y0
2Y2
2Z
independent input or output
independent input or output
common input or output
independent input or output
independent input or output
enable input (active LOW)
negative supply voltage
ground (0 V)
3
4
2Y3
2Y1
E
5
6
7
VEE
GND
S1
8
9
select logic input
10
11
12
13
14
15
16
S0
select logic input
1Y3
1Y0
1Z
independent input or output
independent input or output
common input or output
independent input or output
independent input or output
positive supply voltage
1Y1
1Y2
VCC
V
2Y0
1
handbook, halfpage
CC
16
handbook, halfpage
2Y0
2Y2
2Z
1
2
3
4
5
6
7
8
16
V
2
3
15 1Y2
14
2Y2
2Z
CC
15
14
13
12
11
10
9
1Y2
1Y1
1Z
1Y1
2Y3
2Y1
E
4
5
6
7
13 1Z
2Y3
2Y1
E
(1)
GND
4052
12
11
10
1Y0
1Y3
S0
1Y0
1Y3
S0
V
EE
V
EE
S1
GND
8
9
MNB039
GND
S1
Top view
MNB061
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.1 Pin configuration DIP16, SO16 and
(T)SSOP16.
Fig.2 Pin configuration DHVQFN16.
2003 May 16
4
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
handbook, halfpage
10
0
0
3
13
1Z
handbook, halfpage
4 ×
9
6
1
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
G4
12
14
15
11
1
S0
S1
10
9
1
5
MDX
0
1
2
3
3
2
4
5
12
14
15
11
2
E
6
4
13
2Z
3
MNB040
MNB041
Fig.3 Logic symbol.
Fig.4 IEC logic symbol.
V
CC
16
13
1Z
12
1Y0
14
1Y1
15
1Y2
10
9
S0
S1
E
11
1Y3
LOGIC
LEVEL
CONVERSION
1 - OF - 4
DECODER
1
2Y0
5
2Y1
6
2
2Y2
4
2Y3
3
2Z
8
7
MNB042
GND
V
EE
Fig.5 Functional diagram.
5
2003 May 16
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
nYn
V
V
EE
CC
V
V
CC
CC
V
V
EE
CC
V
nZ
EE
from
logic
MNB043
Fig.6 Schematic diagram (one switch).
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to VEE = GND
(ground = 0 V); note 1.
SYMBOL
VCC
PARAMETER
supply voltage
CONDITIONS
MIN.
−0.5
MAX.
+11.0
UNIT
V
IIK
ISK
IS
input diode current
switch diode current
switch current
VI < −0.5 V or VI > VCC + 0.5 V
VS < −0.5 V or VS > VCC + 0.5 V
−0.5 V < VS < VCC + 0.5 V
−
±20
±20
±25
±20
±50
+150
500
100
mA
mA
mA
mA
mA
°C
−
−
IEE
VEE current
−
ICC; IGND
VCC or GND current
storage temperature
power dissipation
power dissipation per switch
−
Tstg
Ptot
PS
−65
−
Tamb = −40 to +125 °C; note
mW
mW
−
Notes
1. To avoid drawing VCC current out of pins nZ, when switch current flows in pins nYn, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into pins nZ, no VCC current will flow out of
pins nYn. In this case there is no limit for the voltage drop across the switch, but the voltages at pins nYn and nZ may
not exceed VCC or VEE
.
2. For DIP16 packages: above 70 °C derate linearly with 12 mW/K.
For SO16 packages: above 70 °C derate linearly with 8 mW/K.
For SSOP16 and TSSOP16 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 °C derate linearly with 4.5 mW/K.
2003 May 16
6
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
RECOMMENDED OPERATING CONDITIONS
74HC4052
74HCT4052
UNIT
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
TYP. MAX. MIN.
TYP. MAX.
VCC
see Figs 7 and 8
V
CC − GND
CC − VEE
2.0
5.0
5.0
−
10.0
4.5
5.0
5.5
V
V
2.0
10.0
VCC
VCC
+85
2.0
5.0
−
10.0
VCC
VCC
+85
V
VI
input voltage
GND
VEE
−40
−40
GND
VEE
−40
V
VS
switch voltage
−
−
V
Tamb
operating ambient
temperature
see DC and AC
characteristics per
device
+25
−
+25
−
°C
+125 −40
+125 °C
tr, tf
input rise and fall times
VCC = 2.0 V
−
−
−
−
6.0
6.0
6.0
6.0
1000
500
400
250
−
−
−
−
6.0
6.0
6.0
6.0
500
500
500
500
ns
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
VCC = 10.0 V
MNB044
MNB045
12
handbook, halfpage
12
handbook, halfpage
V
− GND
CC
(V)
V
− GND
(V)
CC
10
8
8
operating area
6
operating area
4
4
2
0
0
0
4
8
V
12
(V)
0
4
8
12
− V (V)
EE
− V
V
CC
EE
CC
Fig.7 Guaranteed operating area as a function of
the supply voltages for 74HC4052.
Fig.8 Guaranteed operating area as a function of
the supply voltages for 74HCT4052.
2003 May 16
7
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
DC CHARACTERISTICS
Family 74HC4052
Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input; Vos is the output voltage at pins nZ or nYn,
whichever is assigned as an output; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
VCC (V) VEE (V)
Tamb = −40 to +85 °C; note 1
VIH
HIGH-level input
voltage
2.0
−
−
−
−
−
−
−
−
0
0
1.5
1.2
−
V
V
V
V
V
V
V
V
4.5
6.0
9.0
2.0
4.5
6.0
9.0
6.0
10.0
3.15 2.4
−
4.2
6.3
−
3.2
4.7
0.8
2.1
2.8
4.3
−
−
−
VIL
LOW-level input
voltage
0.5
1.35
1.8
2.7
−
−
−
ILI
input leakage current
VI = VCC or GND
−
±1.0 µA
±2.0 µA
−
−
IS(OFF)
analog switch
VI = VIH or VIL;
OFF-state current
VS = VCC − VEE; see Fig.9
per channel
all channels
10.0
10.0
10.0
0
0
0
−
−
−
−
−
−
±1.0 µA
±2.0 µA
±2.0 µA
IS(ON)
ICC
analog switch
ON-state current
VI = VIH or VIL;
VS = VCC − VEE; see Fig.10
quiescent supply
current
VI = VCC or GND;
6.0
0
0
−
−
−
−
80.0 µA
160.0 µA
Vis = VEE or VCC
;
10.0
Vos = VCC or VEE
2003 May 16
8
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
V
CC (V) VEE (V)
Tamb = −40 to +125 °C
VIH
HIGH-level input
voltage
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
6.0
10.0
−
−
−
−
−
−
−
−
0
0
1.5
3.15
4.2
6.3
−
−
−
−
−
−
−
−
−
−
−
−
V
V
V
V
V
V
V
V
−
−
−
VIL
LOW-level input
voltage
0.5
1.35
1.8
2.7
−
−
−
ILI
input leakage current
VI = VCC or GND
−
±1.0 µA
±2.0 µA
−
IS(OFF)
analog switch
VI = VIH or VIL;
OFF-state current
VS = VCC − VEE; see Fig.9
per channel
all channels
10.0
10.0
10.0
0
0
0
−
−
−
−
−
−
±1.0 µA
±2.0 µA
±2.0 µA
IS(ON)
ICC
analog switch
ON-state current
VI = VIH or VIL;
VS = VCC − VEE; see Fig.10
quiescent supply
current
VI = VCC or GND;
6.0
0
0
−
−
−
−
160
µA
Vis = VEE or VCC
;
10.0
320.0 µA
Vos = VCC or VEE
Note
1. All typical values are measured at Tamb = 25 °C.
2003 May 16
9
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
Family 74HCT4052
Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input; Vos is the output voltage at pins nZ or nYn,
whichever is assigned as an output; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
VCC (V) VEE (V)
Tamb = −40 to +85 °C; note 1
VIH
VIL
HIGH-level input
voltage
4.5 to 5.5
4.5 to 5.5
5.5
−
−
0
2.0
−
1.6
1.2
−
−
V
V
LOW-level input
voltage
0.8
ILI
input leakage current
VI = VCC or GND
−
±1.0 µA
IS(OFF)
analog switch
VI = VIH or VIL;
OFF-state current
VS = VCC − VEE; see Fig.9
per channel
all channels
10.0
10.0
10.0
0
0
0
−
−
−
−
−
−
±1.0 µA
±2.0 µA
±2.0 µA
IS(ON)
ICC
analog switch
ON-state current
VI = VIH or VIL;
VS = VCC − VEE; see Fig.10
quiescent supply
current
VI = VCC or GND;
5.5
5.0
0
−
−
−
−
80.0 µA
160.0 µA
Vis = VEE or VCC
;
−5.0
Vos = VCC or VEE
∆ICC
additional quiescent
supply current per
input
VI = VCC − 2.1 V; other inputs 4.5 to 5.5 0
at VCC or GND
−
45
202.5 µA
Tamb = −40 to +125 °C
VIH
HIGH-level input
voltage
4.5 to 5.5
4.5 to 5.5
5.5
−
−
0
2.0
−
−
−
−
−
V
V
VIL
LOW-level input
voltage
0.8
ILI
input leakage current
VI = VCC or GND
−
±1.0 µA
IS(OFF)
analog switch
VI = VIH or VIL;
OFF-state current
VS = VCC − VEE; see Fig.9
per channel
all channels
10.0
10.0
10.0
0
0
0
−
−
−
−
−
−
±1.0 µA
±2.0 µA
±2.0 µA
IS(ON)
ICC
analog switch
ON-state current
VI = VIH or VIL;
VS = VCC − VEE; see Fig.10
quiescent supply
current
VI = VCC or GND;
5.5
5.0
0
−
−
−
−
160.0 µA
320.0 µA
Vis = VEE or VCC
;
−5.0
Vos = VCC or VEE
∆ICC
additional quiescent
supply current per
input
VI = VCC − 2.1 V; other inputs 4.5 to 5.5 0
at VCC or GND
−
−
220.5 µA
Note
1. All typical values are measured at Tamb = 25 °C.
2003 May 16
10
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
LOW
(from select input)
nYn
or V
nZ
A
A
V = V
V
= V
or V
EE CC
I
CC
EE
O
V
EE
MNB048
Fig.9 Test circuit for measuring OFF-state current.
HIGH
(from select input)
nYn
nZ
A
V = V
or V
V
(open circuit)
O
I
EE
CC
V
EE
MNB049
Fig.10 Test circuit for measuring ON-state current.
11
2003 May 16
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
Resistance RON for 74HC4052 and 74HCT4052
Vis is the input voltage at pins nYn or nZ, whichever is assigned as an input; see notes 1 and 2; see Fig.11.
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
VCC (V) VEE (V) IS (µA)
Tamb = −40 to +85 °C; note 3
RON(peak) ON-resistance
(peak)
Vis = VCC to VEE
VI = VIH or VIL
;
2.0
4.5
6.0
4.5
2.0
4.5
6.0
4.5
2.0
4.5
6.0
4.5
2.0
4.5
6.0
4.5
0
100
1000
1000
1000
100
1000
1000
1000
100
1000
1000
1000
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
0
100
90
70
150
80
70
60
150
90
80
65
−
225
200
165
−
0
−4.5
RON(rail)
ON-resistance (rail) Vis = VEE
;
0
VI = VIH or VIL
0
175
150
130
−
0
−4.5
0
Vis = VCC
;
VI = VIH or VIL
0
200
175
150
−
0
−4.5
0
∆RON
maximum
Vis = VCC to VEE
VI = VIH or VIL
;
;
ON-resistance
difference between
any two channels
0
−
9
−
0
−
8
−
−4.5
−
6
−
Tamb = −40 to +125 °C
RON(peak) ON-resistance
(peak)
Vis = VCC to VEE
VI = VIH or VIL
2.0
4.5
6.0
4.5
2.0
4.5
6.0
4.5
2.0
4.5
6.0
4.5
0
100
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
0
1000
1000
1000
100
270
240
195
−
0
−4.5
0
RON(rail)
ON-resistance (rail) Vis = VEE
;
VI = VIH or VIL
0
1000
1000
1000
100
210
180
160
−
0
−4.5
0
Vis = VCC
;
VI = VIH or VIL
0
1000
1000
1000
240
210
180
0
−4.5
Notes
1. For 74HC4052: VCC − GND or VCC − VEE = 2.0, 4.5, 6.0 and 9.0 V; for 74HCT4052: VCC − GND = 4.5 and 5.5 V,
CC − VEE = 2.0, 4.5, 6.0 and 9.0 V.
V
2. When supply voltages (VCC − VEE) near 2.0 V the analog switch ON-resistance becomes extremely non-linear. When
using a supply of 2 V, it is recommended to use these devices only for transmitting digital signals.
3. All typical values are measured at Tamb = 25 °C.
2003 May 16
12
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
HIGH
(from select input)
V
nYn
nZ
I
V
= 0 to V
− V
CC EE
is
is
V
EE
MNB046
Fig.11 Test circuit for measuring RON
.
MNB047
100
handbook, halfpage
(1)
R
ON
(Ω)
80
(2)
(3)
60
40
20
0
0
1.8
3.6
5.4
7.2
9
V
(V)
is
Vis = 0 to VCC − VEE
(1) VCC = 4.5 V
(2) VCC = 6 V
(3) VCC = 9 V
Fig.12 Typical RON as a function of input voltage Vis.
2003 May 16
13
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
AC CHARACTERISTICS
Type 74HC4052
GND = 0 V; tr = tf = 6 ns; CL = 50 pF.
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
V
CC (V) VEE (V)
Tamb = −40 to +85 °C; note 1
tPHL/tPLH propagation delay Vis to Vos RL = ∞; see Fig.19
2.0
4.5
6.0
4.5
2.0
4.5
6.0
4.5
0
−
−
−
−
−
−
−
−
−
−
−
−
14
5
75
15
13
10
405
81
69
58
315
63
54
48
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0
0
4
−4.5
0
4
t
t
PZH/tPZL
turn-on time E, Sn to Vos
turn-off time E, Sn to Vos
RL = ∞; see Figs 20,
22 and 21
105
38
30
26
74
27
22
22
0
0
−4.5
0
PHZ/tPLZ
RL = 1 kΩ; see Figs 20, 2.0
22 and 21
4.5
0
6.0
4.5
0
−4.5
Tamb = −40 to +125 °C
tPHL/tPLH propagation delay Vis to Vos RL = ∞; see Fig.19
2.0
4.5
6.0
4.5
2.0
4.5
6.0
4.5
0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
90
18
15
12
490
98
83
69
375
75
64
57
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
0
0
−4.5
0
tPZH/tPZL
turn-on time E, Sn to Vos
turn-off time E, Sn to Vos
RL = ∞; see Figs 20,
22 and 21
0
0
−4.5
0
t
PHZ/tPLZ
RL = 1 kΩ; see Figs 20, 2.0
22 and 21
4.5
0
6.0
4.5
0
−4.5
Note
1. All typical values are measured at Tamb = 25 °C.
2003 May 16
14
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
Type 74HCT4052
GND = 0 V; tr = tf = 6 ns; CL = 50 pF.
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
V
CC (V) VEE (V)
Tamb = −40 to +85 °C; note 1
tPHL/tPLH propagation delay Vis to Vos RL = ∞; see Fig.19
4.5
4.5
0
−
−
−
−
−
−
5
15
10
88
60
63
48
ns
ns
ns
ns
ns
ns
−4.5
0
4
t
PZH/tPZL
turn-on time E, Sn to Vos
turn-off time E, Sn to Vos
RL = 1 kΩ; see Figs 20, 4.5
22 and 21
41
28
26
21
4.5
−4.5
0
t
PHZ tPLZ
RL = 1 kΩ; see Figs 20, 4.5
22 and 21
4.5
−4.5
Tamb = −40 to +125 °C
tPHL/tPLH propagation delay Vis to Vos RL = ∞; see Fig.19
4.5
4.5
0
−
−
−
−
−
−
−
−
−
−
−
−
18
12
105
72
75
57
ns
ns
ns
ns
ns
ns
−4.5
0
t
PZH/tPZL
turn-on time E, Sn to Vos
turn-off time E, Sn to Vos
RL = 1 kΩ; see Figs 20, 4.5
22 and 21
4.5
−4.5
0
t
PHZ/tPLZ
RL = 1 kΩ; see Figs 20, 4.5
22 and 21
4.5
−4.5
Note
1. All typical values are measured at Tamb = 25 °C.
2003 May 16
15
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
Type 74HC4052 and 74HCT4052
Recommended conditions and typical values; GND = 0 V; Tamb = 25 °C; CL = 50 pF. Vis is the input voltage at pins nYn
or nZ, whichever is assigned as an input. Vos is the output voltage at pins nYn or nZ, whichever is assigned as an
output.
TEST CONDITIONS
SYMBOL
PARAMETER
TYP. UNIT
Vis(p-p)
(V)
OTHER
VCC (V) VEE (V)
dsin
sine-wave distortion
f = 1 kHz; RL = 10 kΩ;
see Fig.13
4.0
8.0
4.0
8.0
2.25
4.5
−2.25
−4.5
−2.25
−4.5
−2.25
−4.5
−2.25
−4.5
0
0.04
0.02
0.12
0.06
−50
−50
−60
−60
110
220
%
%
f = 10 kHz; RL = 10 kΩ;
see Fig.13
2.25
4.5
%
%
αOFF(feedthr)
switch OFF signal
feed-through
RL = 600 Ω; f = 1 MHz;
see Figs 14 and 15
note 1 2.25
4.5
dB
dB
dB
dB
mV
mV
αct(s)
crosstalk between two
switches/multiplexers
RL = 600 Ω; f = 1 MHz;
see Fig.16
note 1 2.25
4.5
Vct(p-p)
crosstalk voltage
between control and
any switch
RL = 600 Ω; f = 1 MHz; E or Sn,
square-wave between VCC and
GND, tr = tf = 6 ns; see Fig.17
−
4.5
4.5
−4.5
(peak-to-peak value)
fmax
minimum frequency
response (−3dB)
RL = 50 Ω; see Figs 13 and 18
note 2 2.25
4.5
−2.25
−4.5
−
170
180
5
MHz
MHz
pF
CS
maximum switch
capacitance
independent (Y)
common (Z)
−
−
−
−
−
12
pF
Notes
1. Adjust input voltage Vis to 0 dBm level (0 dBm = 1 mW into 600 Ω).
2. Adjust input voltage Vis to 0 dBm level at Vos for 1 MHz (0 dBm = 1 mW into 50 Ω).
10 µF
nYn/nZ
nZ/nYn
V
V
os
is
R
C
dB
L
L
channel
ON
GND
MNB052
Fig.13 Test circuit for measuring sine-wave distortion and minimum frequency response.
16
2003 May 16
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
0.1 µF
nYn/nZ
nZ/nYn
V
is
V
os
R
C
dB
L
L
channel
OFF
GND
MNB053
Fig.14 Test circuit for measuring switch OFF signal feed-through.
0
− 0
− 0
− 0
− 0
− 00
0
0
0
0
0
0
Test conditions: VCC = 4.5 V; GND = 0 V; VEE = −4.5 V; RL = 50 Ω; Rsource = 1 kΩ.
Fig.15 Typical switch OFF signal feed-through as a function of frequency.
R
0.1 µF
L
nYn/nZ
nZ/nYn
nYn/nZ
nZ/nYn
V
V
is
os
dB
R
C
L
R
R
C
L
L
L
L
channel
ON
channel
OFF
GND
GND
MNB054
(a)
(b)
(b) channel OFF condition.
(a) channel ON condition.
Fig.16 Test circuits for measuring crosstalk between any two switches/multiplexers.
17
2003 May 16
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
The crosstalk is defined as follows
(oscilloscope output):
V
L
Sn or E
DUT
V
CC
CC
2R
2R
L
nYn/nZ
nZ/nYn
V(p−p)
2R
2R
C
L
oscilloscope
L
L
GND
V
EE
MNB055
Fig.17 Test circuit for measuring crosstalk between control and any switch.
5
0
−5
5
0
0
0
0
0
0
Test conditions: VCC = 4.5 V; GND = 0 V; VEE = −4.5 V; RL = 50 Ω; Rsource = 1 kΩ.
Fig.18 Typical frequency response.
18
2003 May 16
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
AC WAVEFORMS
V
handbook, halfpage
I
50%
V
input
is
GND
t
t
PLH
PHL
V
OH
50%
V
output
os
V
OL
MNB056
Fig.19 Waveforms showing the input (Vis) to output (Vos) propagation delays.
t
t
f
r
90%
V
E, Sn input
M
10%
t
t
PZL
PLZ
50%
V
output
output
os
os
10%
t
t
PHZ
PZH
90%
50%
V
switch
ON
switch
ON
switch
OFF
MNB057
For 74HC4052: VM = 50%; VI = GND to VCC
.
For 74HCT4052: VM = 1.3 V; VI = GND to 3 V.
Fig.20 Waveforms showing the turn-on and turn-off times.
19
2003 May 16
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
t
W
amplitude
0 V
90%
negative
input pulse
V
M
10%
t
(t )
f
t
t
(t )
THL
TLH
THL
r
t
(t )
r
(t )
f
TLH
amplitude
90%
10%
positive
input pulse
V
M
0 V
t
MNB059
W
tr and tf
fmax; PULSE WIDTH OTHER
FAMILY
AMPLITUDE
VM
74HC4052
VCC
50%
<2 ns
<2 ns
6 ns
6 ns
74HCT4052
3.0 V
1.3 V
Fig.21 Input pulse definitions.
V
switch
CC
open
V
V
CC is
R
L
V
V
O
I
PULSE
GENERATOR
D.U.T.
C
R
L
T
GND
V
EE
MNB058
TEST
SWITCH
Vis
tPZH
tPZL
tPHZ
tPLZ
VEE
VCC
VEE
VCC
VEE
VCC
VEE
VCC
open
other
pulse
Definitions for test circuit:
RL = load resistance
CL = load capacitance including jig and probe capacitance.
RT = termination resistance should be equal to the output impedance ZO of the pulse generator.
tr = tf = 6 ns; when measuring fmax, there is no constraint to tr and tf with 50% duty factor.
Fig.22 Test circuit for measuring AC performance.
20
2003 May 16
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
PACKAGE OUTLINES
SO16: plastic small outline package; 16 leads; body width 3.9 mm; body thickness 1.47 mm
SOT109-3
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.55
1.40
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.061
0.004 0.055
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039
0.016
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
98-12-23
03-02-19
SOT109-3
MS-012AC
2003 May 16
21
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
8
1
detail X
w M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT338-1
MO-150
2003 May 16
22
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-9
M
E
D
A
2
A
A
L
1
c
e
b
1
w M
Z
(e )
1
M
H
b
b
2
16
9
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (mm dimensions are derived from the original inch dimensions)
(1)
Z
A
min.
A
2
A
(1)
(1)
1
w
UNIT
mm
b
b
b
c
D
E
e
e
L
M
M
H
1
1
2
E
max.
max.
max.
1.65
1.40
0.51
0.41
1.14
0.76
0.36
0.20
19.3
18.8
6.45
6.24
3.81
2.92
8.23
7.62
9.40
8.38
4.32
0.17
0.38
3.56
2.54
0.1
7.62
0.3
0.254
0.01
0.76
0.065 0.020 0.045 0.014
0.055 0.016 0.030 0.008
0.76
0.74
0.254
0.246
0.150 0.324
0.115 0.300
0.37
0.33
inches
0.015
0.14
0.03
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
97-07-24
03-03-12
SOT38-9
2003 May 16
23
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
2003 May 16
24
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
SOT763-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16
15
10
D
h
X
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
y
D
D
E
L
v
w
y
1
1
h
1
h
max.
0.05 0.30
0.00 0.18
3.6
3.4
2.15
1.85
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT763-1
- - -
MO-241
- - -
2003 May 16
25
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
worldwide use of lead-free solder pastes is increasing.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250 °C or 265 °C, depending on solder
material applied, SnPb or Pb-free respectively.
Typical reflow peak temperatures range from
215 to 270 °C depending on solder paste material. The
top-surface temperature of the packages should
preferably be kept:
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
• below 220 °C (SnPb process) or below 245 °C (Pb-free
process)
Manual soldering
– for all the BGA packages
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
– for packages with a thickness ≥ 2.5 mm
– for packages with a thickness < 2.5 mm and a
volume ≥ 350 mm3 so called thick/large packages.
• below 235 °C (SnPb process) or below 260 °C (Pb-free
process) for packages with a thickness < 2.5 mm and a
volume < 350 mm3 so called small/thin packages.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
2003 May 16
26
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
WAVE
REFLOW(2)
not suitable suitable
PACKAGE(1)
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA
DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, HVSON, SMS
not suitable(3)
suitable
PLCC(4), SO, SOJ
suitable
suitable
LQFP, QFP, TQFP
not recommended(4)(5) suitable
not recommended(6)
suitable
SSOP, TSSOP, VSO, VSSOP
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2003 May 16
27
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 May 16
28
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
NOTES
2003 May 16
29
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
NOTES
2003 May 16
30
Philips Semiconductors
Product specification
Dual 4-channel analog multiplexer,
demultiplexer
74HC4052; 74HCT4052
NOTES
2003 May 16
31
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613508/03/pp32
Date of release: 2003 May 16
Document order number: 9397 750 11266
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