74ABT16646DGG [NXP]

16-bit bus transceiver/register 3-State; 16位总线收发器/寄存器三态
74ABT16646DGG
型号: 74ABT16646DGG
厂家: NXP    NXP
描述:

16-bit bus transceiver/register 3-State
16位总线收发器/寄存器三态

总线驱动器 总线收发器 触发器 逻辑集成电路 光电二极管 信息通信管理
文件: 总12页 (文件大小:98K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
Product specification  
1998 Feb 27  
Supersedes data of 1995 Aug 17  
IC23 Data Handbook  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
FEATURES  
Independent registers for A and B buses  
DESCRIPTION  
The 74ABT16646 high–performance BiCMOS device combines low  
static and dynamic power dissipation with high speed and high  
output drive.  
Multiple VCC and GND pins minimize switching noise  
Live insertion/extraction permitted  
Power–up 3-State  
The 74ABT16646 16-bit transceiver/register consists of two sets of  
bus transceiver circuits with 3-State outputs, D-type flip-flops, and  
control circuitry arranged for multiplexed transmission of data  
directly from the input bus or from the internal registers. Data on the  
A or B bus will be clocked into the registers as the appropriate clock  
pin goes High. Output Enable (nOE) and Direction (nDIR) pins are  
provided to control the transceiver function. In the transceiver mode,  
data present at the high impedance port may be stored in either the  
A or B register or both.  
Power–up reset  
Multiplexed real-time and stored data  
Outputs sink 64mA and source 32mA  
Latch–up protection exceeds 500mA per JEDEC Std 17  
The select (nSAB, nSBA) pins determine whether data is stored or  
transferred through the device in real-time. The nDIR determines  
which bus will receive data when the nOE is active Low. In the  
isolation mode (nOE = High), data from Bus A may be stored in the  
B register and/or data from Bus B may be stored in the A register.  
When an output function is disabled, the input function is still  
enabled and may be used to store and transmit data. Only one of  
the two buses, A or B may be driven at a time.  
74ABTH16646 incorporates bus-hold data inputs which eliminate  
the need for external pull-up resistors to hold unused inputs  
ESD protection exceeds 2000V per MIL STD 883 Method 3015  
and 200V per Machine Model  
Two options are available, 74ABT16646 which does not have the  
bus-hold feature and 74ABTH16646 which incorporates the  
bus-hold feature.  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay  
nAx to nBx  
3.3  
2.7  
PLH  
PHL  
C = 50pF; V = 5V  
ns  
L
CC  
C
Input capacitance  
I/O capacitance  
V = 0V or V  
CC  
3
7
pF  
pF  
IN  
I
C
V
= 0V or V ; 3-State  
O CC  
I/O  
Outputs disabled; V =5.5V  
550  
9
µA  
mA  
CC  
I
Quiescent supply current  
CCZ  
Outputs low; V =5.5V  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
DWG NUMBER  
SOT371-1  
56-Pin Plastic SSOP Type III  
56-Pin Plastic TSSOP Type II  
56-Pin Plastic SSOP Type III  
56-Pin Plastic TSSOP Type II  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74ABT16646 DL  
74ABT16646 DGG  
74ABTH16646 DL  
74ABTH16646 DGG  
BT16646 DL  
BT16646 DGG  
BH16646 DL  
SOT364-1  
SOT371-1  
BH16646 DGG  
SOT364-1  
PIN DESCRIPTION  
PIN NUMBER  
SYMBOL  
NAME AND FUNCTION  
Clock input A to B / Clock input B to A  
Select input A to B / Select input B to A  
Direction control inputs  
2, 55, 27, 30  
3, 54, 26, 31  
1, 28  
1CPAB, 1CPBA, 2CPAB, 2CPBA  
1SAB, 1SBA, 2SAB, 2SBA  
1DIR, 2DIR  
5, 6, 8, 9, 10, 12, 13, 14  
15, 16, 17, 19, 20, 21, 23, 24  
1A0 – 1A7,  
2A0 – 2A7  
Data inputs/outputs (A side)  
Data inputs/outputs (B side)  
52, 51, 49, 48, 47, 45, 44, 43  
42, 41, 40, 38, 37, 36, 34, 33  
1B0 – 1B7,  
2B0 – 2B7  
56, 29  
1OE, 2OE  
GND  
Output enable inputs  
Ground (0V)  
4, 11, 18, 25, 32, 39, 46, 53  
7, 22, 35, 50  
V
CC  
Positive supply voltage  
2
1998 Feb 27  
853-1782 19026  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
PIN CONFIGURATION  
1
2
56  
55  
1DIR  
1CPAB  
1SAB  
GND  
1OE  
1CPBA  
3
54 1SBA  
GND  
1B0  
4
53  
52  
1A0  
5
1A1  
6
51 1B1  
7
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
V
V
CC  
CC  
8
1A2  
1A3  
1B2  
1B3  
9
1A4  
1B4  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
GND  
1A5  
1A6  
1A7  
2A0  
GND  
1B5  
1B6  
1B7  
2B0  
2A1  
2A2  
2B1  
2B2  
GND  
2A3  
GND  
2B3  
2A4 20  
37 2B4  
21  
22  
23  
24  
36  
35  
34  
33  
2A5  
2B5  
V
V
CC  
CC  
2A6  
2B6  
2B7  
2A7  
GND 25  
32 GND  
26  
27  
28  
31  
30  
29  
2SAB  
2CPAB  
2DIR  
2SBA  
2CPBA  
20E  
SH00026  
FUNCTION TABLE  
INPUTS  
nCPAB  
DATA I/O  
OPERATING MODE  
nOE  
nDIR  
nCPBA nSAB nSBA  
nAx  
nBx  
Unspecified  
output*  
X
X
X
X
X
X
X
Input  
Store A, B unspecified  
Unspecified  
output*  
X
X
X
Input  
Input  
Store B, A unspecified  
H
H
X
X
X
X
X
X
Store A and B data  
Isolation, hold storage  
Input  
Output  
Input  
H or L  
H or L  
L
L
L
L
X
X
X
X
X
L
H
Real time B data to A bus  
Stored B data to A bus  
Input  
H or L  
L
L
H
H
X
X
X
L
H
X
X
Real time A data to B bus  
Stored A data to B bus  
Output  
H or L  
H = High voltage level  
L
X
*
=
=
=
Low voltage level  
Don’t care  
Low-to-High clock transition  
The data output function may be enabled or disabled by various signals at the nOE input. Data input functions are always enabled, i.e.,  
data at the bus pins will be stored on every Low–to–High transition of the clock.  
3
1998 Feb 27  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
LOGIC SYMBOL (IEEE/IEC)  
LOGIC SYMBOL  
56  
1OE  
G3  
1
1DIR  
5
6
8
9
10 12 13 14  
3 EN1 [BA]  
3 EN2 [AB]  
C4  
55  
54  
2
1CPBA  
1SBA  
1CPAB  
1SAB  
2OE  
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7  
G5  
C6  
2
3
1CPAB  
1SAB  
1DIR  
3
1
G7  
55  
54  
56  
1CPBA  
1SBA  
1OE  
29  
28  
G10  
10 EN8 [BA]  
10 EN9 [AB]  
C11  
2DIR  
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7  
30  
31  
27  
26  
2CPBA  
2SBA  
G12  
52 51 49 48 47 45 44 43  
15 16 17 19 20 21 23 24  
2CPAB  
2SAB  
C13  
G14  
52  
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7  
w1  
1B0  
5
4D  
5
1A0  
1
6D  
27  
26  
28  
30  
31  
29  
2CPAB  
5
1
2SAB  
w1  
7
7
2
2DIR  
1
2CPBA  
6
8
51  
49  
48  
47  
45  
44  
43  
42  
1A1  
1A2  
1A3  
1A4  
1A5  
1A6  
1A7  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
2B0  
2SBA  
2OE  
9
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7  
10  
12  
13  
14  
42 41 40 38 37 36 34 33  
SH00027  
w1  
12 11D  
12  
15  
2A0  
8
1
w1  
13D 14  
14  
9
1
16  
17  
19  
41  
40  
38  
2A1  
2A2  
2A3  
2B1  
2B2  
2B3  
20  
21  
37  
36  
2A4  
2A5  
2B4  
2B5  
23  
24  
34  
33  
2A6  
2A7  
2B6  
2B7  
SH00025  
4
1998 Feb 27  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
The following examples demonstrate the four fundamental bus-management functions that can be performed with the 74ABT16646.  
REAL TIME BUS TRANSFER  
BUS B TO BUS A  
REAL TIME BUS TRANSFER  
BUS A TO BUS B  
STORAGE FROM  
A, B, OR A AND B  
A
B
A
B
A
B
nOE nDIR nCPAB nCPBA nSAB nSBA  
nOE nDIR nCPAB nCPBA nSAB nSBA  
nOE nDIR nCPAB nCPBA nSAB nSBA  
L
L
X
X
X
L
L
H
X
X
L
X
L
L
H
H
L
X
X
X
X
X
X
X
X
X
TRANSFER STORED DATA  
TO A OR B  
A
B
nOE nDIR nCPAB nCPBA nSAB nSBA  
L
L
L
X
H | L  
X
X
H
H
X
H
H | L  
SH00028  
5
1998 Feb 27  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
LOGIC DIAGRAM  
nOE  
nDIR  
nCPBA  
nSBA  
nCPAB  
nSAB  
1 of 16 Channels  
1D  
C1  
Q
nA0  
nB0  
1D  
C1  
Q
nA1  
nA2  
nA3  
nB1  
nB2  
nB3  
nB4  
nB5  
nB6  
nB7  
DETAIL A X 7  
nA4  
nA5  
nA6  
nA7  
SH00029  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
UNIT  
V
V
CC  
I
IK  
–0.5 to +7.0  
–18  
DC input diode current  
V < 0  
I
mA  
V
3
V
I
DC input voltage  
–1.2 to +7.0  
–50  
I
DC output diode current  
V
O
< 0  
mA  
V
OK  
3
V
OUT  
DC output voltage  
output in Off or High state  
output in Low state  
–0.5 to +5.5  
128  
mA  
mA  
°C  
I
DC output current  
OUT  
output in High state  
–64  
T
stg  
Storage temperature range  
–65 to 150  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
6
1998 Feb 27  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
UNIT  
MIN  
4.5  
0
MAX  
V
CC  
DC supply voltage  
5.5  
V
V
V
I
Input voltage  
V
CC  
V
High-level input voltage  
Low-level Input voltage  
High-level output current  
Low-level output current  
Input transition rise or fall rate  
2.0  
V
IH  
V
0.8  
–32  
64  
V
IL  
I
mA  
mA  
ns/V  
°C  
OH  
I
OL  
t/v  
0
10  
T
amb  
Operating free-air temperature range  
–40  
+85  
DC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
= –40°C  
to +85°C  
amb  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
T
amb  
= +25°C  
UNIT  
MIN  
TYP  
–0.9  
2.9  
MAX  
MIN MAX  
V
Input clamp voltage  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 4.5V; I = –18mA  
–1.2  
–1.2  
V
V
V
V
V
V
IK  
IK  
= 4.5V; I = –3mA; V = V or V  
2.5  
3.0  
2.0  
2.5  
3.0  
2.0  
OH  
I
IL  
IH  
IH  
V
OH  
High-level output voltage  
= 5.0V; I = –3mA; V = V or V  
3.4  
OH  
I
IL  
= 4.5V; I = –32mA; V = V or V  
IH  
2.4  
OH  
I
IL  
V
OL  
Low-level output voltage  
= 4.5V; I = 64mA; V = V or V  
IH  
0.35  
0.13  
0.55  
0.55  
0.55  
0.55  
OL  
I
IL  
3
V
RST  
Power-up output voltage  
= 5.5V; I = 1mA; V = GND or V  
O I CC  
Input leakage  
current  
Control  
pins  
I
I
V
CC  
= 5.5V; V = GND or 5.5V  
±0.01  
±1.0  
±1.0  
µA  
I
V
V
V
V
V
= 4.5V; V = 0.8V  
35  
35  
CC  
CC  
CC  
CC  
CC  
I
Bus Hold current A or B  
Ports 74ABTH16646  
= 4.5V; V = 2.0V  
–75  
–75  
I
µA  
I
HOLD  
5
= 5.5V; V = 0 to 5.5V  
±800  
I
I
Power-off leakage current  
Power-up/down 3-State  
= 0.0V; V = 4.5V; V = 0.0V or 5.5V  
±2.0  
±1.0  
±100  
±50  
±100  
±50  
µA  
µA  
OFF  
O
I
= 2.1V; V = 0.0V or V  
;
CC  
O
I
PU/PD  
4
output current  
V = GND or V ; OE/OE = X  
I
CC  
I
+ I  
+ I  
3-State output High current  
3-State output Low current  
V
= 5.5V; V = 5.5V; V = V or V  
1.0  
10  
10  
µA  
µA  
IH  
OZH  
OZL  
CC  
CC  
O
I
IL  
IH  
IH  
I
V
= 5.5V; V = 0.0V; V = V or V  
–1.0  
–10  
–10  
IL  
O
I
IL  
Output High leakage  
current  
I
V
V
= 5.5V; V = 5.5V; V = GND or V  
CC  
5.0  
–80  
0.55  
9
50  
–180  
2
50  
–180  
2
µA  
mA  
mA  
mA  
mA  
CEX  
CC  
O
I
1
I
O
Output current  
= 5.5V; V = 2.5V  
–50  
–50  
CC  
O
V
CC  
V
CC  
= 5.5V; Outputs High, V = GND or  
I
I
CCH  
I
V
CC  
= 5.5V; Outputs Low, V = GND or V  
19  
2
19  
2
Quiescent supply current  
Additional supply current  
CCL  
I
CC  
V
CC  
= 5.5V; Outputs 3–State;  
I
0.55  
CCZ  
V = GND or V  
I
CC  
V
CC  
= 5.5V; one input at 3.4V,  
2
per input pin  
I  
5.0  
50  
50  
µA  
µA  
CC  
CC  
other inputs at V or GND  
CC  
74ABT16646  
Additional supply current  
V
CC  
= 5.5V; one input at 3.4V,  
2
per input pin  
I  
200  
500  
500  
other inputs at V or GND  
CC  
74ABTH16646  
NOTES:  
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.  
2. This is the increase in supply current for each input at 3.4V.  
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.  
4. This parameter is valid for any V between 0V and 2.0V, with a transition time of up to 100msec. From V = 21.V to V = 5V ± 10% a  
CC  
CC  
CC  
transition time of up to 100µsec is permitted.  
5. This is the bus hold overdrive current required to force the input to the opposite logic state.  
7
1998 Feb 27  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
AC CHARACTERISTICS  
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω  
R
F
L
L
LIMITS  
MAX  
T
= -40 to  
+85 C  
= +5.0V ±0.5V  
amb  
o
T
V
= +25 C  
amb  
CC  
o
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V  
V
CC  
MIN  
TYP  
MIN  
MAX  
f
Maximum clock frequency  
1
1
125  
125  
MHz  
ns  
MAX  
t
t
Propagation delay  
nCPAB to nBx or nCPBA to nAx  
1.5  
1.5  
3.3  
2.7  
4.0  
4.1  
1.5  
1.5  
4.9  
4.7  
PLH  
PHL  
t
t
Propagation delay  
nAx to nBx or nBx to nAx  
1.0  
1.0  
2.3  
2.0  
3.2  
4.1  
1.0  
1.0  
3.9  
4.6  
PLH  
PHL  
2
ns  
ns  
ns  
ns  
ns  
ns  
t
t
Propagation delay  
nSAB to nBx or nSBA to nAx  
1.0  
1.0  
3.1  
2.7  
4.3  
4.3  
1.0  
1.0  
5.0  
5.0  
PLH  
PHL  
2, 3  
5, 6  
5, 6  
5, 6  
5, 6  
t
Output enable time  
nOE to nAx or nBx  
1.0  
1.5  
3.2  
3.3  
4.6  
4.9  
1.0  
1.5  
5.5  
5.7  
PZH  
t
PZL  
t
Output disable time  
nOE to nAx or nBx  
1.5  
1.5  
3.5  
2.7  
4.9  
4.1  
1.5  
1.5  
5.4  
4.5  
PHZ  
t
PLZ  
t
Output enable time  
nDIR to nAx or nBx  
1.0  
1.5  
4.1  
4.3  
4.8  
4.8  
1.0  
1.5  
5.4  
5.6  
PZH  
t
PZL  
t
Output disable time  
nDIR to nAx or nBx  
2.0  
1.5  
3.6  
2.7  
5.7  
5.1  
2.0  
1.5  
6.7  
5.9  
PHZ  
t
PLZ  
AC SETUP REQUIREMENTS  
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω  
R
F
L
L
LIMITS  
o
o
T
V
= +25 C  
= +5.0V  
T
V
= -40 to +85 C  
amb  
CC  
amb  
CC  
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V ±0.5V  
MIN  
TYP  
MIN  
t (H)  
t (L)  
s
Setup time  
nAx to nCPAB, nBx to nCPBA  
2.0  
1.5  
1.0  
0.8  
2.0  
1.5  
s
4
4
1
ns  
ns  
ns  
t (H)  
Hold time  
nAx to nCPAB, nBx to nCPBA  
1.5  
1.0  
0.0  
–0.7  
1.5  
1.0  
h
t (L)  
h
t (H)  
Pulse width, High or Low  
nCPAB or nCPBA  
4.5  
3.0  
2.5  
2.0  
4.5  
3.0  
w
t (L)  
w
AC WAVEFORMS  
V
M
= 1.5V, V = GND to 3.0V  
IN  
1/f  
MAX  
3.0V or V  
CC  
3.0V or V  
whichever  
is less  
CC  
nCPBA or  
nCPAB  
nSBA or nSAB  
nAx or nBx  
V
V
V
V
M
V
M
M
M
M
0V  
0V  
t
w
(H)  
t (L)  
w
t
t
PLH  
PHL  
V
OH  
t
t
PLH  
PHL  
V
V
OH  
nAx or nBx  
nAx or nBx  
V
V
M
M
nAx or nBx  
V
V
M
M
V
OL  
OL  
SH00030  
SH00031  
Waveform 1. Propagation Delay, Clock Input to Output, Clock  
Pulse Width, and Maximum Clock Frequency  
Waveform 2. Propagation Delay, nSAB to nBx or nSBA to nAx,  
nAx to nBx or nBx to nAx  
8
1998 Feb 27  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
AC WAVEFORMS (Continued)  
V
M
= 1.5V, V = GND to 3.0V  
IN  
3.0V or V  
CC  
whichever  
is less  
nOE, nDIR  
nDIR  
3.0V or V  
0V  
CC  
V
V
M
M
nSBA or  
nSAB  
V
V
M
M
0V  
t
t
PHZ  
PZH  
t
t
PHL  
PLH  
V
OH  
V
V
OH  
OL  
V
nAx or nBx  
Y
V
V
nAx or nBx  
V
M
M
M
0V  
SH00032  
SH00034  
Waveform 3. Propagation Delay, nSBA to nAx or nSAB to nBx  
Waveform 5. 3–State Output Enable Time to High Level and  
Output Disable Time from High Level  
3.0V  
or  
V
CC  
nAx or  
nBx  
V
V
V
V
M
M
M
M
3.0V or V  
CC  
nOE, nDIR  
nDIR  
0V  
V
V
M
M
t (H)  
t (L)  
s
t
(H)  
t (L)  
h
s
h
0V  
3.0V  
or  
t
t
PLZ  
PZL  
nCPBA or  
nCPAB  
V
CC  
V
M
3.0V or V  
V
CC  
M
0V  
V
M
V
V
nAx or nBx  
X
NOTE: The shaded areas indicate when the input is permitted  
to change for predictable output performance.  
OL  
0V  
SH00033  
SH00035  
Waveform 4. Data Setup and Hold Times  
Waveform 6. 3–State Output Enable Time to Low Level and  
Output Disable Time from Low Level  
TEST CIRCUIT AND WAVEFORMS  
t
W
V
AMP (V)  
CC  
90%  
90%  
7.0V  
NEGATIVE  
PULSE  
V
V
M
M
10%  
10%  
90%  
R
R
L
0V  
(t  
V
V
OUT  
IN  
PULSE  
GENERATOR  
D.U.T.  
t
t
(t  
(t  
)
t
TLH  
)
THL  
F
R
)
t
(t )  
R
C
TLH  
R
THL F  
T
L
L
AMP (V)  
90%  
M
POSITIVE  
PULSE  
V
V
M
Test Circuit for 3-State Outputs  
10%  
10%  
t
W
0V  
SWITCH POSITION  
V
= 1.5V  
M
TEST  
SWITCH  
Input Pulse Definition  
t
closed  
PLZ  
PZL  
t
closed  
open  
All other  
INPUT PULSE REQUIREMENTS  
DEFINITIONS  
R = Load resistor; see AC CHARACTERISTICS for value.  
L
FAMILY  
Amplitude  
3.0V  
Rep. Rate  
1MHz  
t
t
t
F
W
R
C = Load capacitance includes jig and probe capacitance;  
L
see AC CHARACTERISTICS for value.  
74ABT/H16  
500ns 2.5ns 2.5ns  
R = Termination resistance should be equal to Z  
T
of  
OUT  
pulse generators.  
SA00018  
9
1998 Feb 27  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
SSOP56: plastic shrink small outline package; 56 leads; body width 7.5 mm  
SOT371-1  
10  
1998 Feb 27  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm  
SOT364-1  
11  
1998 Feb 27  
Philips Semiconductors  
Product specification  
74ABT16646  
74ABTH16646  
16-bit bus transceiver/register (3-State)  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make chages at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1998  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 05-96  
9397-750-03498  
Document order number:  
Philips  
Semiconductors  

相关型号:

74ABT16646DGG,118

74ABT16646DGG
NXP

74ABT16646DGG-T

暂无描述
NXP

74ABT16646DGGRE4

16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
TI

74ABT16646DGGRG4

ABT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSSOP-56
TI

74ABT16646DL

16-bit bus transceiver/register 3-State
NXP

74ABT16646DL,112

74ABT16646DL
NXP

74ABT16646DL-T

Registered Bus Transceiver, 2-Func, 8-Bit, True Output, PDSO56,
PHILIPS

74ABT16652

16-Bit Transceivers and Registers with 3-STATE Outputs
FAIRCHILD

74ABT16652

16-bit transceiver/register, non-inverting 3-State
NXP

74ABT16652CMTD

16-Bit Transceivers and Registers with 3-STATE Outputs
FAIRCHILD

74ABT16652CMTDX

16-Bit Transceivers and Registers with 3-STATE Outputs
FAIRCHILD

74ABT16652CSSC

16-Bit Transceivers and Registers with 3-STATE Outputs
FAIRCHILD