GRM21BR71A475KA73 [PANASONIC]

10 A Synchronous DC-DC Step down Regulator;
GRM21BR71A475KA73
型号: GRM21BR71A475KA73
厂家: PANASONIC    PANASONIC
描述:

10 A Synchronous DC-DC Step down Regulator

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Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
http://www.semicon.panasonic.co.jp/en/  
10 A Synchronous DC-DC Step down Regulator  
with low quiescent power mode  
(VIN = 4.5 V to 24 V, VOUT = 0.75 V to 3.6 V)  
FEATURES  
DESCRIPTION  
NN30332A is a synchronous DC-DC Step down  
Regulator (1-ch) comprising of a Controller IC and two  
power MOSFETs and employs the hysteretic control  
system.  
High-Speed Response DC-DC Step Down Regulator  
Circuit that employs Hysteretic Control System  
Hi-side 20 m(Typ), Low-side 6 m(Typ) MOSFETs  
for High efficiency at 10 A  
By this system, when load current changes suddenly,  
it responds at high speed and minimizes the changes  
of output voltage.  
Low Power Mode (discontinuous) for Light Load Efficiency  
Maximum Output Current : 10 A  
Since it is possible to use capacitors with small  
capacitance and it is unnecessary to add external  
parts for system phase compensation, this IC realizes  
downsizing of set and reducing in the number of  
external parts. Output voltage is adjustable by user.  
Input Voltage Range : AVIN = 4.5 V to 24 V,  
PVIN = 4.5 V to 24 V,  
V5 = 4.5 V to 5.5 V  
Output Voltage Range : 0.75 V to 3.6 V  
Selectable Switching Frequency 430 kHz / 630 kHz  
Built-in Feed Back Resistors for 1.2 V / 1.05 V Output  
Voltage (Also configurable using External Resistors)  
Adjustable Soft Start  
Maximum current is 10 A.  
APPLICATIONS  
High Current Distributed Power Systems such as  
PCs  
Selectable Low Operating and Standby Quiescent  
Current to achieve light load efficiency  
HDDs (Hard Disk Drives)  
SSDs (Solid State Drives)  
Game consoles  
Open Drain Power Good Indication for Output Over /  
Under Voltage  
Built-in Under Voltage Lockout (UVLO),  
Thermal Shut Down (TSD), Under Voltage Detection (UVD),  
Over Voltage Detection (OVD), Short Circuit Protection (SCP)  
Over Current Protection (OCP),  
Servers  
Security Cameras  
Network TVs  
Home Appliances  
OA Equipment etc.  
24 pin Plastic Quad Flat Non-leaded Package Heat  
Slug Down (QFN Type)  
(Size : 4 mm 4 mm 0.7 mm, 0.5 mm pitch)  
SIMPLIFIED APPLICATION  
V5  
PVIN  
EN  
PVIN  
100 k  
PGOOD  
VOUT  
BST  
AVIN  
NN30332A  
0.1 µF  
1 µH  
AVIN  
VOUT = 1.05 V  
LX  
27 k  
36 k  
VFB  
22 µF 4  
V5  
PGND  
V5  
SS  
3.3 nF  
AGND  
Note : The application circuit is an example. The operation of  
the mass production set is not guaranteed. Sufficient  
evaluation and verification is required in the design of  
the mass production set. The Customer is fully  
responsible for the incorporation of the above  
illustrated application circuit in the design of the  
equipment.  
Condition :  
IN = 12 V, VOUT Setting = 1.05 V,  
Switching Frequency = 430 kHz, Low Power Mode / Normal Mode,  
LO = 1 µH, CO = 88 µF (22 µF x 4) #Including V5 current  
V
Page 1 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
ORDERING INFORMATION  
Order Number  
Feature  
Maximum Output Current : 10 A  
Package  
Output Supply  
Emboss Taping  
NN30332A-VB  
24 pin HQFN  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Supply voltage 1  
Symbol  
VIN  
Rating  
Unit  
V
Notes  
*1  
30  
Supply voltage 2  
V5  
6
V
*1  
Operating free-air temperature  
Operating junction temperature  
Storage temperature  
Topr  
Tj  
– 40 to + 85  
– 40 to + 150  
– 55 to + 150  
C  
C  
C  
*2  
*2  
Tstg  
*2  
*1  
*3  
VLP, VFSEL, VOUT, VFB  
– 0.3 to (V5 + 0.3)  
– 0.3 to 6.0  
V
V
V
Input Voltage Range  
VEN  
*1  
*1  
*3  
VPGOOD  
– 0.3 to (V5 + 0.3)  
Output Voltage Range  
ESD  
*1  
*4  
VLX  
– 0.3 to (VIN + 0.3)  
2
V
HBM  
kV  
Notes : This product may sustain permanent damage if subjected to conditions higher than the above stated absolute  
maximum rating. This rating is the maximum rating and device operating at this range is not guaranteed as it  
is higher than our stated recommended operating range.  
When subjected under the absolute maximum rating for a long time, the reliability of the product may be affected.  
VIN is voltage for AVIN, PVIN. VIN = AVIN = PVIN.  
Do not apply external currents and voltages to any pin not specifically mentioned.  
*1 : The values under the condition not exceeding the above absolute maximum ratings and  
the power dissipation.  
*2 : Except for the power dissipation, operating ambient temperature, and storage temperature,  
all ratings are for Ta = 25 C.  
*3 :(V5 + 0.3) V must not exceed 6 V.  
*4 : (VIN + 0.3) V must not exceed 30 V.  
Page 2 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
POWER DISSIPATION RATING  
PD  
(Ta = 25 C)  
PD  
(Ta = 85 C)  
Package  
j-a  
j-C  
Notes  
50.4 C / W  
33.3 C / W  
4.5 C / W  
3.6 C / W  
2.480 W  
3.754 W  
1.290 W  
1.858 W  
*1  
*2  
24 pin Plastic Quad Flat Non-leaded  
Package Heat Slug Down (QFN Type)  
Notes : For the actual usage, please follow the power supply voltage, load and ambient temperature conditions to ensure that there is  
enough margin and the thermal design does not exceed the allowable value.  
*1:Glass Epoxy Substrate (4 Layers) [50 50 0.8 t (mm)]  
*2:Glass Epoxy Substrate (4 Layers) [50 50 1.57 t (mm)]  
CAUTION  
Although this IC has built-in ESD protection circuit, it may still sustain permanent damage if not handled  
properly. Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS  
gates.  
RECOMMENDED OPERATING CONDITIONS  
Parameter  
Symbol  
AVIN  
PVIN  
V5  
Min  
4.5  
Typ  
12.0  
12.0  
5.0  
Max  
24.0  
Unit Notes  
V
V
V
V
V
V
V
V
*1  
*1  
*1  
*2  
Supply voltage range  
4.5  
24.0  
4.5  
5.5  
VLP  
– 0.3  
– 0.3  
– 0.3  
– 0.3  
– 0.3  
V5 + 0.3  
V5 + 0.3  
5.0  
Input Voltage Range  
Output Voltage Range  
VFSEL  
VEN  
VPGOOD  
VLX  
V5 + 0.3  
VIN + 0.3  
Notes : Voltage values, unless otherwise specified, are with respect to GND.  
GND is voltage for AGND, PGND. AGND = PGND  
VIN is voltage for AVIN, PVIN. VIN = AVIN = PVIN.  
Do not apply external currents or voltages to any pin not specifically mentioned.  
*1 : (V5 + 0.3) V must not exceed 6 V.  
*2 : (VIN + 0.3) V must not exceed 30 V.  
Page 3 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
ELECRTRICAL CHARACTERISTICS  
CO = 22 µF 4, LO = 1 µH, VOUT Setting = 1.05 V, VIN = AVIN = PVIN = 12 V, V5 = 5 V,  
Switching Frequency = 430 kHz, VLP = 1 V (Normal Mode),  
Ta = 25 C 2 C unless otherwise noted.  
Limits  
Typ  
Parameter  
Current Consumption  
Symbol  
Condition  
Unit Note  
Max  
Min  
VEN = 5 V, IOUT = 0 A  
Consumption current at active  
(Normal Mode)  
RFB1 = 27 k  
IVDDACTN  
450  
80  
900  
130  
µA  
µA  
RFB2 = 36 k  
VLP = 1 V , VFB = 0.62 V  
VEN = 5 V, IOUT = 0 A  
Consumption current at active  
(Low Power Mode)  
RFB1 = 27 k  
IVDDACTL  
RFB2 = 36 k  
VLP = 0 V, VFB = 0.62 V  
V5 Consumption current at standby  
IV5STB  
V5 = 5 V, VEN = 0 V  
2
1
4
2
µA  
µA  
AVIN = PVIN = 7.4 V  
AVIN/PVIN Consumption current at  
standby  
IVINSTB  
V
EN = 0 V  
Logic Pin Characteristics  
EN pin Low-level input voltage  
EN pin High-level input voltage  
EN pin leakage current  
VENL  
VENH  
1.5  
3
0.3  
5.0  
7
V
V
ILEAKEN  
VLPL  
VEN = 5 V  
µA  
V
LP pin Low-level input voltage  
LP pin High-level input voltage  
LP pin leakage current  
2
0.49  
V5  
VLPH  
0.72  
V
ILEAKLP  
VFSELL  
VLP = 1 V  
4
µA  
V
FSEL pin Low-level input voltage  
0.3  
V5  
0.7  
FSEL pin High-level input voltage  
FSEL pin leakage current  
VFSELH  
ILEAKFS  
5
V5  
10  
V
VFSEL = 5 V  
µA  
Page 4 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
ELECRTRICAL CHARACTERISTICS (Continued)  
CO = 22 µF 4, LO = 1 µH, VOUT Setting = 1.05 V, VIN = AVIN = PVIN = 12 V, V5 = 5 V,  
Switching Frequency = 430 kHz, VLP = 1 V (Normal Mode),  
Ta = 25 C 2 C unless otherwise noted.  
Limits  
Typ  
Parameter  
VFB Characteristics  
Symbol  
Condition  
Unit Note  
Max  
Min  
VFB comparator threshold  
VFB pin leakage current 1  
VFB pin leakage current 2  
Under Voltage Lock Out  
UVLO shutdown voltage  
UVLO wakeup voltage  
UVLO hysteresis  
VFBTH  
ILEAKFB1  
ILEAKFB2  
0.594 0.600 0.606  
V
VFB = 0 V  
– 1  
– 1  
1
1
µA  
µA  
VFB = 6 V  
VUVLODE  
VUVLORE  
VUVLO  
V5 = 5 V to 0 V  
V5 = 0 V to 5 V  
4.15  
4.35  
150  
4.20  
4.40  
200  
4.25  
4.45  
250  
V
V
mV  
PGOOD  
PGOOD Threshold 1  
(VFB ratio for UVD detect)  
PGOOD Hysteresis 1  
(VFB ratio for UVD release)  
PGOOD Threshold 2  
(VFB ratio for OVD detect)  
PGOOD Hysteresis 2  
(VFB ratio for OVD release)  
VPGUV  
PGOOD : High to Low  
77  
3.5  
107  
3.5  
85  
5.0  
115  
5.0  
93  
6.5  
123  
6.5  
%
%
%
%
VPGUV PGOOD : Low to High  
VPGOV PGOOD : High to Low  
VPGOV PGOOD : Low to High  
PGOOD start up delay time  
(After reached VFB = 0.6 V)  
VPDT  
RPG  
0.4  
1.0  
10  
1.6  
15  
ms  
PGOOD ON resistance  
Page 5 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
ELECRTRICAL CHARACTERISTICS (Continued)  
CO = 22 µF 4, LO = 1 µH, VOUT Setting = 1.05 V, VIN = AVIN = PVIN = 12 V, V5 = 5 V,  
Switching Frequency = 430 kHz, VLP = 1 V (Normal Mode),  
Ta = 25 C 2 C unless otherwise noted.  
Limits  
Typ  
Parameter  
Symbol  
Condition  
Unit Note  
Max  
Min  
DC-DC Characteristics  
RFB1 = 27 k  
Output voltage 1  
Vo1  
1.035 1.050 1.065  
V
RFB2 = 36 k  
IOUT = 5 A  
RFB1 = 30 k  
Output voltage 2  
Output voltage 3  
Output voltage 4  
Vo2  
Vo1  
Vo2  
1.182 1.200 1.218  
1.035 1.050 1.065  
1.182 1.200 1.218  
V
V
V
RFB2 = 30 k  
IOUT = 5 A  
VFB = float,  
before VEN = 0 V to 1.5 V  
IOUT = 5 A  
VFB = V5,  
before VEN = 0 V to 1.5 V  
IOUT = 5 A  
PVIN = 6 V to 24 V  
IOUT = 150 mA, VLP = 0 V  
Line regulation 1  
Line regulation 2  
VLIN1  
VLIN2  
0.25  
0.25  
0.75 %/V  
0.75 %/V  
PVIN = 6 V to 24 V  
IOUT = 0.5 A  
IOUT = 10 mA to 150 mA  
VLP = 0V  
Load regulation 1  
VLOA1  
VLOA2  
VRL1  
1.5  
2.0  
40  
%
%
*1  
*1  
*1  
Load regulation 2  
IOUT = 10 mA to 10 A  
IOUT = 10 mA  
VLP = 0 V or 1 V  
mV  
[p-p]  
Output ripple voltage 1  
mV  
[p-p]  
Output ripple voltage 2  
Load transient response 1  
Load transient response 2  
VRL2  
VTR1  
VTR2  
RONH  
RONL  
IOUT = 4 A  
15  
20  
20  
20  
6
40  
10  
*1  
*1  
*1  
IOUT = 100 mA to 4 A  
t = 0.5 A / µs  
mV  
mV  
m  
m  
IOUT = 4 A to 100 mA  
t = 0.5 A / µs  
High Side Power MOSFET  
ON resistance  
VGS = 5.0 V  
VGS = 5.0 V  
Low Side Power MOSFET  
ON resistance  
Min Input and output voltage  
difference  
Vdiff  
Vdiff = VIN – VOUT  
2.5  
V
*1  
Note : *1 : Typical design value  
Page 6 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
ELECRTRICAL CHARACTERISTICS (Continued)  
CO = 22 µF 4, LO = 1 µH, VOUT Setting = 1.05 V, VIN = AVIN = PVIN = 12 V, V5 = 5 V,  
Switching Frequency = 430 kHz, VLP = 1 V (Normal Mode),  
Ta = 25 C 2 C unless otherwise noted.  
Limits  
Typ  
Parameter  
PROTECTION  
Symbol  
Condition  
Unit Note  
Max  
Min  
DC-DC Over Current  
Protection Limit  
ILMT  
50  
12  
60  
70  
A
*1  
*1  
*1  
DC-DC Short Circuit  
Protection Threshold  
Ishort  
TTSDTH  
TTSDHYS  
VFB = 0.6 V to 0.0 V  
%
Thermal Shut Down (TSD)  
Threshold  
130  
30  
C  
C  
Thermal Shut Down (TSD)  
Hysteresis  
Soft-Start Timing  
SS Charge Current  
ISSCHG  
VSS = 0.3 V  
VEN = 0 V  
1
2
5
4
µA  
SS Discharge Resistance (Shut-down)  
Switching Frequency  
RSSDIS  
10  
k  
DC-DC Switching Frequency 1  
DC-DC Switching Frequency 2  
Note : *1 : Typical design value  
DDFSW1  
DDFSW2  
IOUT = 3 A, VFSEL = 0 V  
IOUT = 3 A, VFSEL = V5  
430  
630  
kHz *1  
kHz *1  
Page 7 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
PIN CONFIGURATION  
Top View  
18 17 16 15 14 13  
19  
20  
21  
22  
23  
24  
12 AVIN  
PGOOD  
AGND  
BST  
25  
AGND  
11 AGND  
LP  
10  
9
27  
LX  
26  
PVIN  
PGND  
8
PVIN  
7
1 2 3 4 5 6  
PIN FUNCTIONS  
Pin No. Pin name  
Type  
Description  
1
2
Power MOSFET output pin  
An inductor is connected and switching operation is carried out  
between VIN and GND.  
Due to high current and large amplitude at this terminal,  
the parasitic inductance and impedance of the routing path  
can cause an increase in noise and a degradation in the efficiency.  
Routing path should be kept as short as possible.  
3
LX  
Output  
4
5
6
7
8
9
PGND  
Ground  
Ground pin for Power MOSFET  
Low Power Mode / Normal Mode selection pin  
10  
LP  
Input  
Ground  
Input  
Low Power Mode is set at Low level input, Normal Mode is set at High level  
input.  
11  
20  
AGND  
AVIN  
Ground pin  
Power supply voltage sense pin  
12  
Recommended rise time ( time to reach 90 % of set value ) setting is  
greater than or equal to 10 µs and less than or equal to 1 s.  
Frequency selection pin  
This is set to 430 kHz at Low level input, 630 kHz at High level input  
13  
14  
15  
FSEL  
EN  
Input  
Input  
ON / OFF control pin  
DC-DC is stopped at Low level input, and it is started at High level input.  
Power  
supply  
V5  
5 V input pin (Power supply for internal control circuit)  
Note : Detailed pin descriptions are provided in the OPERATION and APPLICATION INFORMATION section.  
Page 8 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
PIN FUNCTIONS (Continued)  
Pin No. Pin name  
Type  
Description  
Comparator negative input pin and 1.05 V / 1.2 V output voltage selection pin  
VFB terminal voltage is regulated to REF output (internal reference voltage).  
Since VFB is a high impedance terminal, it should not be routed near  
other noisy path (LX, BST, etc.) or an inductor  
16  
VFB  
Input  
Routing path should be kept as short as possible.  
Output voltage sense pin  
Switching frequency is controlled by monitoring output voltage.  
17  
18  
VOUT  
SS  
Input  
Soft start capacitor connect pin  
The output voltage at a start up is smoothly controlled  
by adjusting Soft Start time.  
Output  
Please connect capacitor between SS and GND.  
Power good open drain pin  
A pull up resistor between PGOOD and V5 terminal is necessary.  
Output is low during Over or Under Voltage Detection conditions.  
19  
21  
PGOOD  
BST  
Output  
Output  
High side Power MOSFET gate driver pin  
Bootstrap operation is carried out in order to drive the gate voltage of High  
side Power MOSFET. Please connect a capacitor between BST and LX.  
Routing path should be kept as short as possible to minimize noise.  
22  
23  
24  
25  
Power supply pin for Power MOSFET  
Recommended rise time ( time to reach 90 % of set value ) setting is  
greater than or equal to 10 µs and less than or equal to 1 s.  
Power  
supply  
PVIN  
Ground pin for heat radiation  
AGND  
PVIN  
LX  
Ground  
Power  
supply  
26  
27  
Power supply pin for heat radiation  
Power MOSFET output pin for heat radiation  
Output  
Note : Detailed pin descriptions are provided in the OPERATION and APPLICATION INFORMATION section.  
Page 9 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
FUNCTIONAL BLOCK DIAGRAM  
AVIN  
SS  
18  
12  
Soft-Start  
SS  
EN  
19  
PGOOD  
14  
Ton / Toff timer  
0.6 V + 15 %  
0.6 V – 15 %  
V5  
V5  
15  
VREF  
BGR  
21  
BST  
Internal circuit  
UVLO  
SCP  
OCP  
TSD  
22,23,24,26  
PVIN  
17  
1.2 V / 1.05 V  
VOUT  
Divider/Selector  
Fault  
HGATE  
HPD  
HGO  
16  
1,2,3,  
4,5,6,  
27  
VFB  
Soft-Start  
LX  
VREF  
Ton  
Aux  
Timer  
REF  
0.6 V  
Control  
Logic  
ON  
CMP  
LGATE  
13  
10  
Toff  
FSEL  
LPD  
LGO  
Timer + Comp Timer + Comp  
AVIN  
Coast  
PGND  
7,8,9  
Low Power  
/ Normal  
LP  
11,20,25  
AGND  
Note : This block diagram is for explaining functions. Part of the block diagram may be omitted, or it may be simplified.  
Page 10 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
OPERATION  
1. Protection  
(1) Over Current Protection (OCP) and  
Short Circuit Protection (SCP)  
(2) Over Voltage Detection (OVD)  
If the VFB pin voltage exceeds 115 % of the set  
voltage (0.6 V) and lasts more than 10 ns, Over  
Voltage Detection will be triggered and PGOOD pin will  
be pulled down. Furthermore, in an over voltage  
condition, high side power MOSFET is turned off to  
stop PWM operation, and low side power MOSFET is  
turned on and held on until the inductor current starts  
to flow back to the device. If the VFB pin voltage drops  
below 110 % of the set voltage within 2.2 ms after Over  
Voltage Detection triggers, PGOOD pin will be pulled  
up again and PWM operation will resume. Otherwise,  
both high side and low side MOSFET will be latched off  
and the output will be discharged by internal MOSFET.  
Power reset or EN pin reset is necessary to activate  
the device again.  
1) The Over Current Protection is activated at about 12 A  
(Typ). This device uses pulse – by – pulse valley  
current protection method. When the low side power  
MOSFET is turned on, the voltage across the drain  
and source is monitored which is proportional to the  
inductor current. The high side power MOSFET is only  
allowed to turn on when the current flowing in the low  
side power MOSFET falls below the OCP level.  
Hence, during the OCP, the output voltage continues  
to drop at the specified current. OCP is a non – latch  
type protection.  
2) The Short Circuit Protection function is implemented  
when the output voltage decreases and the VFB pin  
reaches to 60 % of the set voltage (0.6 V).  
If the VFB voltage stays below 70 % of the set  
voltage over 250 µs after SCP triggers, both  
high side and low side power MOSFET will be latched  
off and the output will be discharged by internal  
MOSFET. Power reset or EN pin reset is necessary to  
activate the device again.  
115 %  
110 %  
VFB  
90 %  
85 %  
0.6 V  
0.6 V  
< 2.2 ms  
1 ms  
> 2.2 ms  
Over Current Protection ( typ : 12 A )  
10.5 A to 14 A  
PGOOD  
1)  
Note: PGOOD pin is pulled up to V5 pin  
Figure : OVD Operation  
(Ground short  
protection Detection  
2)  
60% of Vout )  
(3) Output discharging function  
Output current [A]  
When EN is low, the output is discharged by an  
internal MOSFET that is connected to VOUT pin.  
When EN is high, if the controller is turned off by  
Under Voltage Lock Out, or the controller is latched off  
by Over Voltage Detection or Short Circuit Protection,  
the output is discharged by the above said internal  
MOSFET.  
Figure : OCP and SCP Operation  
The ON resistance of the internal MOSFET is 50 .  
Page 11 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
OPERATION (Continued)  
1. Protection (Continued)  
2. Pin Setting  
(4) Under Voltage Detection (UVD)  
(1) Operating LP Setting  
During the operation, if the output voltage drops and  
VFB pin voltage reaches 85 % of the set  
The IC can operate at two different modes :  
Low Power Mode and Normal Mode.  
voltage (0.6 V), the MOSFET, the drain of which is  
connected to PGOOD pin, will turn on and pull the  
voltage of PGOOD to be low.  
In Low Power Mode, the IC is working under low  
current consumption to achieve light load efficiency  
(IOUT < 150 mA). In Normal Mode, the IC is working  
at high current ability up to 10 A.  
If the output voltage continues to drop and VFB pin  
voltage reaches 60 % of the set voltage (0.6 V),  
Short Circuit Protection (SCP) will be triggered.  
If the output voltage returns to 90 % of the set  
voltage (0.6 V) before triggering Short Circuit  
Protection, the MOSFET that is connected to PGOOD  
pin will turn off after 1 ms and PGOOD voltage will  
become logic high.  
The Operating Mode can be set by LP pin as follows.  
LP pin  
Low  
Mode  
Low Power Mode  
Normal Mode  
High  
(2) Switching Frequency Setting  
0.6 V  
VFB  
90 %  
85 %  
The IC can operate at two different frequency :  
430 kHz and 630 kHz.  
60 %  
The Switching Frequency can be set by FSEL pin  
as follows.  
1 ms  
PGOOD  
FSEL pin  
Frequency [kHz]  
Low  
430  
630  
Note: PGOOD Pin is pulled up to V5 pin  
Figure : UVD Operation  
High  
(5) Thermal Shut Down (TSD)  
When the IC internal temperature becomes more  
than about 130C, TSD operates and DC-DC turns off.  
Page 12 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
OPERATION (Continued)  
3. Output Voltage Setting  
4. Soft Start Setting  
The Output Voltage can be set by external resistance  
of VFB pin, and its calculation is as follows.  
Soft Start function maintains the smooth control of the  
output voltage during start up by adjusting soft start  
time. When the EN pin becomes High, the current  
(2 µA) begin to charge toward the external capacitor  
(CSS) of SS pin, and the voltage of SS pin increases  
straightly.  
Because the voltage of VFB pin is controlled by the  
voltage of SS pin during start up, the voltage of VFB  
increase straightly to the regulation voltage (0.6 V)  
together with the voltage of SS pin and keep the  
regulation voltage after that. On the other hand, the  
voltage of SS pin increase to about 2.8 V and keep the  
voltage. The calculation of Soft Start Time is as follows.  
VOUT  
RFB1  
RFB1  
RFB2  
VFB (0.6 V)  
VOUT = (1 +  
) 0.6  
RFB2  
Below resistors are recommended for following popular  
output voltage.  
0.6  
2µ  
VOUT [V]  
3.3  
R
FB1 []  
54 k  
36 k  
30 k  
30 k  
27 k  
RFB2 []  
12 k  
Soft Start Setting [s] =  
CSS  
1.8  
18 k  
C
SS : External capacitor value of SS pin  
1.35  
1.2  
24 k  
30 k  
1.05  
36 k  
VFB comparator threshold is adjusted to 1 %, but  
the actual output voltage accuracy becomes more  
than 1 % due to the influence from the circuits other  
than VFB comparator.  
EN  
4.4 V  
VREG  
UVLO  
In the case of VOUT setting = 1.05 V, the actual output  
voltage accuracy becomes 1.5 %.  
(VIN = 12 V, IOUT = 4 A, Switching Frequency =  
430 kHz)  
Soft Start Time [s]  
0.6 V  
SS  
VFB  
VOUT  
Figure : Soft Start Operation  
Page 13 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
OPERATION (Continued)  
5. Built-in Feed Back Resistors for 1.05 V / 1.2 V  
NN30332A has built-in feedback resistors for 1.05 V  
and 1.2 V output voltage.  
At the timing of EN pin going from Low to High,  
depending on the state of VFB pin, the output voltage  
can be set as follows :  
VFB [V]  
V5  
VOUT [V]  
1.2 V  
FLOAT  
1.05 V  
Adjustable between  
0.75 V to 3.6 V  
Resistor divider  
4.4 V  
V5  
EN  
UVLO  
V5  
FLOAT  
0.6V  
VFB  
1.2V  
1.05V  
0.75V to 3.6V using External Resistors  
VOUT  
Figure : Timing chart of output voltage setting  
Page 14 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
OPERATION (Continued)  
6. Inductor and Output Capacitor Setting  
IL  
Highest efficiency operation is obtained at low  
IO  
frequency with small ripple current. However,  
achieving this requires a large inductor. There is a  
trade off among component size, efficiency and  
operating frequency. A reasonable starting point is to  
choose a ripple current that is about 40 % of  
IO (Max). The largest ripple current occurs at the  
highest Ei. To guarantee that ripple current does not  
exceed a specified maximum, the inductance should  
be chosen according to:  
0
IL / 2  
0
IC  
IL / 2  
Eo  
2EiIoxf  
Ei Eo  
VO  
EO  
Lo   
@ Ei Ei_max  
VRPL  
And its maximum current rating is  
Ton  
IL  
2
IL_max Io_max   
@ Ei Ei_max  
T = 1 / f  
The selection of CO is primarily determined by the  
ESR (RC) required to minimize voltage ripple and load  
transients. The output ripple VRPL is approximately  
bounded by:  
VO(EO)  
LO  
Q1  
IL  
Q2  
IO  
IC  
CoRc2  
2Lo  
IL  
8Cof  
Ei  
CO  
Vrpl Vop Vob Ei  
CoRc2  
RC  
Eo  
Ei Eo  
Ei  
2Lo  
8EiLoCof 2  
From the above equation, to achieve desired output  
ripple, low ESR ceramic capacitors are recommended,  
and its required RMS current rating is:  
Given the desired input and output voltages,  
the inductor value and operating frequency determine  
the ripple current.  
IL  
Eo  
EiLof  
Ei Eo  
Ic(rms)_max   
@ Ei Ei_max  
IL   
2 3  
IL  
2
Iox   
Page 15 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES  
1. Output Ripple Voltage  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 430 kHz, Normal Mode,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
IOUT = 0 A  
IOUT = 1 A  
VOUT (50mV/div)  
VOUT (50mV/div)  
LX (5V/div)  
LX (5V/div)  
TIME (20ms/div)  
TIME (2us/div)  
IOUT = 3 A  
IOUT = 10 A  
VOUT (50mV/div)  
VOUT (50mV/div)  
LX (5V/div)  
LX (5V/div)  
TIME (2us/div)  
TIME (2us/div)  
Page 16 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
1. Output Ripple Voltage (Continued)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 430 kHz, Low Power Mode,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
IOUT = 0 A  
IOUT = 10 mA  
VOUT (50mV/div)  
VOUT (50mV/div)  
LX (5V/div)  
LX (5V/div)  
TIME (20ms/div)  
TIME (200us/div)  
IOUT = 50 mA  
IOUT = 150 mA  
VOUT (50mV/div)  
VOUT (50mV/div)  
LX (5V/div)  
LX (5V/div)  
TIME (50us/div)  
TIME (10us/div)  
Page 17 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
1. Output Ripple Voltage (Continued)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 630 kHz, Normal Mode,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
IOUT = 1 A  
IOUT = 0 A  
VOUT (20mV/div)  
VOUT (20mV/div)  
LX (5V/div)  
LX (5V/div)  
TIME (20ms/div)  
TIME (1us/div)  
IOUT = 10 A  
IOUT = 3 A  
VOUT (20mV/div)  
VOUT (20mV/div)  
LX (5V/div)  
LX (5V/div)  
TIME (1us/div)  
TIME (1us/div)  
Page 18 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
1. Output Ripple Voltage (Continued)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 630 kHz, Low Power Mode,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
IOUT = 0 A  
IOUT = 10 mA  
VOUT (20mV/div)  
VOUT (20mV/div)  
LX (5V/div)  
LX (5V/div)  
TIME (100us/div)  
TIME (20ms/div)  
I
OUT = 50 mA  
IOUT = 150 mA  
VOUT (20mV/div)  
VOUT (20mV/div)  
LX (5V/div)  
LX (5V/div)  
TIME (5us/div)  
TIME (20us/div)  
Page 19 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
2. Load transient response  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 430 kHz, Normal Mode,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
IOUT = 10 mA to 10 A (0.5A / µs)  
IOUT = 10 mA to 10 A (0.15A / µs)  
50mV  
50mV  
VOUT (50mV/div)  
VOUT (50mV/div)  
IOUT (5A/div)  
IOUT (5A/div)  
PGOOD (10V/div)  
PGOOD (10V/div)  
TIME (500us/div)  
TIME (500us/div)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 430 kHz, Low Power Mode,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
IOUT = 10 mA to 150mA (0.5A / µs)  
IOUT = 10 mA to 150mA (0.15A / µs)  
VOUT (50mV/div)  
VOUT (50mV/div)  
I
OUT (0.1A/div)  
IOUT (0.1A/div)  
PGOOD (10V/div)  
PGOOD (10V/div)  
TIME (500us/div)  
TIME (500us/div)  
Page 20 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
2. Load transient response (Continued)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 630 kHz, Normal Mode,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
IOUT = 10 mA to 10 A (0.5A / µs)  
IOUT = 10 mA to 10 A (0.15A / µs)  
40mV  
40mV  
VOUT (50mV/div)  
VOUT (50mV/div)  
IOUT (5A/div)  
IOUT (5A/div)  
PGOOD (10V/div)  
PGOOD (10V/div)  
TIME (500us/div)  
TIME (500us/div)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 630 kHz, Low Power Mode,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
IOUT = 10 mA to 150mA (0.5A / µs)  
IOUT = 10 mA to 150mA (0.15A / µs)  
VOUT (50mV/div)  
VOUT (50mV/div)  
IOUT (0.1A/div)  
I
OUT (0.1A/div)  
PGOOD (10V/div)  
PGOOD (10V/div)  
TIME (500µs/div)  
TIME (500µs/div)  
Page 21 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
3. Efficiency  
Condition : VIN = 7.4 V / 12 V / 19 V, V5 = 5 V, Switching Frequency = 430 kHz, Normal Mode,  
CO = 88 µF (22 µF x 4) #Including V5 current  
VOUT = 1.2 V, Lo = 1 µH  
VOUT = 1.05 V, Lo = 1 µH  
VOUT = 1.8 V, Lo = 1 µH  
VOUT = 3.3 V, Lo = 3.3 µH  
Page 22 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
3. Efficiency (Continued)  
Condition : VIN = 7.4 V / 12 V / 19 V, V5 = 5 V, Switching Frequency = 430 kHz, Low Power Mode,  
CO = 88 µF (22 µF x 4) #Including V5 current  
V
OUT = 1.2 V, Lo = 1 µH  
VOUT = 1.05 V, Lo = 1 µH  
VOUT = 1.8 V, Lo = 1 µH  
VOUT = 3.3 V, Lo = 3.3 µH  
Page 23 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
3. Efficiency (Continued)  
Condition : VIN = 7.4 V / 12 V / 19 V, V5 = 5 V, Switching Frequency = 630 kHz, Normal Mode,  
CO = 88 µF (22 µF x 4) #Including V5 current  
VOUT = 1.2 V, Lo = 1 µH  
VOUT = 1.05 V, Lo = 1 µH  
VOUT = 1.8 V, Lo = 1 µH  
VOUT = 3.3 V, Lo = 3.3 µH  
Page 24 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
3. Efficiency (Continued)  
Condition : VIN = 7.4 V / 12 V / 19 V, V5 = 5 V, Switching Frequency = 630 kHz, Low Power Mode,  
CO = 88 µF (22 µF x 4) #Including V5 current  
VOUT = 1.05 V, Lo = 1 µH  
VOUT = 1.2 V, Lo = 1 µH  
VOUT = 3.3 V, Lo = 3.3 µH  
VOUT = 1.8 V, Lo = 1 µH  
Page 25 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
4. Load Regulation  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Normal Mode, LO = 1 µH, CO = 88 µF (22 µF x 4)  
Frequency = 430 kHz  
Frequency = 630 kHz  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Low Power Mode, LO = 1 µH, CO = 88 µF (22 µF x 4)  
Frequency = 430 kHz  
Frequency = 630 kHz  
Page 26 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
5. Line Regulation  
Condition : V5 = 5 V, VOUT Setting = 1.05 V, Normal Mode, IOUT = 5 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
Frequency = 430 kHz  
Frequency = 630 kHz  
Condition : V5 = 5 V, VOUT Setting = 1.05 V, Low Power Mode, IOUT = 150 mA, LO = 1 µH, CO = 88 µF (22 µF x 4)  
Frequency = 430 kHz  
Frequency = 630 kHz  
Page 27 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
6. Start / Shut Down  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 430 kHz, Normal Mode,  
IOUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
EN (2V/div)  
SS (2V/div)  
EN (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
VOUT (0.5V/div)  
TIME (10ms/div)  
TIME (10ms/div)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 430 kHz, Low Power Mode,  
OUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
I
EN (2V/div)  
EN (2V/div)  
SS (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
VOUT (0.5V/div)  
TIME (10ms/div)  
TIME (10ms/div)  
Page 28 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
6. Start / Shut Down (Continued)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 630 kHz, Normal Mode,  
OUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
I
EN (2V/div)  
SS (2V/div)  
EN (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
VOUT (0.5V/div)  
Time (10ms/div)  
Time (10ms/div)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 630 kHz, Low Power Mode,  
OUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
I
EN (2V/div)  
SS (2V/div)  
EN (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
VOUT (0.5V/div)  
Time (10ms/div)  
Time (10ms/div)  
Page 29 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
6. Start / Shut Down (Continued)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V (Built-in Feed Back Resistors),  
Switching Frequency = 430 kHz, Normal Mode, IOUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
EN (2V/div)  
EN (2V/div)  
SS (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
VOUT (0.5V/div)  
TIME (10ms/div)  
TIME (10ms/div)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V (Built-in Feed Back Resistors),  
Switching Frequency = 430 kHz, Low Power Mode, IOUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
EN (2V/div)  
SS (2V/div)  
EN (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
VOUT (0.5V/div)  
TIME (10ms/div)  
TIME (10ms/div)  
Page 30 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
6. Start / Shut Down (Continued)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V (Built-in Feed Back Resistors),  
Switching Frequency = 630 kHz, Normal Mode, IOUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
EN (2V/div)  
EN (2V/div)  
SS (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
VOUT (0.5V/div)  
Time (10ms/div)  
Time (10ms/div)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V (Built-in Feed Back Resistors),  
Switching Frequency = 630 kHz, Low Power Mode, IOUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
EN (2V/div)  
SS (2V/div)  
EN (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
V
OUT (0.5V/div)  
Time (10ms/div)  
Time (10ms/div)  
Page 31 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
6. Start / Shut Down (Continued)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.2 V (Built-in Feed Back Resistors),  
Switching Frequency = 430 kHz, Normal Mode, IOUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
EN (2V/div)  
EN (2V/div)  
SS (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
VOUT (0.5V/div)  
TIME (10ms/div)  
TIME (10ms/div)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.2 V (Built-in Feed Back Resistors),  
Switching Frequency = 430 kHz, Low Power Mode, IOUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
EN (2V/div)  
SS (2V/div)  
EN (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
VOUT (0.5V/div)  
TIME (10ms/div)  
TIME (10ms/div)  
Page 32 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
6. Start / Shut Down (Continued)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.2 V (Built-in Feed Back Resistors),  
Switching Frequency = 630 kHz, Normal Mode, IOUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
EN (2V/div)  
EN (2V/div)  
SS (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
VOUT (0.5V/div)  
Time (10ms/div)  
Time (10ms/div)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.2 V (Built-in Feed Back Resistors),  
Switching Frequency = 630 kHz, Low Power Mode, IOUT = 0 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
EN (2V/div)  
SS (2V/div)  
EN (2V/div)  
SS (2V/div)  
VOUT (0.5V/div)  
V
OUT (0.5V/div)  
Time (10ms/div)  
Time (10ms/div)  
Page 33 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
7. Short Circuit Protection  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 430 kHz,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
Normal Mode  
Low Power Mode  
LX (10V/div)  
SS (2V/div)  
LX (10V/div)  
SS (2V/div)  
VOUT (2V/div)  
VOUT (2V/div)  
I
OUT (10A/div)  
IOUT (1A/div)  
TIME (1ms/div)  
TIME (500us/div)  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 630 kHz,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
Normal Mode  
Low Power Mode  
LX (10V/div)  
SS (2V/div)  
LX (10V/div)  
SS (2V/div)  
VOUT (2V/div)  
VOUT (2V/div)  
IOUT (1A/div)  
IOUT (10A/div)  
TIME (1ms/div)  
TIME (500us/div)  
Page 34 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
8. Switching Frequency  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, IOUT = 10 mA to 10 A,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
Frequency = 430 kHz  
Frequency = 630 kHz  
Condition : V5 = 5 V, VOUT Setting = 1.05 V, IOUT = 10 A, VIN = 4.5 V to 24 V,  
LO = 1 µH, CO = 88 µF (22 µF x 4)  
Frequency = 630 kHz  
Frequency = 430 kHz  
LX Average Frequency (MHz) Skip Mode (Freq=430kHz)  
LX Average Frequency (MHz) Skip Mode (Freq=630kHz)  
0.90  
0.80  
0.70  
0.60  
0.50  
0.40  
0.30  
0.60  
0.50  
0.40  
0.30  
0.20  
0.10  
0.00  
4
6
8
10  
12  
14  
16  
18  
20  
22  
24  
4
6
8
10  
12  
14  
16  
18  
20  
22  
24  
VIN(V)  
VIN(V)  
Page 35 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
TYPICAL CHARACTERISTICS CURVES (Continued)  
9. Thermal Performance  
Condition : VIN = 12 V, V5 = 5 V, VOUT Setting = 1.05 V, Switching Frequency = 430 kHz, Normal Mode,  
OUT = 10 A, LO = 1 µH, CO = 88 µF (22 µF x 4)  
I
Page 36 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
APPLICATIONS INFORMATION  
1. Evaluation Board Information  
Condition : VOUT Setting = 1.05 V, Switching Frequency = 430 kHz, Low Power Mode  
PVIN  
PVIN  
C-PVIN3  
VOUT  
C-PVIN2  
C-DCDCOUT3  
C-DCDCOUT4  
SS  
2 4  
2 3  
2 2  
2 1  
2 0  
1 9  
LX  
SS  
C-BST  
L-LX  
VOUT  
VOUT  
C-PVIN1  
LX  
SS  
VFB  
R-FB  
R-FB  
VOUT  
VFB  
V5  
C-V5  
C-V52  
EN  
FSEL  
C-DCDCOUT1  
C-DCDCOUT2  
V5  
7
8
9
10  
11  
12  
C-AVIN1  
AVIN  
C-AVIN2  
DCDCOUT  
PGND  
L-LX  
Figure : layout  
Figure : Application circuit  
Figure : Top Layer with silk screen  
(Top View) with Evaluation board  
Figure : Bottom Layer with silk screen  
(Bottom View) with Evaluation board  
Notes) This application circuit and layout is an example. The operation of mass production set is not guaranteed. You should perform  
enough evaluation and verification on the design of mass production set. You are fully responsible for the incorporation of the  
above application circuit and information in the design of your equipment.  
Page 37 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
APPLICATIONS INFORMATION (Continued)  
2. Layout Recommendations  
Board layout considerations are necessary for stable  
operation of the DC-DC regulator. The following  
precautions must be used when designing the board  
layout.  
(1)  
PVIN  
AVIN  
(a) The Input capacitor CIN must be placed in such a way  
that the distance between PVIN and PGND is  
minimum, in order to suppress the switching noise.  
Stray inductance and impedance should be reduced  
as indicated by loop (1) in the figure below.  
(b) A single point ground connection (2) must be used to  
connect PGND and AGND to improve operation  
stability.  
VOUT  
(3)  
BST  
RFB1  
LO  
IOUT  
VFB  
V5  
LX  
RFB2  
PGND  
AGND  
SS  
CIN  
CO  
(c) Output current line IOUT and the output sense line  
VOUT must have small common impedance to  
reduce output load variations. Output sense line  
VOUT must be close to the output condenser CO as  
indicated by (3) below.  
(d) Power Loss and output ripple voltage can be reduced  
by placing the inductor LO and output capacitor CO  
such that the stray inductance and the impedance of  
loop (4) is minimum. This is realized by :  
(4)  
(2)  
Figure : Application circuit diagram  
Note : The application circuit diagram and layout diagram  
explained in this section, should be used as reference  
examples. The operation of the mass production set is  
not guaranteed. Sufficient evaluation and verification is  
required in the design of the mass production set. The  
Customer is fully responsible for the incorporation of  
the above illustrated application circuit and the  
information attached with it, in the design of the  
equipment.  
i) Minimizing distance between inductor LO and LX  
pin.  
ii) Reducing distance between output capacitor CO  
and (2) / (3)  
(e) Thick lines in the application circuit example  
represent lines with large current flow. These lines  
should be designed as thick as possible.  
(f) VFB / SS / V5 lines should be placed far away  
from LX line, BST line and inductor LO to reduce the  
effects of switching noise. These lines should be  
designed as short as possible. This is especially true  
for the VFB line, which is a high impedance line.  
(g) RFB1 / RFB2 should also be placed as far away as  
possible from LX line, BST line and inductor LO to  
minimize the effects of switching noise. RFB1 / RFB2  
should be placed close to the VFB pin.  
(h) LX / BST lines are noisy lines. They should be  
designed as short as possible.  
Page 38 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
APPLICATIONS INFORMATION (Continued)  
3. Recommended component  
Reference Designator  
C-AVIN1  
QTY  
Value  
0.1 µF  
1 µF  
Manufacturer  
Murata  
Part Number  
Note  
1
1
1
GRM188R72A104KA35L  
GRM21BR71H105KA12L  
GRM188R72A104KA35L  
C-AVIN2  
Murata  
C-BST  
0.1 µF  
Murata  
C-DCDCOUT1  
C-DCDCOUT2  
C-DCDCOUT3  
C-DCDCOUT4  
4
22 µF  
Murata  
GRM31CR70J226KE19L  
C-PVIN1  
1
2
0.1 µF  
10 µF  
Murata  
GRM188R72A104KA35L  
UMK325AB7106MM-T  
TAIYO  
YUDEN  
C-PVIN2, 3  
C-SS  
C-V5  
1
1
1
3.3 nF  
0.1 µF  
4.7 µF  
Murata  
Murata  
Murata  
GRM188R72A332KA01L  
GRM188R72A104KA35L  
GRM21BR71A475KA73  
C-V52  
ALPS GREEN  
DEVICE  
L-LX  
1
1 µH  
GLMC1R003A  
R-FB1  
R-FB2  
R-RB3  
R-FB4  
R-PG  
1
1
1
1
1
0   
27 k  
36 k  
0   
Panasonic  
Panasonic  
Panasonic  
Panasonic  
Panasonic  
ERJ3GEY0R00V  
ERJ3EKF2702V  
ERJ3EKF3602V  
ERJ3GEY0R00V  
ERJ3EKF1003V  
100 k  
Page 39 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
APPLICATIONS INFORMATION (Continued)  
4. Special attention and precaution in using  
This IC is intended to be used for general electronic  
equipment. Ensure that the IC is used within the  
recommended safe operating region illustrated by the  
reference graph below. Do take note that thermal  
performance may varies with PCB design and PCB  
materials. You are encourage to use the graph only as  
a reference for your design and discuss further with  
our application engineer.  
It is to be understood that our company shall not be  
held responsible for any damage incurred as a result  
of application beyond the recommended safe  
operating region.  
PKG surface Temp (Ave) = 80 deg  
24  
22  
Vout=1.05V、fsw=430kHz  
Vout=1.05V、fsw=630kHz  
Vout=3.3V、fsw=430kHz  
Vout=3.3V、fsw=630kHz  
20  
18  
16  
14  
12  
10  
8
6
7
7.5  
8
8.5  
9
9.5  
10  
10.5  
11  
11.5  
12  
12.5  
IOUT(A)  
PKG surface Temp (Ave) = 90 deg  
24  
22  
20  
18  
16  
14  
12  
10  
8
Vout=1.05V、fsw=430kHz  
Vout=1.05V、fsw=630kHz  
Vout=3.3V、fsw=430kHz  
Vout=3.3V、fsw=630kHz  
6
7
7.5  
8
8.5  
9
9.5  
10  
10.5  
11  
11.5  
12  
12.5  
IOUT(A)  
Page 40 of 42  
Established : 2013-07-29  
Revised : 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
PACKAGE INFORMATION  
Outline Drawing  
Package Code : HQFN024-A3-0404DZF  
Unit : mm  
Body Material  
Lead Material  
: Br / Sb Free Epoxy Resin  
: Cu Alloy  
Lead Finish Method : Pd Plating  
Page 41 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Doc No. TA4-EA-06197  
Revision. 3  
NN30332A  
IMPORTANT NOTICE  
1. When using the IC for new models, verify the safety including the long-term reliability for each product.  
2. When the application system is designed by using this IC, please confirm the notes in this book.  
Please read the notes to descriptions and the usage notes in the book.  
3. This IC is intended to be used for general electronic equipment.  
Consult our sales staff in advance for information on the following applications: Special applications in which exceptional  
quality and reliability are required, or if the failure or malfunction of this IC may directly jeopardize life or harm the human body.  
Any applications other than the standard applications intended.  
(1) Space appliance (such as artificial satellite, and rocket)  
(2) Traffic control equipment (such as for automotive, airplane, train, and ship)  
(3) Medical equipment for life support  
(4) Submarine transponder  
(5) Control equipment for power plant  
(6) Disaster prevention and security device  
(7) Weapon  
(8) Others : Applications of which reliability equivalent to (1) to (7) is required  
Our company shall not be held responsible for any damage incurred as a result of or in connection with the IC being used for  
any special application, unless our company agrees to the use of such special application.  
However, for the IC which we designate as products for automotive use, it is possible to be used for automotive.  
4. This IC is neither designed nor intended for use in automotive applications or environments unless the IC is designated by our  
company to be used in automotive applications.  
Our company shall not be held responsible for any damage incurred by customers or any third party as a result of or in  
connection with the IC being used in automotive application, unless our company agrees to such application in this book.  
5. Please use this IC in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled  
substances, including without limitation, the EU RoHS Directive. Our company shall not be held responsible for any damage  
incurred as a result of our IC being used by our customers, not complying with the applicable laws and regulations.  
6. Pay attention to the direction of the IC. When mounting it in the wrong direction onto the PCB (printed-circuit-board),  
it might be damaged.  
7. Pay attention in the PCB (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins.  
In addition, refer to the Pin Description for the pin configuration.  
8. Perform visual inspection on the PCB before applying power, otherwise damage might happen due to problems such as  
solder-bridge between the pins of the IC. Also, perform full technical verification on the assembly quality, because the same  
damage possibly can happen due to conductive substances, such as solder ball, that adhere to the IC during transportation.  
9. Take notice in the use of this IC that it might be damaged when an abnormal state occurs such as output pin-VCC short  
(Power supply fault), output pin-GND short (Ground fault), or output-to-output-pin short (load short). Safety measures such as  
installation of fuses are recommended because the extent of the above-mentioned damage will depend on the current  
capability of the power supply.  
10. The protection circuit is for maintaining safety against abnormal operation. Therefore, the protection circuit should not work  
during normal operation.  
Especially for the thermal protection circuit, if the area of safe operation or the absolute maximum rating is momentarily  
exceeded due to output pin to VCC short (Power supply fault), or output pin to GND short (Ground fault), the IC might be  
damaged before the thermal protection circuit could operate.  
11. Unless specified in the product specifications, make sure that negative voltage or excessive voltage are not applied to the  
pins because the IC might be damaged, which could happen due to negative voltage or excessive voltage generated during  
the ON and OFF timing when the inductive load of a motor coil or actuator coils of optical pick-up is being driven.  
12. Product which has specified ASO (Area of Safe Operation) should be operated in ASO  
13. Verify the risks which might be caused by the malfunctions of external components.  
14. Connect the metallic plates (fins) on the back side of the IC with their respective potentials (AGND, PVIN, LX). The thermal  
resistance and the electrical characteristics are guaranteed only when the metallic plates (fins) are connected with their  
respective potentials.  
Page 42 of 42  
Established : 2013-07-29  
Revised  
: 2014-02-18  
Request for your special attention and precautions in using the technical information and  
semiconductors described in this book  
(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and  
regulations of the exporting country, especially, those with regard to security export control, must be observed.  
(2) The technical information described in this book is intended only to show the main characteristics and application circuit examples  
of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any  
other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any  
other company which may arise as a result of the use of technical information described in this book.  
(3) The products described in this book are intended to be used for general applications (such as office equipment, communications  
equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book.  
Consult our sales staff in advance for information on the following applications:  
Special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment,  
life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of  
the products may directly jeopardize life or harm the human body.  
It is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with  
your using the products described in this book for any special application, unless our company agrees to your using the products in  
this book for any special application.  
(4) The products and product specifications described in this book are subject to change without notice for modification and/or im-  
provement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product  
Standards in advance to make sure that the latest specifications satisfy your requirements.  
(5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions  
(operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute  
maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any  
defect which may arise later in your equipment.  
Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure  
mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire  
or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products.  
(6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS,  
thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which  
damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages.  
(7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company.  
20100202  

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