AN77L00/AN77L00M [PANASONIC]
Series 3-Pin Low Power Loss Voltage Regulator ; 系列3引脚低功耗稳压器\n
| 型号： | AN77L00/AN77L00M |
| 厂家： | 
PANASONIC |
| 描述： | Series 3-Pin Low Power Loss Voltage Regulator
|
| 文件： | 总8页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Voltage Regulators
AN77L00/AN77L00M Series
3-pin Low Power Loss Voltage Regulato r(100mA Type)
■ Overview
AN77L00 Series
Unit : mm
The AN77L00/AN77L00M series is a stabilized constant
5.0±0.2
4.0±0.2
voltage power supply with a low input/output voltage(0.3V
max.). It is suitable for the low-voltage equipment using
batteries, and consumer/industrial equipment with great
fluctuation of the supply voltage.
A wide range of output voltage is available from 3V
through 10V.
■ Features
0.45 +–00..21
• Minimum input/output voltage difference : 0.3V(max.)
2.54
2.3±0.2
• Built-in overcurrent limiting circuit
• Built-in rush current preventive circuit at saturation volt-
age rise time
2
3 1
• Built-in overheat protective circuit
• Built-in input short-circuit protective circuit
3-pin SIL Plastic Package (TO-92) (SSIP003-P-0000)
Unit : mm
AN77L00M Series
4.6max.
1.8max.
1.6max.
4.5
0.48max.
0.44max.
0.58max.
1.5
3.0
1
2
3
3-pin SIL Mini Power Type Plastic Package (TO-220F) (SSIP003-P-0000D)
1
Voltage Regulators
AN77L00/AN77L00M Series
■ Block Diagram
Input Short-Circuit
Protection
Over Current
Protection
Error Amp.
Rush Current
Protection
+
–
Thermal
Protection
3
2
1
OUT (2)
IN (1)
GND (3)
The pin numbers in
are for the AN77L00M series.
The pin numbers in ( ) are for the AN77L00 series.
■ Absolute Maximum Ratings (Ta=25˚C)
Parameter
Symbol
Rating
30
Unit
V
Supply voltage
Supply current
VIN
IIN
200
mA
mW
˚C
Note1)
Power dissipation
PD
650
Operating ambient temperature
Storage temperature
Topr
Tstg
–30 to + 85
–55 to + 150
˚C
Note 1)
■ Recommended Operating Range (Ta= 25˚C)
Part No.
Output voltage (VO)
Operating supply voltage range (VI)
VO + 0.3 to 13.62
Unit
V
AN77L03/M
3
3.5
4
AN77L035/M
AN77L04/M
AN77L045/M
AN77L05/M
AN77L06/M
AN77L07/M
AN77L08/M
AN77L09/M
AN77L10/M
AN77L12/M
VO + 0.41 to 14.14
VO + 0.3 to 14.66
V
V
4.5
5
VO + 0.43 to 15.18
VO + 0.3 to 15.7
V
V
V
6
VO + 0.46 to 16.74
VO + 0.48 to 17.78
VO + 0.51 to 18.82
VO + 0.53 to 19.86
VO + 0.55 to 20.9
V
7
V
8
V
9
V
10
12
V
VO + 0.6 to 22.98
2
Voltage Regulators
AN77L00/AN77L00M Series
■ Electrical Characteristics (Ta=25˚C)
• AN77L03/M (3V, 100mA Type)
Parameter
Output voltage
Symbol
Condition
min
typ
max
3.12
60
Unit
VO
REGIN
REGL
Ibias
Tj=25˚C
2.88
3
2
8
V
Input stability
VI=3.62 to 13.62V, Tj=25˚C
IO=0 to 100mA, Tj=25˚C
IO=0mA, Tj=25˚C
mV
mV
mA
mA
mA
dB
Load stability
60
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
0.9
3
1.5
5
∆Ibias
IO=0 to 100mA, Tj=25˚C
VI=2.7V, IO=0mA, Tj=25˚C
VI=3.62 to 5.62V, f=120Hz
VI=2.7V, IO=50mA, Tj=25˚C
VI=2.7V, IO=100mA, Tj=25˚C
f=10Hz to 100kHz
Irush
1.5
70
5
RR
60
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min) 1
VDIF (min) 2
Vno
0.12
0.22
70
0.25
0.3
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj= –30 to+125˚C
0.2
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=4V, IO=50mA, CO=10µF unless otherwise specified.
•
AN77L035/M (3.5V, 100mA Type)
Parameter
Symbol
VO
Condition
min
typ
3.5
max
3.64
60
Unit
Output voltage
Tj=25˚C
3.36
V
Input stability
REGIN
REGL
Ibias
VI= 4.14 to 14.14V, Tj=25˚C
IO= 0 to 100mA, Tj= 25˚C
IO= 0mA, Tj= 25˚C
3
9
mV
mV
mA
mA
mA
dB
Load stability
60
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
0.9
3
1.5
5
∆Ibias
IO= 0 to 100mA, Tj= 25˚C
VI= 3.15V, IO= 0mA, Tj=25˚C
VI= 4.14 to 6.14V, f=120Hz
VI= 3.15V, IO= 50mA, Tj= 25˚C
VI= 3.15V, IO=100mA, Tj= 25˚C
f=10Hz to 100kHz
Irush
1.5
69
5
RR
59
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min) 1
VDIF (min) 2
Vno
0.12
0.22
75
0.25
0.41
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj= –30 to+125˚C
0.23
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=4.5V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L04/M (4V, 100mA Type)
Parameter
Output voltage
Symbol
VO
Condition
min
typ
max
4.16
60
Unit
Tj=25˚C
3.84
4
3
9
V
Input stability
REGIN
REGL
Ibias
VI= 4.66 to 14.66V, Tj= 25˚C
IO= 0 to 100mA, Tj= 25˚C
IO= 0mA, Tj= 25˚C
mV
mV
mA
mA
mA
dB
Load stability
60
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
0.9
3
1.5
5
∆Ibias
IO= 0 to 100mA, Tj=25˚C
VI=3.6V, IO= 0mA, Tj= 25˚C
VI= 4.66 to 6.66V, f=120Hz
VI=3.6V, IO=50mA, Tj= 25˚C
VI=3.6V, IO=100mA, Tj= 25˚C
f=10Hz to 100kHz
Irush
1.5
69
5
RR
59
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min) 1
VDIF (min) 2
Vno
0.12
0.23
80
0.25
0.3
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj= –30 to+125˚C
0.26
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=5V, IO=50mA, CO=10µF unless otherwise specified.
3
Voltage Regulators
AN77L00/AN77L00M Series
■ Electrical Characteristics (Ta=25˚C)
• AN77L045/M (4.5V, 100mA Type)
Parameter
Output voltage
Symbol
Condition
min
typ
4.5
max
4.68
60
Unit
VO
REGIN
REGL
Ibias
Tj=25˚C
4.32
V
Input stability
VI=5.18 to 15.18V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
IO= 0mA, Tj=25˚C
3
10
mV
mV
mA
mA
mA
dB
Load stability
60
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
0.9
3
1.5
5
∆Ibias
IO= 0 to 100mA, Tj=25˚C
VI= 4.05V, IO= 0mA, Tj=25˚C
VI=7.18 to 6.18V, f=120Hz
VI= 4.05V, IO=50mA, Tj=25˚C
VI= 4.05V, IO=100mA, Tj=25˚C
f=10Hz to 100kHz
Irush
1.5
68
5
RR
58
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min) 1
VDIF (min) 2
Vno
0.12
0.23
85
0.25
0.43
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj= –30 to+125˚C
0.3
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=5.5V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L05/M (5V, 100mA Type)
Parameter
Output voltage
Symbol
VO
Condition
min
4.8
typ
max
5.2
Unit
Tj=25˚C
5
4
V
Input stability
REGIN
REGL
Ibias
VI=5.7 to 15.7V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
IO= 0mA, Tj=25˚C
60
60
1.5
5
mV
mV
mA
mA
mA
dB
Load stability
10
0.9
3
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
∆Ibias
IO= 0 to 100mA, Tj=25˚C
VI= 4.5V, IO= 0mA, Tj=25˚C
VI= 5.7 to 7.7V, f=120Hz
VI= 4.5V, IO= 50mA, Tj=25˚C
VI= 4.5V, IO= 100mA, Tj=25˚C
f=10Hz to 100kHz
Irush
1.5
68
5
RR
58
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min) 1
VDIF (min) 2
Vno
0.12
0.24
90
0.25
0.3
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj= –30 to+125˚C
0.33
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=6V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L06/M (6V, 100mA Type)
Parameter
Output voltage
Symbol
VO
Condition
min
typ
max
6.24
60
Unit
Tj=25˚C
5.76
6
4
V
Input stability
REGIN
REGL
Ibias
VI= 6.74 to 16.74V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
IO= 0mA, Tj=25˚C
mV
mV
mA
mA
mA
dB
Load stability
11
0.9
3
60
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
1.5
5
∆Ibias
IO= 0 to 100mA, Tj=25˚C
VI= 5.4V, IO= 0mA, Tj=25˚C
VI= 6.74 to 8.74V, f=120Hz
VI=5.4V, IO=50mA, Tj=25˚C
VI=5.4V, IO=100mA, Tj=25˚C
f=10Hz to 100kHz
Irush
1.5
66
5
RR
56
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min) 1
VDIF (min) 2
Vno
0.12
0.25
105
0.4
0.25
0.46
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj= –30 to+125˚C
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=7V, IO=50mA, CO=10µF unless otherwise specified.
4
Voltage Regulators
AN77L00/AN77L00M Series
■ Electrical Characteristics (Ta=25˚C)
• AN77L07/M (7V, 100mA Type)
Parameter
Output voltage
Symbol
Condition
min
typ
7.0
max
7.28
70
Unit
VO
REGIN
REGL
Ibias
Tj=25˚C
6.72
V
Input stability
VI=7.78 to 17.78V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
IO= 0mA, Tj=25˚C
5
11
mV
mV
mA
mA
mA
dB
Load stability
70
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
1.1
3
1.6
5
∆Ibias
IO= 0 to 100mA, Tj=25˚C
VI= 6.3V, IO= 0mA, Tj=25˚C
VI=7.78 to 9.78V, f=120Hz
VI= 6.3V, IO= 50mA, Tj=25˚C
VI= 6.3V, IO=100mA, Tj=25˚C
f=10Hz to 100kHz
Irush
1.5
65
5
RR
55
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min)1
VDIF (min) 2
Vno
0.12
0.26
120
0.46
0.25
0.48
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj= –30 to+125˚C
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI= 8V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L08/M (8V, 100mA Type)
Parameter
Output voltage
Symbol
VO
Condition
min
typ
max
8.32
80
Unit
Tj=25˚C
7.68
8
5
V
Input stability
REGIN
REGL
Ibias
VI= 8.82 to 18.82V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
IO= 0mA, Tj=25˚C
mV
mV
mA
mA
mA
dB
Load stability
12
1.1
80
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
1.6
5
∆Ibias
IO= 0 to 100mA, Tj=25˚C
VI=7.2V, IO= 0mA, Tj=25˚C
VI= 8.82 to 10.82V, f=120Hz
VI=7.2V, IO=50mA, Tj= 25˚C
VI=7.2V, IO=100mA, Tj= 25˚C
f=10Hz to 100kHz
3
Irush
1.5
5
RR
53
63
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min)1
VDIF (min) 2
Vno
0.12
0.27
135
0.53
0.25
0.51
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj= –30 to +125˚C
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=9V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L09/M (9V, 100mA Type)
Parameter
Output voltage
Symbol
VO
Condition
min
typ
max
9.36
90
Unit
Tj=25˚C
8.64
9
6
V
Input stability
REGIN
REGL
Ibias
VI=9.86 to 19.86V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
IO= 0mA, Tj=25˚C
mV
mV
mA
mA
mA
dB
Load stability
13
1.2
3
90
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
1.7
5
∆Ibias
IO= 0 to 100mA, Tj=25˚C
VI=8.1V, IO= 0mA, Tj=25˚C
VI=9.86 to 11.86V, f=120Hz
VI=8.1V, IO= 50mA, Tj=25˚C
VI=8.1V, IO=100mA, Tj=25˚C
f=10Hz to 100kHz
Irush
1.5
62
5
RR
52
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min) 1
VDIF (min) 2
Vno
0.13
0.28
150
0.6
0.25
0.53
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj=–30 to+125˚C
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=10V, IO=50mA, CO=10µF unless otherwise specified.
5
Voltage Regulators
AN77L00/AN77L00M Series
■ Electrical Characteristics (Ta=25˚C)
• AN77L10/M (10V, 100mA Type)
Parameter
Output voltage
Symbol
Condition
min
9.6
typ
10
max
10.4
100
100
1.7
5
Unit
VO
REGIN
REGL
Ibias
Tj=25˚C
V
Input stability
VI=10.9 to 20.9V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
IO= 0mA, Tj=25˚C
7
14
mV
mV
mA
mA
mA
dB
Load stability
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
1.2
3
∆Ibias
IO= 0 to 100mA, Tj=25˚C
VI= 9.0V, IO=0mA, Tj=25˚C
VI=10.9 to 12.9V, f=120Hz
VI= 9.0V, IO=50mA, Tj=25˚C
VI= 9.0V, IO=100mA, Tj=25˚C
f=10Hz to 100kHz
Irush
1.5
60
5
RR
50
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min) 1
VDIF (min) 2
Vno
0.13
0.29
165
0.67
0.25
0.55
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj= –30 to+125˚C
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms) and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=11V, IO=50mA, CO=10µF unless otherwise specified.
• AN77L12/M (12V, 100mA Type)
Parameter
Output voltage
Symbol
VO
Condition
min
typ
12
max
12.48
120
120
1.9
5
Unit
Tj=25˚C
11.52
V
Input stability
REGIN
REGL
Ibias
VI=12.98 to 22.98V, Tj=25˚C
IO= 0 to 100mA, Tj=25˚C
IO= 0mA, Tj=25˚C
8
15
mV
mV
mA
mA
mA
dB
Load stability
Bias current under no load
Bias current fluctuation under load
Bias current before regulation start
Ripple rejection ratio
1.4
3
∆Ibias
IO= 0 to 100mA, Tj=25˚C
VI=10.8V, IO=0mA, Tj=25˚C
VI=12.98 to 14.98V, f=120Hz
VI=10.8V, IO=50mA, Tj=25˚C
VI=10.8V, IO=100mA, Tj=25˚C
f=10Hz to 100kHz
Irush
1.5
58
5
RR
48
Min. input/output voltage difference (1)
Min. input/output voltage difference (2)
Output noise voltage
VDIF (min) 1
VDIF (min) 2
Vno
0.13
0.31
190
0.8
0.25
0.6
V
V
µV
Output voltage temperature coefficient
∆VO/Ta
Tj=–30 to+125˚C
mV/˚C
Note 1) Under Tj=25˚C, each test duration can be set short (within 10ms)and the characteristic drift with temperature rise at
joints of the chip may be ignored.
Note 2) VI=13V, IO=50mA, CO=10µF unless otherwise specified.
■ Application Circuit
VI
VO
AN77L00/M
series
+
–
0.33µF
10µF
• For the AN77L00/M series, the gain inside the IC is set high to improve the performance. For the reason, use
the capacitor of 10µF or more when the power line in the output side should be long.
In addition, install the capacitor in the output side as near as possible to the IC.
6
Voltage Regulators
AN77L00/AN77L00M Series
■ Characteristics Curve
Input/Output Characteristics
VO —VI
Input Stability
VO —VI
Rush Current (Under No Load)
II —VI
3
AN77L03/M
IO=50mA
AN77L03/M
IO=50mA
AN77L03/M
IO= 0A
5
3.02
3.01
3.00
2.99
2
1
0
4
3
2
1
0
2.98
0
0
1
2
3
4
5
0
10
20
30
0
1
2
3
4
5
Input Voltage VI (V)
Input Voltage VI (V)
Input Voltage VI (V)
Bias Current
Ibias — IO
Load Stability
VO —IO
Over-current Limiting Characteristics
VO —IO
AN77L03/M
VI=4V
AN77L03/M
VI=4V
AN77L03/M
VI=4V
IO(short)=200mA
(typ)
5
5
3.02
3.01
3.00
2.99
4
3
4
3
2
2
1
0
2.98
0
1
0
1
50
100
0
50
100
0
100
200
300
Output Current IO (mA)
Output Current IO (mA)
Output Voltage IO (mA)
Minimum Input/Output Voltage Difference Ripple Rejection Ratio Output Voltage Temperature Characteristics
VDIF (min) — IOUT
RR — f
VO — Ta
100
0.5
0.4
0.3
0.2
0.1
0
AN77L03/M
VI= 4V
IO= 0mA
AN77L03/M
IO=50mA
AN77L03/M
VI=2.88V
3.10
3.00
2.90
80
60
40
20
0
0
50
100
10
100
1k
10k
100k
–25
0
25
50
75
Ambient Temperature Ta (˚C)
Output Voltage IO (mA)
Frequency f (Hz)
7
Voltage Regulators
AN77L00/AN77L00M Series
AN77L00 series
AN77L00M Series
[Power Dissipation (TO-92 Package)]
PD —Ta
[Power Dissipation (TO-243 Package)]
PD —Ta
1.0
0.5
0
1.0
Single Unit
Rthj – a=190˚C/W
PD=658mW (25˚C)
0.5
0
0
25
50
75 85 100 125 150
0
25
50
75 85 100 125 150
Ambient Temperature Ta (˚C)
Ambient Temperature Ta (˚C)
Note) SM to printed board (glass epoxy board of 20 × 20 × 1.7mm with copper film of 1cm2 or more)
■ Precautions on Use
1. Input Short-Circuit Protection Circuit
Not required
For the conventional Matsushita 3-pin regulators (such as
of the AN8000 series), when DC input pin3 is short-
circuited with GND w in the normal operation condition,
the potential of output pinq becomes higher than that of
DC input pin and the electric charges which is charged in
output capacitor CO flows in the input side, resulting in the
breakage of elements.
(2)
VI
3
1
VO
(1)
+
–
(3)
In the above case, the common silicon diode is connected
as shown in the right figure (the dotted line). However, for
the AN77L00/M series, since the protection circuit, which
protects the elements from the discharging current, is
incorporated in the internal circuit, the protection diode is
not required.
2
CI
0.33µF
CO
10µF
Pin number in
is for the AN77L00M series.
Pin number in ( ) is for the AN77L00 series.
50
40
30
20
10
0
2. Capacitor for External Compensation
In order to secure the safety, the capacitor of 10 µF is
required in the output side and it should be added as near
as possible to output pin1 and GND 2. When it is used
under low temperature, oscillation may occur due to the
decrease of the aluminum electrolytic capacitor and
increase of ESR.
Recommended Range
For the AN77L00/M, it is recommended that the tantalum
capacitor or aluminum electrolytic capacitor whose serial-
connected resistance equivalent with that of output
capacitor CO has temperature characteristics within the
recommended range specified in the right.
20
40
60
80
100
Output Current IO (mA)
8
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