AN26260A [PANASONIC]
RF and Baseband Circuit, BICMOS, WLCSP-54;
| 型号： | AN26260A |
| 厂家： | 
PANASONIC |
| 描述： | RF and Baseband Circuit, BICMOS, WLCSP-54 电信 信息通信管理 电信集成电路 |
| 文件： | 总10页 (文件大小：274K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
Part N.
AN26260A
Package Code No.
ULGA054-W-5234
Publication date: January 2006
SDM00011AEB
1
AN26260A
Contents
Overview …………………………………………………………………………………………………………….
Features …………………………………………………………………………………………………………….
Applications …………………………………………………………………………………………………………
Package ………………………………………………………………………………………………………….
Type …………………………………….………………………………………………………………………….
Application Circuit Example ……………………………………………………………………………………….
Test Circuit Diagram ……………………………………………………………………………………….
Pin Out ……………….…………………………………………………………………………………….
Pin Descriptions ………………………………………………………………………………………………….
Absolute Maximum Ratings ………………………………………………………………………………….
Operating Supply Voltage Range …………….…………………………………………………………………
3
3
3
3
3
4
5
6
7
9
9
SDM00011AEB
2
AN26260A
AN26260A
Receive RF IC for WCDMA (Dual Band)
Overview
y AN26260A is WCDMA receive RFIC that is planned to use for dual band WCDMA in Japan.
AN26260A is consisted of RF amplifiers (i.e. LNA2), direct conversion ulators, VCOs, synthesizer and baseband path.
There is able to build the WCDMA receive RF block with external LNA RF-ilter.
y This IC is expecting to use with the WCDMA transmit RFIC ;AN26261A.
Features
y Direct conversion receive RFIC for dual band WCDMA ith the n-chip VCOs.
y Receive frequencies : 2 110 MHz to 2 170 MHz, 875 MHz to 900 MHz.
y Current consumption : 29.9 mA(typ.)-2 GHz mod, 28.A(typ.)-800 MHz mo.
Applications
y WCDMA single, dual band terminals.
Package
y Wafer level chip size package (WLCP).
Size : 3.37 × 5.17 × 0.8 mm
Type
y SiGe monolithic Bi-CMOS IC.
SDM00011AEB
3
AN26260A
Application Circuit Example
I_OUT_P
I_OUT_N
IN_H_P
Q_OUT_P
Q_OUT_N
Dual Band Rx RFIC
SAW
LNA
AN26260A
AN26210A
REF_CLK
RESET
IN_P
IN_L_N
LD_OUT
Duplexer
W
BAND
26 MHz
TCXO
Duplexer
SW
I_IN_P
T_H_P
I_IN_N
Bn
Q_IN_P
Q_IN_N
Dual Band Tx RFIC
OUT_N
AN26261A
REF_CLK
RESET
OUT_L_P
Balun
LD_OUT
BAND
SAW
OUT_L_N
PA
iver
SDM00011AEB
4
AN26260A
Test Circuit Diagram (Top View)
2 pF
F10
FE_sub
F9
IN_H_N
F8
IN_H_P
F7
_N
F6
IN_L_P
F5
SDEN
F4
G_SD
I_OUT_N
F1
N.C.
82 µH
BB_VCC
E10
E8
E6
E5
E2
E1
FE_GND
ub
FE_sub
SC
DC_CO
N.C.
G_SCLK
I_OUT_P
82 µH
33nH
FEVCC
LOVCC
D10
FE_GND
D9
CC
D8
EM_GND
D7
FE_VC
D6
FE_ND
D
SDAT
DL_CONT
D3
G_SDATA
D2
BB_sub
D1
BB_VCC
0.01 µF
I_OUT_N
I_OUT_P
Q_OUT_P
Q_OUT_N
0.01 µF
0.01 µF
0.01 µF
10
_VCC
C9
LO_VCC
C8
LO_GND
C7
LO_D
LO_su
C5
.
C4
LD_OUT
C3
RESET
C2
BB_GND
C1
Q_OUT_P
B9
B8
B7
B6
B5
B4
B
B2
VCO_FIL
VCO_su
N.C.
CMOS_sub
N.C.
_VCC
ND
N.C.
82 µH
CMOSVCC
A10
A9
A
A6
A
A4
A2
A1
CMOS_GND
CMOS_VC
REF_VCC
REF_GND
PLL_FIL
PD_GND
Q_ON
BB_sub
RESET
1000
REFCLK
REFVCC
82 µH
BAND_OUT
LD_OUT
PD_VCC
SDM00011AEB
5
AN26260A
Pin Out
The figure below shows pin layout is ‘ top view ’.
Top view
F10
FE_sub
F9
IN_H_N
F8
IN_H_P
F7
IN_L_N
F6
IN_L_
F5
SDEN
F4
G_SD
F2
I_OUT_N
F1
N.C.
E10
FE_GND
E8
FE_GND
6
E5
SCLK
E4
DCCONT
E3
N.C.
E2
G_SCLK
E1
I_OUT_P
D10
FE_GND
D9
FE_VCC
D8
DEM_GN
D
FE_VCC
D6
FE_GND
D5
SDATA
D4
DL_COT
D3
G_SDATA
D2
BB_sub
D1
BB_VCC
C10
LO_VCC
C9
LO_VCC
C8
LO_GD
C7
LO_GND
C6
LO_sub
C5
N.C.
C4
LD_OUT
C3
RESET
C2
BB_GND
C1
Q_OUT_P
VL
B8
VCO_sub
B7
NC.
B6
CMOS_sub
B5
N.C.
B4
PD_VCC
B3
BAND
B2
NC.
A10
A8
RE_CLK
A7
REF_VCC
A6
REF_GND
A5
PLL_IL
A4
PD_GND
A2
Q_OUT_N
A1
BB_sub
CMOS_ND
SDM00011AEB
6
AN26260A
Pin Descriptions
Pin No.
A1
Pin name
BB_sub
Type
Ground
Out
Description
Baseband substrate
Q channel baseband negative outpu
No pin
A2
Q_OUT_N
—
A3
—
A4
PD_GND
PLL_FIL
REF_GND
REF_VCC
REF_CLK
CMOS_VCC
Ground
InOut
Ground
Supply
In
Phase detector ground
PLL loop filter
A5
A6
Reference clock amplifer groud
Reference clock ampliier supply
Reference clock iput
CMOS ogic ly
CMOS logund
No pin
A7
A8
A9
Supply
Ground
—
A10 CMOS_GND
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
C1
C2
C3
C4
C5
C6
C7
C8
C9
—
N.C.
—
No connection or round
Band selector otput
Phase deector supply
No connetion or ground
gic substrate
No ection or ground
VCO substrate
BAND
Out
PD_VCC
N.C.
Supply
—
CMOS_sub
C.
Ground
—
VCO_sub
VCO_FIL
—
Groun
InOut
—
VCO ripple filter
No pin
Q_OU
BB_GND
RESET
LD_OUT
N.C.
Out
Q channel baseband positive output
Baseband ground
Ground
In
Reset signal input
Out
Synthesizer lock detector output
No connection or ground
Local substrate
—
LO_sub
LO_GND
LO_GND
LO_VCC
Ground
Ground
Ground
Supply
Supply
Local ground
Local ground
Local supply
C10 LO_VCC
Local supply
SDM00011AEB
7
AN26260A
Pin Descriptions (continued)
Pin No.
D1
Pin name
BB_VCC
Type
Supply
Ground
In
Description
Baseband supply
D2
BB_sub
Baseband substrate
D3
G_SDATA
DL_CONT
SDATA
Serial data input for gain control
synthesizer double latch swit
Serial data input
D4
In
D5
In
D6
FE_GND
FE_VCC
DEM_GND
FE_VCC
Ground
Supply
Ground
Supply
Ground
Out
Front-end ground
D7
Front-end suppy
D8
Demodulator grond
Front-ed su
D9
D10 FE_GND
Front-nd gd
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
I_OUT_P
G_SCLK
N.C.
I hannel baseband poitive utput
Serial clock input or gain control
No connection or groud
DC offst remval deector output
Serial clok input
In
—
DC_CONT
SCLK
Out
In
FE_sub
Ground
—
substrate
No
FE_GND
—
Groun
—
Frnt-end Ground
No pin
FE_GND
N.C.
Ground
—
Front-end Ground
No connection or ground
I channel baseband negative output
No pin
I_OUT_N
—
Out
—
G_SDEN
SDEN
In
Serial enable input for gain control
Serial enable
In
IN_L_P
IN_L_N
IN_H_P
IN_H_N
FE_sub
In
800 MHz band positive input
800 MHz band negative input
2 GHz band positive input
2 GHz band negative input
Front-end substrate
In
In
In
Ground
SDM00011AEB
8
AN26260A
Absolute Maximum Ratings
A
Parameter
No.
Symbol
Rating
Unit
Notes
1
Supply voltage
VCC
0 to 3.6
V
*1
2
3
4
5
6
Supply current
ICC
PD
40
69.3
mA
mW
°C
*2
Power dissipation
Operating ambient temperature
Storage temperature
DC input voltage
Topr
Tstg
VI
–5 to +85
*3
–55 to +1
°C
*3
0 to VCC + 0.3 an3.6
V
*1, *4
Notes)*1 :The supply voltage is shown the value under the condition wich not exceeds the amaximum ratings and the power dissipation.
*2 : The power dissipation is shown the value at Ta = 5°C fhe inependent (non-moted) IC package without a heat sink.
In case of use this IC, please refer to the PD-Tdiagrae package standard and use under the condition not exceeding the allowable value.
*3 : Except for the power dissipation, operating ambint terature, and storae tempeaure, all ratings are for Ta = 25°C.
*4 : Tolerable input voltages of logical input SCLK, SDTA, SDEN, G-SCK, GSDTA, G-SDEN, RESET, DL-CONT pins
Operating supply volage range
Parameer
Supply vage rnge
mbol
Range
Unit
Notes
VCC
2.7 to 3.0
V
SDM00011AEB
9
Request for your special attention and precautions in using the technical information and
semiconductors described in this book
(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and
regulations of the exporting country, especially, those with regard to security export control, must be observed.
(2) The technical information described in this book is intended only to show the main characteristics and application circuit examples
of the products, and no license is granted under any intellectual property right or other right owned by our company or any other
company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other
company which may arise as a result of the use of technical information described in this book.
(3) The products described in this book are intended to be used for standard applications or general electronic equipment (such as office
equipment, communications equipment, measuring instruments and household appliances).
Consult our sales staff in advance for information on the following applications:
– Special applications (such as for airplanes, aerospace, automobiles, traffic contrl equipment, combustion equipment, life support
systems and safety devices) in which exceptional quality and reliability equired, or if the failure or malfunction of the prod-
ucts may directly jeopardize life or harm the human body.
– Any applications other than the standard applications intended.
(4) The products and product specifications described in this book re subjet to change wnotice for modification and/or im-
provement. At the final stage of your design, purchasingouse f the roducts, therfor the most up-to-date Product
Standards in advance to make sure that the latest specifictions saisfy your requirements.
(5) When designing your equipment, comply with the rnge f absolute maximuing nd the guaranteed operating conditions
(operating power supply voltage and operating nvirnt etc.). Especiallyplee be creful not to exceed the range of absolute
maximum rating on the transient state, such as powpower-off and mode-witching. Otherwise, we will not be liable for any
defect which may arise later in your equpment
Even when the products are used withthe guarnteed values, ake nto te cosideration of incidence of break down and failure
mode, possible to occur to semicuctor roducts. Mesures the syems such as redundant design, arresting the spread of fire
or preventing glitch are recomin ordeto prevent pysicainjury, fire, social damages, for example, by using the products.
(6) Comply with the instructionfor ue in rder to prevent reakdown and characteristics change due to external factors (ESD, EOS,
thermal stress and mcanical stress) at the time of handlin, mounting or at customer's process. When using products for which
damp-proof packinis reqred, satisfy the condions, suh as shelf life and the elapsed time since first opening the packages.
(7) This book may e noreprinted or repwhther wholly or partially, without the prior written permission of Matsushita
Electric ndurial Co., Ltd.
相关型号：
©2020 ICPDF网 联系我们和版权申明