2SK3585G [PANASONIC]
Small Signal Field-Effect Transistor, 0.00046A I(D), 1-Element, N-Channel, Silicon, Junction FET, ROHS COMPLIANT, SSSMINI3-F2, 3 PIN;型号: | 2SK3585G |
厂家: | PANASONIC |
描述: | Small Signal Field-Effect Transistor, 0.00046A I(D), 1-Element, N-Channel, Silicon, Junction FET, ROHS COMPLIANT, SSSMINI3-F2, 3 PIN 开关 光电二极管 晶体管 |
文件: | 总3页 (文件大小:263K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
This product complies with the RoHS Directive (EU 2002/95/EC).
Silicon Junction FETs (Small Signal)
2SK3585G
Silicon N-channel junction FET
For impedance conversion in low frequency
For electret capacitor microphone
Package
Features
ꢀCode
High mutual conductance gm
Low noise voltage NV
SSSMini3-F2
ꢀPin Name
1: rain
Absolute Maximum Ratings Ta = 25°C
ce
Parameter
Symbol
VDSO
VDGO
IDSO
Rating
Unit
V
Drain-source voltage (Gate open)
Drain-gate voltage (Souece open)
Drain-source current (Gate open)
Drain-gate current (Souece open)
Gate-source cut-off current (Drain open)
Power dissipation
20
2
V
Marking Symbol: 5K
mA
mA
mA
mW
°C
IDO
IGSO
2
PD
100
Operating ambient temperature
Storage temperature
Tor
–20 to +0
–55 to +125
T
stg
°C
Electrical Characteristics Ta = 25°C±
Paam
Sym
ID
Conditions
Min
100
107
660
Typ
Max
460
470
Unit
mA
mA
mS
1
Drain currnt
VDS = 2.0 V, Rd = 2.2 kW ± 1%
VDS = 2.0 V, Rd = 2.2 kW ± 1%, VGS = 0
VD = 2.0 V, VGS = 0, f = 1 kHz
Din-source curret
Mutul conduance
IDSS
gm
1600
VD = 2.0 V, Rd = 2.2 kW ± 1%
CO = 5 pF, A-curve
Noise voltage
Voltage gain
NV
GV1
GV2
GV3
4
mV
VD = 2.0 V, Rd = 2.2 kW ± 1%
CO = 5 pF, eG = 10 mV, f = 1 kHz
–7.5
–4.0
–8.0
–4.7
–1.5
–5.0
VD = 12 V, Rd = 2.2 kW ± 1%
CO = 5 pF, eG = 10 mV, f = 1 kHz
dB
VD = 1.5 V, Rd = 2.2 kW ± 1%
CO = 5 pF, eG = 10 mV, f = 1 kHz
VD = 2.0 V, Rd = 2.2 kW ± 1%
CO = 5 pF, eG = 10 mV
f = 1 kHz to 70 Hz
2
DGV . f *
0
1.7
0
0
8
4.0
1.7
15
GV2 – GV1
GV1 – GV3
Rg
Voltage gain difference
Gate resistance
dB
VGS = 0.05 V
GW
Note) 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 measuring methods for transistors.
2. A protection diode is built-in between gate and source of transistor. However if forward current flows between gate and source transistor
might be damaged. So please be careful not insert reverse.
3. *1: ID is assured for IDSS
.
2: D|GV . f | is assured for AQL 0.065. (The measurement method is used by source-grounded circuit.)
*
Publication date: October 2008
SJF00109AED
1
This product complies with the RoHS Directive (EU 2002/95/EC).
2SK3585G
SSSMini3-F2
Unit: mm
1.20 ±0.05
0.30 +−00..0025
3
2
1
0.13 +−00..0025
0.20 +−00..0025
(0.4)
(
080 ±0.05
2
SJF00109AED
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2008080
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