SZESD7951ST5G [ONSEMI]
ESD Protection Diode, Low Leakage, Fast Response Time, with Clamping Capability;
| 型号： | SZESD7951ST5G |
| 厂家： | 
ONSEMI |
| 描述： | ESD Protection Diode, Low Leakage, Fast Response Time, with Clamping Capability 二极管 瞬态抑制器 |
| 文件： | 总4页 (文件大小：112K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ESD7951ST5G
Transient Voltage
Suppressors
ESD Protection Diodes with Ultra−Low
Capacitance
http://onsemi.com
The ESD7951 is designed to protect voltage sensitive components that
require ultra−low capacitance from ESD and transient voltage events.
Excellent clamping capability, low capacitance, low leakage, and fast
response time, make these parts ideal for ESD protection on designs
where board space is at a premium. Because of its low capacitance, it is
suited for use in high frequency designs such as USB 2.0 high speed and
antenna line applications.
1
2
PIN 1. CATHODE
2. ANODE
Specification Features:
2
• Ultra Low Capacitance 0.5 pF
• Low Clamping Voltage
1
SOD−923
CASE 514AB
• Small Body Outline Dimensions:
0.039″ x 0.024″ (1.00 mm x 0.60 mm)
• Low Body Height: 0.016″ (0.4 mm)
• Stand−off Voltage: 5 V
• Low Leakage
MARKING DIAGRAM
• Response Time is Typically < 1.0 ns
• IEC61000−4−2 Level 4 ESD Protection
• This is a Pb−Free Device
AA M
1
2
Mechanical Characteristics:
CASE: Void-free, transfer-molded, thermosetting plastic
Epoxy Meets UL 94 V−0
AA
M
= Specific Device Code
= Date Code
LEAD FINISH: 100% Matte Sn (Tin)
MOUNTING POSITION: Any
QUALIFIED MAX REFLOW TEMPERATURE: 260°C
Device Meets MSL 1 Requirements
ORDERING INFORMATION
†
Device
ESD7951ST5G
Package
Shipping
MAXIMUM RATINGS
SOD−923
(Pb−Free)
8000/Tape & Reel
Rating
Symbol
Value
Unit
IEC 61000−4−2 (ESD)
Contact
Air
8
15
kV
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Total Power Dissipation on FR−5 Board
°P °
D
150
mW
(Note 1) @ T = 25°C
A
Storage Temperature Range
Junction Temperature Range
T
−55 to +150
−55 to +125
260
°C
°C
°C
stg
DEVICE MARKING INFORMATION
See specific marking information in the device marking
column of the Electrical Characteristics tables starting on
page 2 of this data sheet.
T
J
Lead Solder Temperature − Maximum
(10 Second Duration)
T
L
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
See Application Note AND8308/D for further description of survivability specs.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
January, 2011 − Rev. 1
ESD7951S/D
ESD7951ST5G
ELECTRICAL CHARACTERISTICS
(T = 25°C unless otherwise noted)
A
Symbol
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
I
I
PP
I
PP
V
C
PP
V
RWM
Working Peak Reverse Voltage
I
T
I
R
Maximum Reverse Leakage Current @ V
RWM
I
V
R
BR RWM
V
C
V
V
V
Breakdown Voltage @ I
I
V
V
V
BR
T
R
T
RWM BR C
I
I
Test Current
T
I
F
Forward Current
I
PP
V
F
Forward Voltage @ I
F
P
pk
Peak Power Dissipation
Bi−Directional TVS
C
Capacitance @ V = 0 and f = 1.0 MHz
R
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)
A
V
(V)
C
V
RWM
I
R
(mA)
V (V) @ I
BR T
@ I = 1 A
PP
(V)
@ V
(Note 2)
(Note 3)
I
T
C (pF)
V
C
RWM
Per IEC61000−4−2
Device
Marking
(Note 4)
Max
Max
1.0
Min
mA
Typ
0.5
Max
Max
Device
ESD7951ST5G
AA
5.0
5.4
1.0
0.9
12.9
Figures 1 and 2
See Below
2. V is measured with a pulse test current I at an ambient temperature of 25°C.
BR
T
3. Surge current waveform per Figure 5.
4. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 1. ESD Clamping Voltage Screenshot
Figure 2. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Negative 8 kV Contact per IEC61000−4−2
http://onsemi.com
2
ESD7951ST5G
IEC61000−4−2 Waveform
IEC 61000−4−2 Spec.
I
peak
Test
Voltage
(kV)
First Peak
Current
(A)
100%
90%
Current at
30 ns (A)
Current at
60 ns (A)
Level
1
2
3
4
2
4
6
8
7.5
15
4
8
2
4
6
8
I @ 30 ns
22.5
30
12
16
I @ 60 ns
10%
t
P
= 0.7 ns to 1 ns
Figure 3. IEC61000−4−2 Spec
Oscilloscope
ESD Gun
TVS
50 W
Cable
50 W
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
100
t
r
PEAK VALUE I
@ 8 ms
RSM
90
80
70
60
50
40
30
20
PULSE WIDTH (t ) IS DEFINED
P
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
HALF VALUE I /2 @ 20 ms
RSM
t
P
10
0
0
20
40
t, TIME (ms)
60
80
Figure 5. 8 X 20 ms Pulse Waveform
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3
ESD7951ST5G
PACKAGE DIMENSIONS
SOD−923
CASE 514AB−01
ISSUE B
−X−
D
NOTES:
−Y−
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
E
1
2
b 2X
0.08 (0.0032) X Y
MILLIMETERS
DIM MIN NOM MAX
INCHES
NOM MAX
MIN
A
A
b
c
0.34
0.15
0.07
0.75
0.55
0.95
0.05
0.37
0.20
0.12
0.80
0.60
1.00
0.10
0.40
0.25
0.17
0.85
0.65
1.05
0.15
0.013 0.015 0.016
0.006 0.008 0.010
0.003 0.005 0.007
0.030 0.031 0.033
0.022 0.024 0.026
0.037 0.039 0.041
0.002 0.004 0.006
D
E
H
E
L
c
L
H
E
SOLDERING FOOTPRINT*
0.90
0.40
0.30
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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ESD7951S/D
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