STTFS015N10MCL [ONSEMI]

Power MOSFET, N Channel, 100V, 42 A, 12.9mΩ;
STTFS015N10MCL
型号: STTFS015N10MCL
厂家: ONSEMI    ONSEMI
描述:

Power MOSFET, N Channel, 100V, 42 A, 12.9mΩ

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MOSFET - Power, Single  
N-Channel  
100 V, 12.9 mW, 42 A  
STTFS015N10MCL  
Features  
www.onsemi.com  
Small Footprint (3.3x3.3 mm) for Compact Design  
Low R  
to Minimize Conduction Losses  
DS(on)  
Low Q and Capacitance to Minimize Driver Losses  
G
V
R
MAX  
I MAX  
D
(BR)DSS  
DS(ON)  
Primary DCDC MOSFET  
12.9 mW @ 10 V  
19.8 mW @ 4.5 V  
Synchronous Rectifier in DCDC and ACDC  
Motor Drive  
100 V  
42 A  
These Devices are PbFree, Halogen Free/BFR Free and are RoHS  
Compliant  
ELECTRICAL CONNECTION  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
J
S
S
D
D
D
Parameter  
DraintoSource Voltage  
Symbol  
Value  
100  
20  
Unit  
V
V
DSS  
GatetoSource Voltage  
V
GS  
V
S
Continuous Drain  
Current R  
T
= 25°C  
= 100°C  
= 25°C  
I
42  
A
C
D
G
D
q
JC  
T
C
27  
(Notes 1, 3)  
Steady  
State  
Power Dissipation  
T
C
P
45  
W
A
N-Channel MOSFET  
D
R
(Note 1)  
q
JC  
T
C
= 100°C  
18  
Continuous Drain  
Current R  
T = 25°C  
A
I
D
10  
8 7 6 5  
D D D D  
q
JA  
Steady  
State  
(Notes 1, 2, 3)  
Power Dissipation  
T = 25°C  
A
P
2.5  
W
D
R
(Notes 1, 2)  
q
JA  
Pin 1  
1 2 3 4  
Top  
G S S S  
Bottom  
Pulsed Drain Current  
T = 25°C, t = 10 ms  
I
DM  
130  
A
Pin 1  
A
p
Operating Junction and Storage Temperature  
Range  
T , T  
55 to  
+150  
°C  
J
stg  
WDFN8  
(3.3x3.3, 0.65 P)  
CASE 511DY  
Single Pulse DraintoSource Avalanche  
Energy (L = 3 mH, I = 6 A)  
E
AS  
54  
mJ  
AS  
Lead Temperature for Soldering Purposes  
(1/8from case for 10 s)  
T
L
260  
°C  
MARKING DIAGRAM  
Stresses exceeding those listed in the Maximum Ratings table may damage the  
device. If any of these limits are exceeded, device functionality should not be  
assumed, damage may occur and reliability may be affected.  
XXXX  
AYWW  
THERMAL RESISTANCE MAXIMUM RATINGS  
Parameter  
Symbol  
Value  
2.8  
Unit  
XXXX  
= Device Code  
JunctiontoCase Steady State  
JunctiontoAmbient Steady State (Note 2)  
R
°C/W  
q
JC  
A
= Assembly Location  
R
50  
q
Y
= Year Code  
JA  
WW  
= Work Week Code  
1. The entire application environment impacts the thermal resistance values shown,  
they are not constants and are only valid for the particular conditions noted.  
2
2. Surfacemounted on FR4 board using a 650 mm , 2 oz. Cu pad.  
3. Maximum current for pulses as long as 1 second is higher but is dependent  
on pulse duration and duty cycle.  
ORDERING INFORMATION  
See detailed ordering, marking and shipping information in the  
package dimensions section on page 3 of this data sheet.  
© Semiconductor Components Industries, LLC, 2019  
1
Publication Order Number:  
August, 2020 Rev. 0  
STTFS015N10MCL/D  
 
STTFS015N10MCL  
ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise specified)  
J
Parameter  
Symbol  
Test Condition  
Min  
Typ  
Max  
Unit  
OFF CHARACTERISTICS  
DraintoSource Breakdown Voltage  
V
V
GS  
= 0 V, I = 250 mA  
100  
V
(BR)DSS  
D
DraintoSource Breakdown Voltage  
Temperature Coefficient  
V
/
60  
(BR)DSS  
mV/°C  
T
J
Zero Gate Voltage Drain Current  
I
V
DS  
= 0 V,  
T = 25 °C  
1.0  
250  
100  
DSS  
GS  
J
V
= 100 V  
mA  
T = 125°C  
J
GatetoSource Leakage Current  
ON CHARACTERISTICS (Note 4)  
Gate Threshold Voltage  
I
V
= 0 V, V = 20 V  
nA  
GSS  
DS  
GS  
V
V
= V , I = 77 mA  
1
1.45  
5.0  
10.6  
14.4  
50  
3
V
GS(TH)  
GS  
DS  
D
Threshold Temperature Coefficient  
DraintoSource On Resistance  
V
/T  
J
mV/°C  
GS(TH)  
R
V
GS  
= 10 V  
I
D
= 14 A  
= 11 A  
12.9  
19.8  
DS(on)  
mW  
V
GS  
= 4.5 V  
I
D
Forward Transconductance  
g
FS  
V
DS  
=5 V, I = 14 A  
S
D
CHARGES, CAPACITANCES & GATE RESISTANCE  
Input Capacitance  
C
1338  
521  
9.0  
0.5  
9.0  
19  
ISS  
Output Capacitance  
C
OSS  
C
RSS  
V
= 0 V, f = 1 MHz, V = 50 V  
pF  
GS  
DS  
Reverse Transfer Capacitance  
Gate Resistance  
R
0.1  
1
W
G
Total Gate Charge  
Q
Q
V
GS  
= 4.5 V, V = 50 V; I = 14 A  
nC  
nC  
G(TOT)  
G(TOT)  
DS  
D
Total Gate Charge  
V
GS  
= 10 V, V = 50 V; I = 14 A  
DS D  
Threshold Gate Charge  
GatetoSource Charge  
GatetoDrain Charge  
Plateau Voltage  
Q
2.0  
3.0  
3.0  
2.7  
35  
G(TH)  
Q
nC  
GS  
GD  
GP  
V
= 10 V, V = 50 V; I = 14 A  
GS  
DS  
D
Q
V
V
Output Charge  
Q
V
GS  
= 0 V, V = 50 V  
nC  
nC  
OSS  
DS  
Total Gate Charge Sync  
SWITCHING CHARACTERISTICS (Note 5)  
TurnOn Delay Time  
Q
V
GS  
= 0 to 10 V, V = 0 V  
17  
SYNC  
DS  
t
9.0  
10  
d(ON)  
Rise Time  
t
r
V
= 10 V, V = 50 V,  
DS  
GS  
D
ns  
V
I
= 14 A, R = 6.0 W  
G
TurnOff Delay Time  
t
25  
d(OFF)  
Fall Time  
t
f
5.0  
DRAINSOURCE DIODE CHARACTERISTICS  
Source to Drain Diode Forward Voltage  
V
V
V
= 0 V, I = 2 A  
(Note 7)  
(Note 7)  
0.7  
0.83  
20  
1.2  
1.3  
SD  
GS  
S
= 0 V, I = 14 A  
GS  
S
Reverse Recovery Time  
Reverse Recovery Charge  
Reverse Recovery Time  
Reverse Recovery Charge  
t
rr  
ns  
nC  
ns  
I = 7 A, di/dt = 300 A/ms  
F
Q
33  
rr  
t
rr  
14  
I = 7 A, di/dt = 1000 A/ms  
F
Q
76  
nC  
rr  
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product  
performance may not be indicated by the Electrical Characteristics if operated under different conditions.  
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.  
5. Switching characteristics are independent of operating junction temperatures.  
www.onsemi.com  
2
 
STTFS015N10MCL  
NOTES:  
6. R  
2
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR4 material. R  
is determined  
q
q
CA  
JA  
by the user’s board design.  
a) 50°C/W when mounted on  
b) 125°C/W when mounted on  
a minimum pad of 2 oz copper.  
2
a 1 in pad of 2 oz copper.  
7. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.  
8. E of 54 mJ is based on starting T = 25_C; L = 3 mH, I = 6 A, V = 100 V, V = 10 V.  
AS  
J
AS  
DD  
GS  
9. Pulsed I please refer to Figure 11 SOA graph for more details.  
D
10.Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal  
& electromechanical application board design.  
DEVICE ORDERING INFORMATION  
Device  
Marking  
Package  
Shipping  
STTFS015N10MCL  
S15L  
WDFN8 (3.3x3.3)  
1500 / Tape & Reel  
(PbFree)  
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging  
Specifications Brochure, BRD8011/D.  
www.onsemi.com  
3
STTFS015N10MCL  
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
3.0  
150  
100  
50  
VGS = 3.5 V  
VGS = 4.5 V  
VGS = 3 V  
V
GS = 10 V  
V
GS = 6 V  
V
GS = 8 V  
2.5  
V
GS = 4.5 V  
VGS = 6 V  
Pulse Duration = 80 ms  
Duty Cycle = 0.5% Max  
2.0  
1.5  
1.0  
VGS = 3.5 V  
VGS = 3 V  
VGS = 8 V  
Pulse Duration = 80 ms  
Duty Cycle = 0.5% Max  
VGS = 10 V  
150  
0
0
50  
100  
0
1
2
3
4
5
ID, DRAIN CURRENT (A)  
V
DS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 1. On Region Characteristics  
Figure 2. Normalized OnResistance  
vs. Drain Current and Gate Voltage  
150  
100  
50  
2.2  
2.0  
1.8  
1.6  
1.4  
1.2  
1.0  
I
D = 14 A  
ID = 14 A  
VGS = 10 V  
Pulse Duration = 80 ms  
Duty Cycle = 0.5% Max  
TJ = 150 o  
C
0.8  
0.6  
TJ = 25 o  
C
0
75 50 25  
0
25 50 75 100 125 150  
1
2
3
4
5
6
7
8
9
10  
TJ, JUNCTION TEMPERATURE (oC)  
V
GS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. Normalized On Resistance  
vs. Junction Temperature  
Figure 4. On-Resistance  
vs. Gate to Source Voltage  
150  
100  
50  
100  
10  
1
VDS = 5 V  
VGS = 0 V  
Pulse Duration = 80 ms  
Duty Cycle = 0.5% Max  
TJ = 150 o  
C
25oC  
0.1  
TJ = 25 o  
C
0.01  
TJ = 150 o  
C
55oC  
TJ = 55oC  
0.001  
0
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1
2
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)  
VSD, BODY DIODE FORWARD VOLTAGE (V)  
Figure 5. Transfer Characteristics  
Figure 6. Source to Drain Diode  
Forward Voltage vs. Source Current  
www.onsemi.com  
4
STTFS015N10MCL  
TYPICAL CHARACTERISTICS (T = 25°C unless otherwise noted)  
J
10  
8
10000  
ID = 14 A  
Ciss  
1000  
100  
10  
V
DD = 25 V  
Coss  
6
V
DD = 50 V  
4
VDD = 75 V  
Crss  
2
f = 1 MHz  
VGS = 0 V  
0
1
0
5
10  
Qg, GATE CHARGE (nC)  
15  
20  
0.1  
1
10  
100  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure 7. Gate Charge Characteristics  
Figure 8. Capacitance vs. Drain  
to Source Voltage  
100  
10  
1
60  
50  
40  
30  
20  
VGS = 10 V  
TJ = 25 oC  
VGS = 4.5 V  
TJ = 100 o  
C
TJ = 150 o  
C
10  
0
R
qJC = 2.8 oC/W  
0.001  
0.01  
0.1  
1
10  
25  
50  
75  
100  
125  
150  
TC, CASE TEMPERATURE (oC)  
tAV, TIME IN AVALANCHE (ms)  
Figure 9. Unclamped Inductive  
Switching Capability  
Figure 10. Maximum Continuous Drain  
Current vs. Case Temperature  
1000  
100  
10  
10000  
1000  
SINGLE PULSE  
qJC = 2.8oC/W  
T
R
C = 25oC  
10 ms  
100 ms  
100  
10  
1 ms  
1
R
Limit  
DS(on)  
Thermal Limit  
Package Limit  
10 ms  
100 ms/DC  
0.1  
0.1  
1
10  
100 200  
0.00001 0.0001  
0.001  
0.01  
0.1  
1
VDS, DRAINSOURCE VOLTAGE (V)  
t, PULSE WIDTH (sec)  
Figure 11. Forward Bias Safe Operating Area  
Figure 12. Single Pulse Maximum  
Power Dissipation  
www.onsemi.com  
5
STTFS015N10MCL  
TYPICAL CHARACTERISTICS (continued)  
10  
DUTY CYCLEDESCENDING ORDER  
D = 0.5  
1
0.2  
0.1  
0.05  
0.02  
P
DM  
0.1  
0.01  
t
1
t
SINGLE PULSE  
2
NOTES:  
0.01  
Z
R
(t) = r(t) x R  
qJC  
qJC  
o
= 2.8 C/W  
qJC  
Peak T = P  
x Z (t) + T  
J
DM  
qJC C  
Duty Cycle, D = t / t  
1
2
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t, PULSE TIME (s)  
Figure 13. JunctiontoCase Transient Thermal Response Curve  
www.onsemi.com  
6
STTFS015N10MCL  
PACKAGE DIMENSIONS  
WDFN8 3.3x3.3, 0.65P  
CASE 511DY  
ISSUE A  
www.onsemi.com  
7
STTFS015N10MCL  
ON Semiconductor and  
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.  
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent  
coverage may be accessed at www.onsemi.com/site/pdf/PatentMarking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.  
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability  
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.  
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,  
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or  
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer  
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not  
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification  
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized  
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and  
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such  
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This  
literature is subject to all applicable copyright laws and is not for resale in any manner.  
PUBLICATION ORDERING INFORMATION  
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